[PATCH] Fix sparc so that reload doesn't try to load non-trivial vector consts directly.

[PATCH] Fix sparc so that reload doesn't try to load non-trivial vector consts directly.

[David Miller]

While working on the vis3 fp move support, I came to find that we
weren't making sure that non-trivial vector constants went to memory.

The vector move patterns only support -1 and 0, so we have to force
all other values to memory.

Committed to trunk.

gcc/

	* config/sparc/predicates.md (input_operand): Disallow vector
	constants other than 0 and -1.
	* config/sparc/sparc.c (sparc_preferred_reload_class): Return
	NO_REGS for vector constants other than 0 and -1.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180351 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog                  |    5 +++++
 gcc/config/sparc/predicates.md |    8 ++++++--
 gcc/config/sparc/sparc.c       |   15 ++++++++++++---
 3 files changed, 23 insertions(+), 5 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e647a60..3dc4ba9 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
 2011-10-23  David S. Miller  <davem@davemloft.net>
 
+	* config/sparc/predicates.md (input_operand): Disallow vector
+	constants other than 0 and -1.
+	* config/sparc/sparc.c (sparc_preferred_reload_class): Return
+	NO_REGS for vector constants other than 0 and -1.
+
 	* config/sparc/sparc.h (SPARC_FIRST_INT_REG, SPARC_LAST_INT_REG,
 	SPARC_INT_REG_P): Define.
 	(HARD_REGNO_NREGS): Use SPARC_INT_REG_P.
diff --git a/gcc/config/sparc/predicates.md b/gcc/config/sparc/predicates.md
index f0be149..4dd734f 100644
--- a/gcc/config/sparc/predicates.md
+++ b/gcc/config/sparc/predicates.md
@@ -427,8 +427,12 @@
       && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
     return true;
 
-  if ((mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
-      || (mclass == MODE_VECTOR_INT && GET_CODE (op) == CONST_VECTOR))
+  if (mclass == MODE_FLOAT && GET_CODE (op) == CONST_DOUBLE)
+    return true;
+
+  if (mclass == MODE_VECTOR_INT && GET_CODE (op) == CONST_VECTOR
+      && (const_zero_operand (op, mode)
+          || const_all_ones_operand (op, mode)))
     return true;
 
   if (register_operand (op, mode))
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 415ece8..df0d825 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -11116,17 +11116,26 @@ sparc_conditional_register_usage (void)
 static reg_class_t
 sparc_preferred_reload_class (rtx x, reg_class_t rclass)
 {
+  enum machine_mode mode = GET_MODE (x);
   if (CONSTANT_P (x))
     {
       if (FP_REG_CLASS_P (rclass)
 	  || rclass == GENERAL_OR_FP_REGS
 	  || rclass == GENERAL_OR_EXTRA_FP_REGS
-	  || (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT && ! TARGET_FPU)
-	  || (GET_MODE (x) == TFmode && ! const_zero_operand (x, TFmode)))
+	  || (GET_MODE_CLASS (mode) == MODE_FLOAT && ! TARGET_FPU)
+	  || (mode == TFmode && ! const_zero_operand (x, mode)))
 	return NO_REGS;
 
-      if (GET_MODE_CLASS (GET_MODE (x)) == MODE_INT)
+      if (GET_MODE_CLASS (mode) == MODE_INT)
 	return GENERAL_REGS;
+
+      if (GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
+	{
+	  if (! FP_REG_CLASS_P (rclass)
+	      || !(const_zero_operand (x, mode)
+		   || const_all_ones_operand (x, mode)))
+	    return NO_REGS;
+	}
     }
 
   return rclass;
-- 
1.7.6.401.g6a319