[PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[David Miller]

Richard reported to me that we wouldn't have a mulsi3 pattern with
"-m32 -mv8plus", which left me dumbfounded. It seemed impossible.

Clarifying further, the case is when gcc is built for a target of
sparc64-linux.  And indeed I was able to reproduce this, a 32-bit
mutliply results in a libcall.

The problem is that the default cpu when 32-bit is v7, and applying
the cpu disable bits in sparc_override_options() clears MASK_ISA
which includes MASK_V8PLUS.

While diagnosing this I added all kinds of debugging helpers to
sparc_override_options() so that the next guy can figure this kind of
thing out more quickly.  "-mdebug=x,y,z" is added, and currently
recognizes "options" and "all".  More can be added later, as needed,
to ease sparc backend maintainence.

You can't just fix this -mv8plus problem universally using spec
tricks.  Spec rules such as "{!-mcpu*:-mcpu=v9}" never trigger for the
default bitness, because OPTION_DEFAULT_SPECS appends "-mcpu=v7" or
similar to the command line first.

Therefore, I put the cpu bump to v9 into sparc_override_options()
itself, this handles all possible cases.

sparc64-sun-solaris2* by wouldn't hit this problem, because the
default cpu there is v9.

While testing to see what happens on Solaris, I noticed that it has
become impossible to cross from one sparc target to Linux/Sparc or
Solaris/Sparc.  This is because the ifdef guard for EXTRA_SPEC_FUNCTIONS
is not identical to the test used to decide if driver-sparc.o should
be included in the build, so we get a link failure in such cross
situations.

That issue is fixed here too.

Commited to trunk.

gcc/

	* config/sparc/sol2.h: Protect -m{cpu,tune}=native handling
	with a more complete cpp test.
	* config/sparc/linux64.h: Likewise.
	* config/sparc/linux.h: Likewise.
	* config/sparc/sparc.opt (sparc_debug): New target variable.
	(mdebug): New target option.
	* config/sparc/sparc.h (MASK_DEBUG_OPTIONS, MASK_DEBUG_ALL,
	TARGET_DEBUG_OPTIONS): New defines.
	* config/sparc/sparc.c (debug_target_flag_bits,
	debug_target_flags): New functions.
	(sparc_option_override): Add name strings back to cpu_table[].
	Parse -mdebug string.  When TARGET_DEBUG_OPTIONS is true, print
	out the target flags before and after override processing as well
	as the selected cpu.  If MASK_V8PLUS, make sure that the selected
	cpu is at least v9.
---
 gcc/ChangeLog              |   18 +++++
 gcc/config/sparc/linux.h   |    2 +-
 gcc/config/sparc/linux64.h |    2 +-
 gcc/config/sparc/sol2.h    |    2 +-
 gcc/config/sparc/sparc.c   |  161 ++++++++++++++++++++++++++++++++++++++------
 gcc/config/sparc/sparc.h   |    6 ++
 gcc/config/sparc/sparc.opt |    8 ++
 7 files changed, 174 insertions(+), 25 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8eac26e..2bc40b0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,21 @@
+2011-10-14  David S. Miller  <davem@davemloft.net>
+
+	* config/sparc/sol2.h: Protect -m{cpu,tune}=native handling
+	with a more complete cpp test.
+	* config/sparc/linux64.h: Likewise.
+	* config/sparc/linux.h: Likewise.
+	* config/sparc/sparc.opt (sparc_debug): New target variable.
+	(mdebug): New target option.
+	* config/sparc/sparc.h (MASK_DEBUG_OPTIONS, MASK_DEBUG_ALL,
+	TARGET_DEBUG_OPTIONS): New defines.
+	* config/sparc/sparc.c (debug_target_flag_bits,
+	debug_target_flags): New functions.
+	(sparc_option_override): Add name strings back to cpu_table[].
+	Parse -mdebug string.  When TARGET_DEBUG_OPTIONS is true, print
+	out the target flags before and after override processing as well
+	as the selected cpu.  If MASK_V8PLUS, make sure that the selected
+	cpu is at least v9.
+
 2011-10-15  Oleg Endo  <oleg.endo@t-online.de>
 
 	PR target/49263
diff --git a/gcc/config/sparc/linux.h b/gcc/config/sparc/linux.h
index 0ad4b34..443c796 100644
--- a/gcc/config/sparc/linux.h
+++ b/gcc/config/sparc/linux.h
@@ -41,7 +41,7 @@ along with GCC; see the file COPYING3.  If not see
 
 /* -mcpu=native handling only makes sense with compiler running on
    a SPARC chip.  */
-#if defined(__sparc__)
+#if defined(__sparc__) && defined(__linux__)
 extern const char *host_detect_local_cpu (int argc, const char **argv);
 # define EXTRA_SPEC_FUNCTIONS						\
   { "local_cpu_detect", host_detect_local_cpu },
diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
index b87116a..a51a2f0 100644
--- a/gcc/config/sparc/linux64.h
+++ b/gcc/config/sparc/linux64.h
@@ -139,7 +139,7 @@ along with GCC; see the file COPYING3.  If not see
 
 /* -mcpu=native handling only makes sense with compiler running on
    a SPARC chip.  */
-#if defined(__sparc__)
+#if defined(__sparc__) && defined(__linux__)
 extern const char *host_detect_local_cpu (int argc, const char **argv);
 # define EXTRA_SPEC_FUNCTIONS						\
   { "local_cpu_detect", host_detect_local_cpu },
diff --git a/gcc/config/sparc/sol2.h b/gcc/config/sparc/sol2.h
index fea60d0..ba2ec35 100644
--- a/gcc/config/sparc/sol2.h
+++ b/gcc/config/sparc/sol2.h
@@ -181,7 +181,7 @@ along with GCC; see the file COPYING3.  If not see
 
 /* -mcpu=native handling only makes sense with compiler running on
    a SPARC chip.  */
-#if defined(__sparc__)
+#if defined(__sparc__) && defined(__SVR4)
 extern const char *host_detect_local_cpu (int argc, const char **argv);
 # define EXTRA_SPEC_FUNCTIONS						\
   { "local_cpu_detect", host_detect_local_cpu },
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index fc448cc..a7b075c 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -700,6 +700,61 @@ char sparc_hard_reg_printed[8];
 
 struct gcc_target targetm = TARGET_INITIALIZER;
 
+static void
+dump_target_flag_bits (const int flags)
+{
+  if (flags & MASK_64BIT)
+    fprintf (stderr, "64BIT ");
+  if (flags & MASK_APP_REGS)
+    fprintf (stderr, "APP_REGS ");
+  if (flags & MASK_FASTER_STRUCTS)
+    fprintf (stderr, "FASTER_STRUCTS ");
+  if (flags & MASK_FLAT)
+    fprintf (stderr, "FLAT ");
+  if (flags & MASK_FMAF)
+    fprintf (stderr, "FMAF ");
+  if (flags & MASK_FPU)
+    fprintf (stderr, "FPU ");
+  if (flags & MASK_HARD_QUAD)
+    fprintf (stderr, "HARD_QUAD ");
+  if (flags & MASK_POPC)
+    fprintf (stderr, "POPC ");
+  if (flags & MASK_PTR64)
+    fprintf (stderr, "PTR64 ");
+  if (flags & MASK_STACK_BIAS)
+    fprintf (stderr, "STACK_BIAS ");
+  if (flags & MASK_UNALIGNED_DOUBLES)
+    fprintf (stderr, "UNALIGNED_DOUBLES ");
+  if (flags & MASK_V8PLUS)
+    fprintf (stderr, "V8PLUS ");
+  if (flags & MASK_VIS)
+    fprintf (stderr, "VIS ");
+  if (flags & MASK_VIS2)
+    fprintf (stderr, "VIS2 ");
+  if (flags & MASK_VIS3)
+    fprintf (stderr, "VIS3 ");
+  if (flags & MASK_DEPRECATED_V8_INSNS)
+    fprintf (stderr, "DEPRECATED_V8_INSNS ");
+  if (flags & MASK_LITTLE_ENDIAN)
+    fprintf (stderr, "LITTLE_ENDIAN ");
+  if (flags & MASK_SPARCLET)
+    fprintf (stderr, "SPARCLET ");
+  if (flags & MASK_SPARCLITE)
+    fprintf (stderr, "SPARCLITE ");
+  if (flags & MASK_V8)
+    fprintf (stderr, "V8 ");
+  if (flags & MASK_V9)
+    fprintf (stderr, "V9 ");
+}
+
+static void
+dump_target_flags (const char *prefix, const int flags)
+{
+  fprintf (stderr, "%s: (%08x) [ ", prefix, flags);
+  dump_target_flag_bits (flags);
+  fprintf(stderr, "]\n");
+}
+
 /* Validate and override various options, and do some machine dependent
    initialization.  */
 
@@ -745,49 +800,93 @@ sparc_option_override (void)
   /* Table of values for -m{cpu,tune}=.  This must match the order of
      the PROCESSOR_* enumeration.  */
   static struct cpu_table {
+    const char *const name;
     const int disable;
     const int enable;
   } const cpu_table[] = {
-    { MASK_ISA, 0 },
-    { MASK_ISA, 0 },
-    { MASK_ISA, MASK_V8 },
+    { "v7",		MASK_ISA, 0 },
+    { "cypress",	MASK_ISA, 0 },
+    { "v8",		MASK_ISA, MASK_V8 },
     /* TI TMS390Z55 supersparc */
-    { MASK_ISA, MASK_V8 },
-    { MASK_ISA, MASK_V8|MASK_FPU },
+    { "supersparc",	MASK_ISA, MASK_V8 },
+    { "hypersparc",	MASK_ISA, MASK_V8|MASK_FPU },
     /* LEON */
-    { MASK_ISA, MASK_V8|MASK_FPU },
-    { MASK_ISA, MASK_SPARCLITE },
+    { "leon",		MASK_ISA, MASK_V8|MASK_FPU },
+    { "sparclite",	MASK_ISA, MASK_SPARCLITE },
     /* The Fujitsu MB86930 is the original sparclite chip, with no FPU.  */
-    { MASK_ISA|MASK_FPU, MASK_SPARCLITE },
+    { "f930",		MASK_ISA|MASK_FPU, MASK_SPARCLITE },
     /* The Fujitsu MB86934 is the recent sparclite chip, with an FPU.  */
-    { MASK_ISA, MASK_SPARCLITE|MASK_FPU },
-    { MASK_ISA|MASK_FPU, MASK_SPARCLITE },
-    { MASK_ISA, MASK_SPARCLET },
+    { "f934",		MASK_ISA, MASK_SPARCLITE|MASK_FPU },
+    { "sparclite86x",	MASK_ISA|MASK_FPU, MASK_SPARCLITE },
+    { "sparclet",	MASK_ISA, MASK_SPARCLET },
     /* TEMIC sparclet */
-    { MASK_ISA, MASK_SPARCLET },
-    { MASK_ISA, MASK_V9 },
+    { "tsc701",		MASK_ISA, MASK_SPARCLET },
+    { "v9",		MASK_ISA, MASK_V9 },
     /* UltraSPARC I, II, IIi */
-    { MASK_ISA,
+    { "ultrasparc",	MASK_ISA,
     /* Although insns using %y are deprecated, it is a clear win.  */
-      MASK_V9|MASK_DEPRECATED_V8_INSNS},
+      MASK_V9|MASK_DEPRECATED_V8_INSNS },
     /* UltraSPARC III */
     /* ??? Check if %y issue still holds true.  */
-    { MASK_ISA,
-      MASK_V9|MASK_DEPRECATED_V8_INSNS|MASK_VIS2},
+    { "ultrasparc3",	MASK_ISA,
+      MASK_V9|MASK_DEPRECATED_V8_INSNS|MASK_VIS2 },
     /* UltraSPARC T1 */
-    { MASK_ISA,
-      MASK_V9|MASK_DEPRECATED_V8_INSNS},
+    { "niagara",	MASK_ISA,
+      MASK_V9|MASK_DEPRECATED_V8_INSNS },
     /* UltraSPARC T2 */
-    { MASK_ISA, MASK_V9|MASK_POPC|MASK_VIS2},
+    { "niagara2",	MASK_ISA,
+      MASK_V9|MASK_POPC|MASK_VIS2 },
     /* UltraSPARC T3 */
-    { MASK_ISA, MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF},
+    { "niagara3",	MASK_ISA,
+      MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF },
     /* UltraSPARC T4 */
-    { MASK_ISA, MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF},
+    { "niagara4",	MASK_ISA,
+      MASK_V9|MASK_POPC|MASK_VIS2|MASK_VIS3|MASK_FMAF },
   };
   const struct cpu_table *cpu;
   unsigned int i;
   int fpu;
 
+  if (sparc_debug_string != NULL)
+    {
+      const char *q;
+      char *p;
+
+      p = ASTRDUP (sparc_debug_string);
+      while ((q = strtok (p, ",")) != NULL)
+	{
+	  bool invert;
+	  int mask;
+
+	  p = NULL;
+	  if (*q == '!')
+	    {
+	      invert = true;
+	      q++;
+	    }
+	  else
+	    invert = false;
+
+	  if (! strcmp (q, "all"))
+	    mask = MASK_DEBUG_ALL;
+	  else if (! strcmp (q, "options"))
+	    mask = MASK_DEBUG_OPTIONS;
+	  else
+	    error ("unknown -mdebug-%s switch", q);
+
+	  if (invert)
+	    sparc_debug &= ~mask;
+	  else
+	    sparc_debug |= mask;
+	}
+    }
+
+  if (TARGET_DEBUG_OPTIONS)
+    {
+      dump_target_flags("Initial target_flags", target_flags);
+      dump_target_flags("target_flags_explicit", target_flags_explicit);
+    }
+
 #ifdef SUBTARGET_OVERRIDE_OPTIONS
   SUBTARGET_OVERRIDE_OPTIONS;
 #endif
@@ -849,10 +948,25 @@ sparc_option_override (void)
       gcc_assert (def->cpu != -1);
       sparc_cpu_and_features = def->processor;
     }
+
+  if ((target_flags & MASK_V8PLUS)
+      && sparc_cpu_and_features < PROCESSOR_V9)
+    sparc_cpu_and_features = PROCESSOR_V9;
+
   if (!global_options_set.x_sparc_cpu)
     sparc_cpu = sparc_cpu_and_features;
 
   cpu = &cpu_table[(int) sparc_cpu_and_features];
+
+  if (TARGET_DEBUG_OPTIONS)
+    {
+      fprintf (stderr, "sparc_cpu_and_features: %s\n", cpu->name);
+      fprintf (stderr, "sparc_cpu: %s\n",
+	       cpu_table[(int) sparc_cpu].name);
+      dump_target_flags ("cpu->disable", cpu->disable);
+      dump_target_flags ("cpu->enable", cpu->enable);
+    }
+
   target_flags &= ~cpu->disable;
   target_flags |= (cpu->enable
 #ifndef HAVE_AS_FMAF_HPC_VIS3
@@ -976,6 +1090,9 @@ sparc_option_override (void)
     target_flags |= MASK_LONG_DOUBLE_128;
 #endif
 
+  if (TARGET_DEBUG_OPTIONS)
+    dump_target_flags ("Final target_flags", target_flags);
+
   maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
 			 ((sparc_cpu == PROCESSOR_ULTRASPARC
 			   || sparc_cpu == PROCESSOR_NIAGARA
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 669f106..e0db816 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -1880,3 +1880,9 @@ extern int sparc_indent_opcode;
 
 /* We use gcc _mcount for profiling.  */
 #define NO_PROFILE_COUNTERS 0
+
+/* Debug support */
+#define MASK_DEBUG_OPTIONS		0x01	/* debug option handling */
+#define MASK_DEBUG_ALL			MASK_DEBUG_OPTIONS
+
+#define TARGET_DEBUG_OPTIONS		(sparc_debug & MASK_DEBUG_OPTIONS)
diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index ca16e6d..5ee6396 100644
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -21,6 +21,10 @@
 HeaderInclude
 config/sparc/sparc-opts.h
 
+;; Debug flags
+TargetVariable
+unsigned int sparc_debug
+
 mfpu
 Target Report Mask(FPU)
 Use hardware FP
@@ -180,6 +184,10 @@ mcmodel=
 Target RejectNegative Joined Var(sparc_cmodel_string)
 Use given SPARC-V9 code model
 
+mdebug=
+Target RejectNegative Joined Var(sparc_debug_string)
+Enable debug output
+
 mstd-struct-return
 Target Report RejectNegative Var(sparc_std_struct_return)
 Enable strict 32-bit psABI struct return checking.
-- 
1.7.6.401.g6a319

Re: [PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[Eric Botcazou]

> You can't just fix this -mv8plus problem universally using spec
> tricks.  Spec rules such as "{!-mcpu*:-mcpu=v9}" never trigger for the
> default bitness, because OPTION_DEFAULT_SPECS appends "-mcpu=v7" or
> similar to the command line first.
>
> Therefore, I put the cpu bump to v9 into sparc_override_options()
> itself, this handles all possible cases.

This breaks -mcpu on Solaris though because TARGET_DEFAULT has MASK_V8PLUS.
So any setting below or equal to -mcpu=v8 triggers an architecture mismatch 
between assembler and compiler.

I think we need to go the specs route.  I'd just add a mv8plus rule to CC1_SPEC 
in config/sparc/linux64.h similar to the one present in config/sparc/sol2.h.
This works as OPTION_DEFAULT_SPECS shouldn't prepend anything if you pass -m32.

But I presume this still leaves us with the problem for the 32-bit compiler.

-- 
Eric Botcazou

Re: [PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Sun, 23 Oct 2011 00:22:14 +0200

> This breaks -mcpu on Solaris though because TARGET_DEFAULT has MASK_V8PLUS.
> So any setting below or equal to -mcpu=v8 triggers an architecture mismatch 
> between assembler and compiler.
> 
> I think we need to go the specs route.  I'd just add a mv8plus rule to CC1_SPEC 
> in config/sparc/linux64.h similar to the one present in config/sparc/sol2.h.
> This works as OPTION_DEFAULT_SPECS shouldn't prepend anything if you pass -m32.

This is precisely what I tried initially, and my posting was
explicitly trying to explain that this kind of approach cannot
work. :-)

> But I presume this still leaves us with the problem for the 32-bit compiler.

I tried these kinds of things.  No matter what you do the OPTION_DEFAULT_SPECS
either get in the way of the native bitness or the non-native bitness of
compiler's default target.

Personally, I tend to build a 32-bit compiler and test 64-bit things by
giving -m64.  Richard has been building 64-bit compilers and using -m32
to test 32-bit stuff.

Furthermore, consider that we need to solve this issue for things
other than MASK_V8PLUS.  For example VIS2, VIS3, and FMAF all need
similar treatment.

Given that, I don't think we want to keep banging the specs for every
new MASK we add, even if it could work.  I think the specs are quite
convoluted as-is.

I'll try to brainstorm on this, thanks for letting me know about the
Solaris target problem.

Re: [PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[Eric Botcazou]

> This is precisely what I tried initially, and my posting was
> explicitly trying to explain that this kind of approach cannot
> work. :-)

It will work for Richard's case though and that's clearly the most glaring 
problem.  Moreover, it will bring Linux on par with Solaris, which is also a 
good thing.  And of course it will unbreak Solaris.

> Personally, I tend to build a 32-bit compiler and test 64-bit things by
> giving -m64.  Richard has been building 64-bit compilers and using -m32
> to test 32-bit stuff.
>
> Furthermore, consider that we need to solve this issue for things
> other than MASK_V8PLUS.  For example VIS2, VIS3, and FMAF all need
> similar treatment.
>
> Given that, I don't think we want to keep banging the specs for every
> new MASK we add, even if it could work.  I think the specs are quite
> convoluted as-is.

The specs is the only mechanism that discriminates between user input and the 
rest.  I don't think that rejecting them upfront is a good approach.

> I'll try to brainstorm on this, thanks for letting me know about the
> Solaris target problem.

Let's fix the regression quickly though.

-- 
Eric Botcazou

Re: [PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[David Miller]

From: Eric Botcazou <ebotcazou@adacore.com>
Date: Sun, 23 Oct 2011 11:58:57 +0200

>> I'll try to brainstorm on this, thanks for letting me know about the
>> Solaris target problem.
> 
> Let's fix the regression quickly though.

I'll fix it by the end of tonight.

Re: [PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[David Miller]

From: David Miller <davem@davemloft.net>
Date: Sun, 23 Oct 2011 16:32:36 -0400 (EDT)

> From: Eric Botcazou <ebotcazou@adacore.com>
> Date: Sun, 23 Oct 2011 11:58:57 +0200
> 
>>> I'll try to brainstorm on this, thanks for letting me know about the
>>> Solaris target problem.
>> 
>> Let's fix the regression quickly though.
> 
> I'll fix it by the end of tonight.

Ok, I committed your suggestion to trunk for now.

--
[PATCH] Fix sol2 sparc -mv8 regression.

	* config/sparc/sparc.c (sparc_option_override): Remove -mv8plus
	cpu adjustment.
	* config/sparc/linux64.h (CC1_SPEC): When defaulting to 64-bit,
	append -mcpu=v9 when -mv8plus is given.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180362 138bc75d-0d04-0410-961f-82ee72b054a4
---
 gcc/ChangeLog              |    5 +++++
 gcc/config/sparc/linux64.h |    2 ++
 gcc/config/sparc/sparc.c   |    4 ----
 3 files changed, 7 insertions(+), 4 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1842402..54e1a4f 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,10 @@
 2011-10-23  David S. Miller  <davem@davemloft.net>
 
+	* config/sparc/sparc.c (sparc_option_override): Remove -mv8plus
+	cpu adjustment.
+	* config/sparc/linux64.h (CC1_SPEC): When defaulting to 64-bit,
+	append -mcpu=v9 when -mv8plus is given.
+
 	* config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED): We can move
 	between float and non-float regs when VIS3.
 	* config/sparc/sparc.c (eligible_for_restore_insn): We can't
diff --git a/gcc/config/sparc/linux64.h b/gcc/config/sparc/linux64.h
index a51a2f0..7604fa0 100644
--- a/gcc/config/sparc/linux64.h
+++ b/gcc/config/sparc/linux64.h
@@ -166,6 +166,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
 %{m32:%{m64:%emay not use both -m32 and -m64}} \
 %{m32:-mptr32 -mno-stack-bias %{!mlong-double-128:-mlong-double-64} \
   %{!mcpu*:-mcpu=cypress}} \
+%{mv8plus:-mptr32 -mno-stack-bias %{!mlong-double-128:-mlong-double-64} \
+  %{!mcpu*:-mcpu=v9}} \
 %{!m32:%{!mcpu*:-mcpu=ultrasparc}} \
 %{!mno-vis:%{!m32:%{!mcpu=v9:-mvis}}} \
 "
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 79bb821..29d2922 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1029,10 +1029,6 @@ sparc_option_override (void)
       sparc_cpu_and_features = def->processor;
     }
 
-  if ((target_flags & MASK_V8PLUS)
-      && sparc_cpu_and_features < PROCESSOR_V9)
-    sparc_cpu_and_features = PROCESSOR_V9;
-
   if (!global_options_set.x_sparc_cpu)
     sparc_cpu = sparc_cpu_and_features;
 
-- 
1.7.6.401.g6a319

Re: [PATCH] Fix mv8plus, allow targetting Linux or Solaris from other sparc host.

[Eric Botcazou]

> Ok, I committed your suggestion to trunk for now.

Thanks!

-- 
Eric Botcazou