From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 25367 invoked by alias); 30 Jul 2012 14:10:23 -0000 Received: (qmail 25358 invoked by uid 22791); 30 Jul 2012 14:10:22 -0000 X-SWARE-Spam-Status: No, hits=-2.7 required=5.0 tests=AWL,BAYES_50,KHOP_RCVD_UNTRUST,KHOP_THREADED,MSGID_FROM_MTA_HEADER,RCVD_IN_HOSTKARMA_W,RCVD_IN_HOSTKARMA_WL,TW_BJ,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from e06smtp14.uk.ibm.com (HELO e06smtp14.uk.ibm.com) (195.75.94.110) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 30 Jul 2012 14:09:58 +0000 Received: from /spool/local by e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 30 Jul 2012 15:09:55 +0100 Received: from d06nrmr1407.portsmouth.uk.ibm.com (9.149.38.185) by e06smtp14.uk.ibm.com (192.168.101.144) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 30 Jul 2012 15:09:52 +0100 Received: from d06av02.portsmouth.uk.ibm.com (d06av02.portsmouth.uk.ibm.com [9.149.37.228]) by d06nrmr1407.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q6UE9pHr3088458 for ; Mon, 30 Jul 2012 15:09:51 +0100 Received: from d06av02.portsmouth.uk.ibm.com (loopback [127.0.0.1]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q6UE9odX031072 for ; Mon, 30 Jul 2012 08:09:51 -0600 Received: from tuxmaker.boeblingen.de.ibm.com (tuxmaker.boeblingen.de.ibm.com [9.152.85.9]) by d06av02.portsmouth.uk.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with SMTP id q6UE9ni5031004; Mon, 30 Jul 2012 08:09:49 -0600 Message-Id: <201207301409.q6UE9ni5031004@d06av02.portsmouth.uk.ibm.com> Received: by tuxmaker.boeblingen.de.ibm.com (sSMTP sendmail emulation); Mon, 30 Jul 2012 16:09:49 +0200 Subject: Re: [CFT] s390: Convert from sync to atomic optabs To: rth@redhat.com (Richard Henderson) Date: Mon, 30 Jul 2012 14:19:00 -0000 From: "Ulrich Weigand" Cc: Andreas.Krebbel@de.ibm.com, gcc-patches@gcc.gnu.org In-Reply-To: <1343591445-9690-1-git-send-email-rth@redhat.com> from "Richard Henderson" at Jul 29, 2012 12:50:45 PM MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit x-cbid: 12073014-1948-0000-0000-0000028952D5 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-07/txt/msg01483.txt.bz2 Richard Henderson wrote: > Tested only as far as cross-compile. I had a browse through > objdump of libatomic for a brief sanity check. > > Can you please test on real hw and report back? I'll run a test, but a couple of things I noticed: > /* Shift the values to the correct bit positions. */ > - if (!(ac.aligned && MEM_P (cmp))) > - cmp = s390_expand_mask_and_shift (cmp, mode, ac.shift); > - if (!(ac.aligned && MEM_P (new_rtx))) > - new_rtx = s390_expand_mask_and_shift (new_rtx, mode, ac.shift); > + cmp = s390_expand_mask_and_shift (cmp, mode, ac.shift); > + new_rtx = s390_expand_mask_and_shift (new_rtx, mode, ac.shift); This seems to disable use of ICM / STCM to perform byte or aligned halfword access. Why is this necessary? Those operations are supposed to provide the required operand consistency ... > +(define_insn "atomic_loaddi_1" > + [(set (match_operand:DI 0 "register_operand" "=f,f") > + (unspec:DI [(match_operand:DI 1 "memory_operand" "R,m")] > + UNSPEC_MOVA))] > + "!TARGET_ZARCH" > + "@ > + ld %0,%1 > + ldy %0,%1" > + [(set_attr "op_type" "RX,RXY") > + (set_attr "type" "floaddf")]) This seems to force DImode accesses through floating-point registers, which is quite inefficient. Why not allow LM/STM? Those are supposed to provide doubleword consistency if the operand is sufficiently aligned ... [ From the Principles of Operations, section Block-Concurrent References: The instructions LOAD MULTIPLE (LM), LOAD MULTIPLE DISJOINT, LOAD MULTIPLE HIGH, STORE MULTIPLE (STM), and STORE MULTIPLE HIGH, when the operand or operands start on a word boundary; the instructions LOAD MULTIPLE (LMG) and STORE MULTIPLE (STMG), when the operand starts on a doubleword boundary; and the instructions COMPARE LOGICAL (CLC), COMPARE LOGICAL CHARACTERS UNDER MASK, INSERT CHARACTERS UNDER MASK, LOAD CONTROL (LCTLG), STORE CHARACTERS UNDER MASK, and STORE CONTROL (STCTG) access their storage operands in a left-to-right direction, and all bytes accessed within each doubleword appear to be accessed concurrently as observed by other CPUs. ] Otherwise the patch looks good to me. Thanks, Ulrich -- Dr. Ulrich Weigand GNU Toolchain for Linux on System z and Cell BE Ulrich.Weigand@de.ibm.com