From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 17005 invoked by alias); 13 Oct 2012 00:21:46 -0000 Received: (qmail 16994 invoked by uid 22791); 13 Oct 2012 00:21:41 -0000 X-SWARE-Spam-Status: No, hits=-2.6 required=5.0 tests=AWL,BAYES_20,KHOP_RCVD_UNTRUST,RCVD_IN_DNSWL_HI,RCVD_IN_HOSTKARMA_W,TW_DF,TW_FN,TW_GF,TW_MF,TW_MZ,TW_TR X-Spam-Check-By: sourceware.org Received: from e1.ny.us.ibm.com (HELO e1.ny.us.ibm.com) (32.97.182.141) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Sat, 13 Oct 2012 00:21:29 +0000 Received: from /spool/local by e1.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 12 Oct 2012 20:21:27 -0400 Received: from d01dlp01.pok.ibm.com (9.56.250.166) by e1.ny.us.ibm.com (192.168.1.101) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Fri, 12 Oct 2012 20:21:25 -0400 Received: from d01relay02.pok.ibm.com (d01relay02.pok.ibm.com [9.56.227.234]) by d01dlp01.pok.ibm.com (Postfix) with ESMTP id 4354838C803B for ; Fri, 12 Oct 2012 20:21:23 -0400 (EDT) Received: from d01av04.pok.ibm.com (d01av04.pok.ibm.com [9.56.224.64]) by d01relay02.pok.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id q9D0LMCj293878 for ; Fri, 12 Oct 2012 20:21:23 -0400 Received: from d01av04.pok.ibm.com (loopback [127.0.0.1]) by d01av04.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id q9D0LMnC026489 for ; Fri, 12 Oct 2012 20:21:22 -0400 Received: from ibm-tiger.the-meissners.org ([9.33.48.180]) by d01av04.pok.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id q9D0LMZB026426; Fri, 12 Oct 2012 20:21:22 -0400 Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id 60B6B4247D; Fri, 12 Oct 2012 20:21:20 -0400 (EDT) Date: Sat, 13 Oct 2012 06:13:00 -0000 From: Michael Meissner To: Michael Meissner , Joseph Myers , Neil Booth , David Edelsohn , gcc-patches@gcc.gnu.org, bergner@vnet.ibm.com, segher@kernel.crashing.org, iain@codesourcery.com, andreast-list@fgznet.ch Subject: Re: [PATCH] Rs6000 infrastructure cleanup (switches), revised patch #4 Message-ID: <20121013002119.GA8991@ibm-tiger.the-meissners.org> Mail-Followup-To: Michael Meissner , Joseph Myers , Neil Booth , David Edelsohn , gcc-patches@gcc.gnu.org, bergner@vnet.ibm.com, segher@kernel.crashing.org, iain@codesourcery.com, andreast-list@fgznet.ch References: <20120912224303.GA19348@ibm-tiger.the-meissners.org> <20120917195131.GA22648@ibm-tiger.the-meissners.org> <20120920195755.GA18581@ibm-tiger.the-meissners.org> <20120927224228.GA24889@ibm-tiger.the-meissners.org> <20121005194921.GA20004@ibm-tiger.the-meissners.org> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="vtzGhvizbBRQ85DL" Content-Disposition: inline In-Reply-To: <20121005194921.GA20004@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.5.20 (2009-12-10) X-Content-Scanned: Fidelis XPS MAILER x-cbid: 12101300-6078-0000-0000-000010A3AF83 X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org X-SW-Source: 2012-10/txt/msg01275.txt.bz2 --vtzGhvizbBRQ85DL Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-length: 5692 I decided to see if it was possible to simplify the change over by adding another flag word in the .opt handling to give the old names (TARGET_ and MASK_). For Joseph Myers and Neil Booth, the issue is when changing all of the switches that use Mask(xxx) and InverseMask(xxx) to also use Var(xxx), the option machinery changes the names of the macros to OPTION_ and OPTION_MASK_, which in turn causes lots and lots of changes for patch review. Some can't be omitted, where we referred to the 'target_flags' and 'target_flags_explicit' fields, but at least it reduces the number of other changes. Before doing these patches, I experimented with automatically changing target_flags to HOST_WIDE_INT if we had more than 31 switches, but when I defined a few extra switches to push the powerpc over the limit, I couldn't get the compiler to bootstrap. I figure there were some 'int' variables that need to be changed to the type I created, but I wasn't able to find it. So, I added a TargetName flag to the options. If TargetName is used, the options machinery generates the old names. I have bootstrapped and run the compiler test suite without regressions. If the option handling maintainers agree this is worthwhile, I would like to check it in (or iterate to fix any issues). If it is not acceptible, I will do by changing all of the names, as I've done in previous iterations of this patch. I'm including two attachments. The first (363c) is the changes to the machine independent files, and the second (363d) are the changes to the rs6000 files. 2012-10-12 Michael Meissner * opt-functions.awk (var_set): Move selection of TARGET_ vs. OPTION_ prefix to the opt_prefix_target function. Move selection of MASK_ vs. OPTION_MASK_ prefix to opt_prefix_mask function. If the TargetName flag was set, generate TARGET_ and MASK_ prefixes for Mask/InverseMask options that use a secondary flags variable. (opt_prefix_target): Likewise. (opt_prefix_mask): Likewise. * opth-gen.awk (creation of TARGET_/OPTION_ macros): Likewise. (creation of MASK_/OPTION_MASK_ macros): Likewise. * doc/options.texi (Mask): Add documentation for TargetName which allows the user to use Mask/InverseMask along with Var, and generate the traditional TARGET_ and MASK_ values instead of OPTION_ and OPTION_MASK_. (InverseMask): Likewise. (TargetName): Likewise. * config/rs6000/rs6000.opt (rs6000_flags): New HOST_WIDE_INT flag word to replace target_flags and give us 63 ISA options. (x_rs6000_flags): Location to save/restore rs6000_flags. (x_rs6000_flags_explicit): Location to save/restore rs6000_flags_explicit. (rs6000_taret_flags_explicit): Rename to x_rs6000_flags_explicit. (-mpowerpc64): Change all Mask switches to use rs6000_flags. (-mpowerpc-gpopt): Likewise. (-mpowerpc-gfxopt): Likewise. (-mmfcrf): Likewise. (-mpopcntb): Likewise. (-mfprnd): Likewise. (-mcmpb): Likewise. (-mmfpgpr): Likewise. (-maltivec): Likewise. (-mhard-dfp): Likewise. (-mmulhw): Likewise. (-mdlmzb): Likewise. (-mmultiple): Likewise. (-mstring): Likewise. (-msoft-float): Likewise. (-mhard-float): Likewise. (-mpopcntd): Likewise. (-mvsx): Likewise. (-mno-update): Likewise. (-mupdate): Likewise. (-mminimal-toc): Likewise. (-misel): Likewise. * config/rs6000/darwin.opt (-m64): Likewise. (-m32): Likewise. * config/rs6000/aix64.opt (-m64): Likewise. (-m32): Likewise. * config/rs6000/sysv4.opt (-mstrict-align): Likewise. (-mrelocatable): Likewise. (-mlittle-endian): Likewise. (-mlittle): Likewise. (-mbig-endian): Likewise. (-mbig): Likewise. (-meabi): Likewise. (-m64): Likewise. (-m32): Likewise. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Change all uses of target_flags to rs6000_flags, and target_flags_explicit. Update saving/restoring/printing these flags values. (darwin_rs6000_override_options): Likewise. (rs6000_option_override_internal): Likewise. (rs6000_darwin_file_start): Likewise. (rs6000_inner_target_options): Likewise. (rs6000_pragma_target_parse): Likewise. (rs6000_set_current_function): Likewise. (rs6000_function_specific_save): Likewise. (rs6000_function_specific_restore): Likewise. (rs6000_function_specific_print): Likewise. (rs6000_can_inline_p): Likewise. * common/config/rs6000/rs6000-common.c (rs6000_handle_option): Likewise. * config/rs6000/aix43.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/aix51.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/aix52.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/aix53.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/aix61.h (SUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/freebsd.h (RELOCATABLE_NEEDS_FIXUP): Likewise. * config/rs6000/freebsd64.h (RELOCATABLE_NEEDS_FIXUP): Likewise. (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/linux.h (RELOCATABLE_NEEDS_FIXUP): Likewise. * config/rs6000/linux64.h (RELOCATABLE_NEEDS_FIXUP): Likewise. (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise. * config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Likewise. (rs6000_cpu_cpp_builtins): Likewise. * config/rs6000/rs6000.h: Change comments refering to target_flags. * config/rs6000/sysv4.h (TARGET_TOC): Likewise. (SUBTARGET_OVERRIDE_OPTIONS): Likewise. (SUBSUBTARGET_OVERRIDE_OPTIONS): Likewise. (TARGET_OS_SYSV_CPP_BUILTINS): Likewise. * config/rs6000/rs6000-opts.h (rs6000_flags_explicit): Define in terms of global_options_set.x_rs6000_flags. -- Michael Meissner, IBM 5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA meissner@linux.vnet.ibm.com fax +1 (978) 399-6899 --vtzGhvizbBRQ85DL Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="gcc-power7.patch363c" Content-length: 4815 Index: gcc/opth-gen.awk =================================================================== --- gcc/opth-gen.awk (revision 192400) +++ gcc/opth-gen.awk (working copy) @@ -332,10 +332,9 @@ for (i = 0; i < n_opts; i++) { if (name != "" && mask_bits[name] == 0) { mask_bits[name] = 1 vname = var_name(flags[i]) - mask = "MASK_" + mask = opt_prefix_mask(flags[i]) mask_1 = "1" if (vname != "") { - mask = "OPTION_MASK_" if (host_wide_int[vname] == "yes") mask_1 = "HOST_WIDE_INT_1" } else @@ -375,14 +374,13 @@ for (i = 0; i < n_opts; i++) { if (name != "" && mask_macros[name] == 0) { mask_macros[name] = 1 vname = var_name(flags[i]) - macro = "OPTION_" - mask = "OPTION_MASK_" + macro = opt_prefix_target(name) + mask = opt_prefix_mask(name) if (vname == "") { vname = "target_flags" - macro = "TARGET_" - mask = "MASK_" extra_mask_macros[name] = 1 } + print "#define " macro name \ " ((" vname " & " mask name ") != 0)" } @@ -398,13 +396,12 @@ for (i = 0; i < n_opts; i++) { opt = opt_args("InverseMask", flags[i]) if (opt ~ ",") { vname = var_name(flags[i]) - macro = "OPTION_" - mask = "OPTION_MASK_" + macro = opt_prefix_target(flags[i]) + mask = opt_prefix_mask(flags[i]) if (vname == "") { vname = "target_flags" - macro = "TARGET_" - mask = "MASK_" } + print "#define " macro nth_arg(1, opt) \ " ((" vname " & " mask nth_arg(0, opt) ") == 0)" } Index: gcc/opt-functions.awk =================================================================== --- gcc/opt-functions.awk (revision 192400) +++ gcc/opt-functions.awk (working copy) @@ -242,18 +242,14 @@ function var_set(flags) s = opt_args("Mask", flags); if (s != "") { vn = var_name(flags); - if (vn) - return "0, CLVC_BIT_SET, OPTION_MASK_" s - else - return "0, CLVC_BIT_SET, MASK_" s + mask = opt_prefix_mask(flags) + return "0, CLVC_BIT_SET, " mask s } s = nth_arg(0, opt_args("InverseMask", flags)); if (s != "") { vn = var_name(flags); - if (vn) - return "0, CLVC_BIT_CLEAR, OPTION_MASK_" s - else - return "0, CLVC_BIT_CLEAR, MASK_" s + mask = opt_prefix_mask(flags) + return "0, CLVC_BIT_CLEAR, " mask s } if (flag_set_p("Enum.*", flags)) { en = opt_args("Enum", flags); @@ -297,3 +293,25 @@ function lang_sanitized_name(name) gsub( "[^" alnum "_]", "X", name ) return name } + +# Given the option called NAME which is a mask argument, return the prefix for +# the option (i.e. TARGET_ or OPTION_). +function opt_prefix_target(name) +{ + variable = var_name(name) + if (variable == "" || flag_set_p("TargetName", name)) + return "TARGET_"; + else + return "OPTION_"; +} + +# Given the option called NAME which is a mask argument, return the prefix for +# the mask name (i.e. MASK_ or OPTION_MASK_). +function opt_prefix_mask(name) +{ + variable = var_name(name) + if (variable == "" || flag_set_p("TargetName", name)) + return "MASK_"; + else + return "OPTION_MASK_"; +} Index: gcc/doc/options.texi =================================================================== --- gcc/doc/options.texi (revision 192400) +++ gcc/doc/options.texi (working copy) @@ -339,12 +339,14 @@ You may also specify @code{Var} to selec @code{target_flags}. The options-processing script will automatically allocate a unique bit -for the option. If the option is attached to @samp{target_flags}, -the script will set the macro @code{MASK_@var{name}} to the appropriate -bitmask. It will also declare a @code{TARGET_@var{name}} macro that has -the value 1 when the option is active and 0 otherwise. If you use @code{Var} -to attach the option to a different variable, the associated macros are -called @code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} respectively. +for the option. If the option is attached to @samp{target_flags}, the +script will set the macro @code{MASK_@var{name}} to the appropriate +bitmask. It will also declare a @code{TARGET_@var{name}} macro that +has the value 1 when the option is active and 0 otherwise. If you use +@code{Var} to attach the option to a different variable and do not +used the @code{TargetName} opiton, the associated macros are called +@code{OPTION_MASK_@var{name}} and @code{OPTION_@var{name}} +respectively. @item InverseMask(@var{othername}) @itemx InverseMask(@var{othername}, @var{thisname}) @@ -472,4 +474,10 @@ format}. @item NoDWARFRecord The option is omitted from the producer string written by @option{-grecord-gcc-switches}. + +@item TargetName +If the option was declared with @code{Mask} or @code{InverseMask} and +also @code{Var} to specify an alternative flag word, the +@code{TARGET_@var{name}} and @code{MASK_@var{name}} macros will be +created of @code{OPTION_@var{name}} and @code{OPTION_MASK_@var{name}}. @end table --vtzGhvizbBRQ85DL Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="gcc-power7.patch363d" Content-length: 39226 Index: gcc/config/rs6000/rs6000.opt =================================================================== --- gcc/config/rs6000/rs6000.opt (revision 192400) +++ gcc/config/rs6000/rs6000.opt (working copy) @@ -86,80 +86,88 @@ HOST_WIDE_INT rs6000_builtin_mask TargetVariable unsigned int rs6000_debug -;; Save for target_flags_explicit +;; Replacement for target_flags that gives us more options. +Variable +HOST_WIDE_INT rs6000_flags = TARGET_DEFAULT + +;; Save for rs6000_flags +TargetSave +HOST_WIDE_INT x_rs6000_flags + +;; Save for rs6000_flags_explicit TargetSave -int rs6000_target_flags_explicit +HOST_WIDE_INT x_rs6000_flags_explicit ;; This option existed in the past, but now is always on. mpowerpc Target RejectNegative Undocumented Ignore mpowerpc64 -Target Report Mask(POWERPC64) +Target Report Mask(POWERPC64) TargetName Var(rs6000_flags) Use PowerPC-64 instruction set mpowerpc-gpopt -Target Report Mask(PPC_GPOPT) Save +Target Report Mask(PPC_GPOPT) TargetName Var(rs6000_flags) Use PowerPC General Purpose group optional instructions mpowerpc-gfxopt -Target Report Mask(PPC_GFXOPT) Save +Target Report Mask(PPC_GFXOPT) TargetName Var(rs6000_flags) Use PowerPC Graphics group optional instructions mmfcrf -Target Report Mask(MFCRF) Save +Target Report Mask(MFCRF) TargetName Var(rs6000_flags) Use PowerPC V2.01 single field mfcr instruction mpopcntb -Target Report Mask(POPCNTB) Save +Target Report Mask(POPCNTB) TargetName Var(rs6000_flags) Use PowerPC V2.02 popcntb instruction mfprnd -Target Report Mask(FPRND) Save +Target Report Mask(FPRND) TargetName Var(rs6000_flags) Use PowerPC V2.02 floating point rounding instructions mcmpb -Target Report Mask(CMPB) Save +Target Report Mask(CMPB) TargetName Var(rs6000_flags) Use PowerPC V2.05 compare bytes instruction mmfpgpr -Target Report Mask(MFPGPR) Save +Target Report Mask(MFPGPR) TargetName Var(rs6000_flags) Use extended PowerPC V2.05 move floating point to/from GPR instructions maltivec -Target Report Mask(ALTIVEC) Save +Target Report Mask(ALTIVEC) TargetName Var(rs6000_flags) Use AltiVec instructions mhard-dfp -Target Report Mask(DFP) Save +Target Report Mask(DFP) TargetName Var(rs6000_flags) Use decimal floating point instructions mmulhw -Target Report Mask(MULHW) Save +Target Report Mask(MULHW) TargetName Var(rs6000_flags) Use 4xx half-word multiply instructions mdlmzb -Target Report Mask(DLMZB) Save +Target Report Mask(DLMZB) TargetName Var(rs6000_flags) Use 4xx string-search dlmzb instruction mmultiple -Target Report Mask(MULTIPLE) Save +Target Report Mask(MULTIPLE) TargetName Var(rs6000_flags) Generate load/store multiple instructions mstring -Target Report Mask(STRING) Save +Target Report Mask(STRING) TargetName Var(rs6000_flags) Generate string instructions for block moves msoft-float -Target Report RejectNegative Mask(SOFT_FLOAT) +Target Report RejectNegative Mask(SOFT_FLOAT) TargetName Var(rs6000_flags) Do not use hardware floating point mhard-float -Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) +Target Report RejectNegative InverseMask(SOFT_FLOAT, HARD_FLOAT) TargetName Var(rs6000_flags) Use hardware floating point mpopcntd -Target Report Mask(POPCNTD) Save +Target Report Mask(POPCNTD) TargetName Var(rs6000_flags) Use PowerPC V2.06 popcntd instruction mfriz @@ -171,7 +179,7 @@ Target RejectNegative Joined Var(rs6000_ Vector library ABI to use mvsx -Target Report Mask(VSX) Save +Target Report Mask(VSX) TargetName Var(rs6000_flags) Use vector/scalar (VSX) instructions mvsx-scalar-double @@ -211,11 +219,11 @@ Target Undocumented Report Var(TARGET_VE ; Explicitly control whether we vectorize the builtins or not. mno-update -Target Report RejectNegative Mask(NO_UPDATE) Save +Target Report RejectNegative Mask(NO_UPDATE) TargetName Var(rs6000_flags) Do not generate load/store with update instructions mupdate -Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) +Target Report RejectNegative InverseMask(NO_UPDATE, UPDATE) TargetName Var(rs6000_flags) Generate load/store with update instructions msingle-pic-base @@ -258,7 +266,7 @@ Target Report RejectNegative Joined Var( Generate software reciprocal divide and square root for better throughput. mrecip-precision -Target Report Mask(RECIP_PRECISION) Save +Target Report Mask(RECIP_PRECISION) TargetName Var(rs6000_flags) Assume that the reciprocal estimate instructions provide more accuracy. mno-fp-in-toc @@ -285,7 +293,7 @@ Place symbol+offset constants in TOC ; This is at the cost of having 2 extra loads and one extra store per ; function, and one less allocable register. mminimal-toc -Target Report Mask(MINIMAL_TOC) +Target Report Mask(MINIMAL_TOC) TargetName Var(rs6000_flags) Use only one TOC entry per procedure mfull-toc @@ -309,7 +317,7 @@ Target Report Var(rs6000_block_move_inli Specify how many bytes should be moved inline before calling out to memcpy/memmove misel -Target Report Mask(ISEL) Save +Target Report Mask(ISEL) TargetName Var(rs6000_flags) Generate isel instructions misel=no Index: gcc/config/rs6000/darwin.opt =================================================================== --- gcc/config/rs6000/darwin.opt (revision 192400) +++ gcc/config/rs6000/darwin.opt (working copy) @@ -34,9 +34,9 @@ findirect-data Driver RejectNegative Alias(mfix-and-continue) m64 -Target RejectNegative Negative(m32) Mask(64BIT) +Target RejectNegative Negative(m32) Mask(64BIT) TargetName Var(rs6000_flags) Generate 64-bit code m32 -Target RejectNegative Negative(m64) InverseMask(64BIT) +Target RejectNegative Negative(m64) InverseMask(64BIT) TargetName Var(rs6000_flags) Generate 32-bit code Index: gcc/config/rs6000/aix64.opt =================================================================== --- gcc/config/rs6000/aix64.opt (revision 192400) +++ gcc/config/rs6000/aix64.opt (working copy) @@ -20,11 +20,11 @@ ; . maix64 -Target Report RejectNegative Negative(maix32) Mask(64BIT) +Target Report RejectNegative Negative(maix32) Mask(64BIT) TargetName Var(rs6000_flags) Compile for 64-bit pointers maix32 -Target Report RejectNegative Negative(maix64) InverseMask(64BIT) +Target Report RejectNegative Negative(maix64) InverseMask(64BIT) TargetName Var(rs6000_flags) Compile for 32-bit pointers mpe Index: gcc/config/rs6000/sysv4.opt =================================================================== --- gcc/config/rs6000/sysv4.opt (revision 192400) +++ gcc/config/rs6000/sysv4.opt (working copy) @@ -49,12 +49,12 @@ Target Report Var(TARGET_NO_BITFIELD_TYP Align to the base type of the bit-field mstrict-align -Target Report Mask(STRICT_ALIGN) +Target Report Mask(STRICT_ALIGN) TargetName Var(rs6000_flags) Align to the base type of the bit-field Don't assume that unaligned accesses are handled by the system mrelocatable -Target Report Mask(RELOCATABLE) +Target Report Mask(RELOCATABLE) TargetName Var(rs6000_flags) Produce code relocatable at runtime mrelocatable-lib @@ -62,19 +62,19 @@ Target Produce code relocatable at runtime mlittle-endian -Target Report RejectNegative Mask(LITTLE_ENDIAN) +Target Report RejectNegative Mask(LITTLE_ENDIAN) TargetName Var(rs6000_flags) Produce little endian code mlittle -Target Report RejectNegative Mask(LITTLE_ENDIAN) +Target Report RejectNegative Mask(LITTLE_ENDIAN) TargetName Var(rs6000_flags) Produce little endian code mbig-endian -Target Report RejectNegative InverseMask(LITTLE_ENDIAN) +Target Report RejectNegative InverseMask(LITTLE_ENDIAN) TargetName Var(rs6000_flags) Produce big endian code mbig -Target Report RejectNegative InverseMask(LITTLE_ENDIAN) +Target Report RejectNegative InverseMask(LITTLE_ENDIAN) TargetName Var(rs6000_flags) Produce big endian code ;; FIXME: This does nothing. What should be done? @@ -96,7 +96,7 @@ Target RejectNegative no description yet meabi -Target Report Mask(EABI) +Target Report Mask(EABI) TargetName Var(rs6000_flags) Use EABI mbit-word @@ -138,11 +138,11 @@ Target RejectNegative no description yet m64 -Target Report RejectNegative Negative(m32) Mask(64BIT) +Target Report RejectNegative Negative(m32) Mask(64BIT) TargetName Var(rs6000_flags) Generate 64-bit code m32 -Target Report RejectNegative Negative(m64) InverseMask(64BIT) +Target Report RejectNegative Negative(m64) InverseMask(64BIT) TargetName Var(rs6000_flags) Generate 32-bit code mnewlib Index: gcc/config/rs6000/rs6000.c =================================================================== --- gcc/config/rs6000/rs6000.c (revision 192400) +++ gcc/config/rs6000/rs6000.c (working copy) @@ -1845,10 +1845,10 @@ rs6000_debug_reg_global (void) fprintf (stderr, DEBUG_FMT_S, "tune", ""); cl_target_option_save (&cl_opts, &global_options); - rs6000_print_isa_options (stderr, 0, "target_flags", target_flags); + rs6000_print_isa_options (stderr, 0, "rs6000_flags", rs6000_flags); - rs6000_print_isa_options (stderr, 0, "target_flags_explicit", - target_flags_explicit); + rs6000_print_isa_options (stderr, 0, "rs6000_flags_explicit", + rs6000_flags_explicit); rs6000_print_builtin_options (stderr, 0, "rs6000_builtin_mask", rs6000_builtin_mask); @@ -2357,21 +2357,21 @@ darwin_rs6000_override_options (void) if (TARGET_64BIT && ! TARGET_POWERPC64) { - target_flags |= MASK_POWERPC64; + rs6000_flags |= MASK_POWERPC64; warning (0, "-m64 requires PowerPC64 architecture, enabling"); } if (flag_mkernel) { rs6000_default_long_calls = 1; - target_flags |= MASK_SOFT_FLOAT; + rs6000_flags |= MASK_SOFT_FLOAT; } /* Make -m64 imply -maltivec. Darwin's 64-bit ABI includes Altivec. */ if (!flag_mkernel && !flag_apple_kext && TARGET_64BIT - && ! (target_flags_explicit & MASK_ALTIVEC)) - target_flags |= MASK_ALTIVEC; + && ! (rs6000_flags_explicit & MASK_ALTIVEC)) + rs6000_flags |= MASK_ALTIVEC; /* Unless the user (not the configurer) has explicitly overridden it with -mcpu=G3 or -mno-altivec, then 10.5+ targets default to @@ -2379,10 +2379,10 @@ darwin_rs6000_override_options (void) if (!flag_mkernel && !flag_apple_kext && strverscmp (darwin_macosx_version_min, "10.5") >= 0 - && ! (target_flags_explicit & MASK_ALTIVEC) + && ! (rs6000_flags_explicit & MASK_ALTIVEC) && ! global_options_set.x_rs6000_cpu_index) { - target_flags |= MASK_ALTIVEC; + rs6000_flags |= MASK_ALTIVEC; } } #endif @@ -2395,9 +2395,9 @@ darwin_rs6000_override_options (void) #endif /* Return the builtin mask of the various options used that could affect which - builtins were used. In the past we used target_flags, but we've run out of + builtins were used. In the past we used rs6000_flags, but we've run out of bits, and some options like SPE and PAIRED are no longer in - target_flags. */ + rs6000_flags. */ HOST_WIDE_INT rs6000_builtin_mask_calculate (void) @@ -2474,7 +2474,7 @@ rs6000_option_override_internal (bool gl #endif /* Don't override by the processor default if given explicitly. */ - set_masks &= ~target_flags_explicit; + set_masks &= ~rs6000_flags_explicit; /* Process the -mcpu= and -mtune= argument. If the user changed the cpu in a target attribute or pragma, but did not specify a tuning @@ -2512,13 +2512,13 @@ rs6000_option_override_internal (bool gl TARGET_DEFAULT. */ if (have_cpu) { - target_flags &= ~set_masks; - target_flags |= (processor_target_table[cpu_index].target_enable + rs6000_flags &= ~set_masks; + rs6000_flags |= (processor_target_table[cpu_index].target_enable & set_masks); } else - target_flags |= (processor_target_table[cpu_index].target_enable - & ~target_flags_explicit); + rs6000_flags |= (processor_target_table[cpu_index].target_enable + & ~rs6000_flags_explicit); if (rs6000_tune_index >= 0) tune_index = rs6000_tune_index; @@ -2603,7 +2603,7 @@ rs6000_option_override_internal (bool gl use instructions that would be microcoded on the Cell, use the load/store multiple and string instructions. */ if (BYTES_BIG_ENDIAN && optimize_size && rs6000_gen_cell_microcode) - target_flags |= ~target_flags_explicit & (MASK_MULTIPLE | MASK_STRING); + rs6000_flags |= ~rs6000_flags_explicit & (MASK_MULTIPLE | MASK_STRING); /* Don't allow -mmultiple or -mstring on little endian systems unless the cpu is a 750, because the hardware doesn't support the @@ -2615,15 +2615,15 @@ rs6000_option_override_internal (bool gl { if (TARGET_MULTIPLE) { - target_flags &= ~MASK_MULTIPLE; - if ((target_flags_explicit & MASK_MULTIPLE) != 0) + rs6000_flags &= ~MASK_MULTIPLE; + if ((rs6000_flags_explicit & MASK_MULTIPLE) != 0) warning (0, "-mmultiple is not supported on little endian systems"); } if (TARGET_STRING) { - target_flags &= ~MASK_STRING; - if ((target_flags_explicit & MASK_STRING) != 0) + rs6000_flags &= ~MASK_STRING; + if ((rs6000_flags_explicit & MASK_STRING) != 0) warning (0, "-mstring is not supported on little endian systems"); } } @@ -2635,10 +2635,10 @@ rs6000_option_override_internal (bool gl if (!TARGET_HARD_FLOAT || !TARGET_FPRS || !TARGET_SINGLE_FLOAT || !TARGET_DOUBLE_FLOAT) { - if (target_flags_explicit & MASK_VSX) + if (rs6000_flags_explicit & MASK_VSX) msg = N_("-mvsx requires hardware floating point"); else - target_flags &= ~ MASK_VSX; + rs6000_flags &= ~ MASK_VSX; } else if (TARGET_PAIRED_FLOAT) msg = N_("-mvsx and -mpaired are incompatible"); @@ -2649,9 +2649,9 @@ rs6000_option_override_internal (bool gl msg = N_("-mvsx used with little endian code"); else if (TARGET_AVOID_XFORM > 0) msg = N_("-mvsx needs indexed addressing"); - else if (!TARGET_ALTIVEC && (target_flags_explicit & MASK_ALTIVEC)) + else if (!TARGET_ALTIVEC && (rs6000_flags_explicit & MASK_ALTIVEC)) { - if (target_flags_explicit & MASK_VSX) + if (rs6000_flags_explicit & MASK_VSX) msg = N_("-mvsx and -mno-altivec are incompatible"); else msg = N_("-mno-altivec disables vsx"); @@ -2660,27 +2660,27 @@ rs6000_option_override_internal (bool gl if (msg) { warning (0, msg); - target_flags &= ~ MASK_VSX; - target_flags_explicit |= MASK_VSX; + rs6000_flags &= ~ MASK_VSX; + rs6000_flags_explicit |= MASK_VSX; } } /* For the newer switches (vsx, dfp, etc.) set some of the older options, unless the user explicitly used the -mno-