From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 30564 invoked by alias); 23 Nov 2013 05:22:54 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 30555 invoked by uid 89); 23 Nov 2013 05:22:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.8 required=5.0 tests=AWL,BAYES_05,FREEMAIL_FROM,RDNS_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: mail-pd0-f176.google.com Received: from Unknown (HELO mail-pd0-f176.google.com) (209.85.192.176) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Sat, 23 Nov 2013 05:22:52 +0000 Received: by mail-pd0-f176.google.com with SMTP id w10so2202870pde.21 for ; Fri, 22 Nov 2013 21:22:44 -0800 (PST) X-Received: by 10.68.189.34 with SMTP id gf2mr6362354pbc.91.1385184164564; Fri, 22 Nov 2013 21:22:44 -0800 (PST) Received: from bubble.grove.modra.org ([101.166.26.37]) by mx.google.com with ESMTPSA id ql10sm57283641pbc.44.2013.11.22.21.22.41 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 22 Nov 2013 21:22:43 -0800 (PST) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id C4BC7EA0069; Sat, 23 Nov 2013 15:52:38 +1030 (CST) Date: Sat, 23 Nov 2013 16:48:00 -0000 From: Alan Modra To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, pthaugen@us.ibm.com, bergner@vnet.ibm.com, Bill Schmidt Subject: Re: [PATCH, rs6000] power8 patches, revised patch #8, power8 load fusion Message-ID: <20131123052238.GJ3588@bubble.grove.modra.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com, pthaugen@us.ibm.com, bergner@vnet.ibm.com, Bill Schmidt References: <20130520204053.GA21090@ibm-tiger.the-meissners.org> <20130522205258.GA11470@ibm-tiger.the-meissners.org> <20130729183927.GA11877@ibm-tiger.the-meissners.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20130729183927.GA11877@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes X-SW-Source: 2013-11/txt/msg02990.txt.bz2 Hi Mike, As discussed on irc, I'm applying the following as obvious to fix a bug in the vsx fusion peepholes. The bug is simply that the peepholes are enabled when -mno-vsx, which leads to replacing RTL that would emit lvx insns with RTL that emits lxvw4x or lxvd2x. This is clearly wrong, and worse, on LE causes permution of register words. I was originally going to disable the peepholes entirely for little-endian but on further thought decided this wasn't necessary: If TARGET_VSX the original RTL insns these patterns match would emit vsx loads anyway. If that changes in the future, ie. someone decides that vmx loads are better on little-endian than vsx loads, then we'll need to disable these peepholes for little-endian.. Bootstrapped and regression tested powerpc64-linux and powerpc64le-linux. Fixes the following on powerpc64le-linux (where power8 is now the default). -FAIL: gcc.dg/vmx/3c-01.c -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects execution test -FAIL: gcc.dg/vmx/varargs-4.c -O1 execution test -FAIL: gcc.target/powerpc/ppc64-abi-2.c execution test -FAIL: gfortran.fortran-torture/execute/constructor.f90 execution, -O2 -ftree-vectorize -maltivec -FAIL: gfortran.fortran-torture/execute/elemental.f90 execution, -O2 -ftree-vectorize -maltivec -FAIL: gfortran.fortran-torture/execute/forall_4.f90 execution, -O2 -ftree-vectorize -maltivec -FAIL: gfortran.fortran-torture/execute/in-pack.f90 execution, -O2 -ftree-vectorize -maltivec * config/rs6000/vsx.md (fusion peepholes): Disable when !TARGET_VSX. Index: gcc/config/rs6000/vsx.md =================================================================== --- gcc/config/rs6000/vsx.md (revision 205244) +++ gcc/config/rs6000/vsx.md (working copy) @@ -1895,7 +1895,7 @@ (set (match_operand:VSX_M2 2 "vsx_register_operand" "") (mem:VSX_M2 (plus:P (match_dup 0) (match_operand:P 3 "int_reg_operand" ""))))] - "TARGET_P8_FUSION" + "TARGET_VSX && TARGET_P8_FUSION" "li %0,%1\t\t\t# vector load fusion\;lxx %x2,%0,%3" [(set_attr "length" "8") (set_attr "type" "vecload")]) @@ -1906,7 +1906,7 @@ (set (match_operand:VSX_M2 2 "vsx_register_operand" "") (mem:VSX_M2 (plus:P (match_operand:P 3 "int_reg_operand" "") (match_dup 0))))] - "TARGET_P8_FUSION" + "TARGET_VSX && TARGET_P8_FUSION" "li %0,%1\t\t\t# vector load fusion\;lxx %x2,%0,%3" [(set_attr "length" "8") (set_attr "type" "vecload")]) -- Alan Modra Australia Development Lab, IBM