[PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Kirill Yukhin]

[-- Attachment #1: Type: text/plain, Size: 70066 bytes --]

Hello,

This patch introduces new intrinsics with corresponding
expanding in i386.c. New builtins were added to the bdesc_args
and bdesc_round_args tables.  For special cases we created new expanders:
ix86_expand_round_builtin and ix86_erase_embedded_rounding for
instructions with rounding, ix86_expand_sse_comi_round for comi instructions.  In
ix86_expand_special_args_builtin we supported kortest instruction, and new
GATHERs in the subroutine gather_gen. Also scatter_gen for SCATTERs was created
analogous to gather_gen.


Patch is big, so I am sending it as bzip2-ed attachement.
I think most interesting is expanding of scatters and rounding
intrinsics. Rest - is straightforward.

Testing:
  1. Bootstrap pass.
  2. make check shows no regressions.
  3. Spec 2000 & 2006 build show no regressions both with and without -mavx512f option.
  4. Spec 2000 & 2006 run shows no stability regressions without -mavx512f option.

Ok for trunk?

ChangeLog entry:
2013-11-18  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* config.gcc (extra_headers): Add avx512fintrin.h, avx512cdintrin.h,
	avx512erintrin.h, avx512pfintrin.h.
	* config/i386/avx512cdintrin.h: New file.
	* config/i386/avx512erintrin.h: New file.
	* config/i386/avx512fintrin.h: New file.
	* config/i386/avx512pfintrin.h: New file.
	* config/i386/i386-builtin-types.def: Add V16UHI, V32SF, V16SF, V8DF,
	V8DI, V16SI, V64QI, PV8DF, PV8DI, PV16SI, PV16SF, PCV8DF, PCV16SF,
	PCV8DI, PCV16SI, V16QI_FTYPE_V16SI, V8DF_FTYPE_V8SI, V8DF_FTYPE_V8DF,
	V8HI_FTYPE_V8DI, V16SF_FTYPE_V16SF, V8SI_FTYPE_V8DI, V8SF_FTYPE_V8DF,
	V8SF_FTYPE_V8DF_V8SF_QI, V16HI_FTYPE_V16SI, V16SF_FTYPE_FLOAT,
	V16SI_FTYPE_INT, V8DF_FTYPE_DOUBLE, V8DI_FTYPE_INT64,
	V16SF_FTYPE_V4SF, V8DF_FTYPE_V4DF, V8DI_FTYPE_V4DI, V16QI_FTYPE_V8DI,
	UINT_FTYPE_V4SF, UINT64_FTYPE_V4SF, UINT_FTYPE_V2DF,
	UINT64_FTYPE_V2DF, V16SI_FTYPE_V16SI, V16SI_FTYPE_V16SI_V16SI_HI,
	V8DI_FTYPE_V8DI, V8DI_FTYPE_V8DI_V8DI_QI, V16SI_FTYPE_PV4SI,
	V16SF_FTYPE_PV4SF, V8DI_FTYPE_PV4DI, V8DF_FTYPE_PV4DF,
	V8UHI_FTYPE_V8UHI, V8USI_FTYPE_V8USI, V2DF_FTYPE_V2DF_UINT,
	V2DF_FTYPE_V2DF_UINT64, V4DF_FTYPE_V8DF_INT,
	V4DF_FTYPE_V8DF_INT_V4DF_QI, V8DF_FTYPE_V8DF_V8DI,
	V4SF_FTYPE_V4SF_UINT, V4SF_FTYPE_V4SF_UINT64,
	INT_FTYPE_V4SF_V4SF_INT_INT, INT_FTYPE_V2DF_V2DF_INT_INT,
	V16SF_FTYPE_V16SF_INT, V4SF_FTYPE_V16SF_INT,
	V4SF_FTYPE_V16SF_INT_V4SF_QI, V16SF_FTYPE_V16SF_V16SF,
	V16SF_FTYPE_V16SF_V16SI, V8DF_FTYPE_V8DF_V4DF_INT_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DF_INT_V8DF_QI, V8DF_FTYPE_V8DF_INT_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DF_V8DI_INT_QI_INT, V8DF_FTYPE_V8DF_V8DF,
	V16SF_FTYPE_V16SF_V16SF_INT, V16SF_FTYPE_V16SF_V16SF_INT_V16SF_HI,
	V16SF_FTYPE_V16SF_INT_V16SF_HI, V16SI_FTYPE_V16SI_V4SI_INT_V16SI_HI,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI,
	V16SF_FTYPE_V16SF_V16SF_V16SI_INT_HI_INT,
	V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI,
	V4SF_FTYPE_V4SF_V4SF_V4SI_INT_QI_INT,
	V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI,
	V2DF_FTYPE_V2DF_V2DF_V2DI_INT_QI_INT, V16SF_FTYPE_V16SF_V4SF_INT,
	V16SF_FTYPE_V16SF_V4SF_INT_V16SF_HI, V16HI_FTYPE_V16SF_INT,
	V16HI_FTYPE_V16SF_INT_V16HI_HI, V16HI_FTYPE_V16HI_V16HI_INT_V16HI_HI,
	V16SI_FTYPE_V16SI_V4SI, V16SI_FTYPE_V16SI_V4SI_INT,
	V4SI_FTYPE_V16SI_INT, V4SI_FTYPE_V16SI_INT_V4SI_QI,
	V16SI_FTYPE_V16SI_V16SI, V16SI_FTYPE_V16SI_V16SI_INT_V16SI_HI,
	V16SI_FTYPE_V16SI_SI, V16SI_FTYPE_V16SI_INT,
	V16SI_FTYPE_V16SI_V4SI_V16SI_HI, V16SI_FTYPE_V16SI_INT_V16SI_HI,
	V8DI_FTYPE_V8DI_V8DI, V16SI_FTYPE_V8DF_V8DF,
	V8DI_FTYPE_V8DI_V8DI_INT_V8DI_QI, V8DI_FTYPE_V8DI_V4DI_INT_V8DI_QI,
	V8DI_FTYPE_V8DI_V2DI, V4DI_FTYPE_V8DI_INT,
	V4DI_FTYPE_V8DI_INT_V4DI_QI, V8DI_FTYPE_V8DI_V2DI_V8DI_QI,
	V8DI_FTYPE_V8DI_INT_V8DI_QI, VOID_FTYPE_PDOUBLE_V8DF,
	VOID_FTYPE_PFLOAT_V16SF, VOID_FTYPE_PV8DI_V8DI, HI_FTYPE_HI,
	HI_FTYPE_HI_HI, HI_FTYPE_HI_INT, QI_FTYPE_V8DI_V8DI,
	QI_FTYPE_V8DI_V8DI_QI, HI_FTYPE_V16SI_V16SI, HI_FTYPE_V16SI_V16SI_HI,
	QI_FTYPE_V8DI_V8DI_INT, QI_FTYPE_V8DI_V8DI_INT_QI,
	HI_FTYPE_V16SI_V16SI_INT, HI_FTYPE_V16SI_V16SI_INT ,HI,
	QI_FTYPE_V8DF_V8DF_INT, QI_FTYPE_V8DF_V8DF_INT_QI,
	QI_FTYPE_V8DF_V8DF_INT_QI_INT, HI_FTYPE_V16SF_V16SF_INT,
	HI_FTYPE_V16SF_V16SF_INT_HI, HI_FTYPE_V16SF_V16SF_INT_HI_INT,
	QI_FTYPE_V2DF_V2DF_INT, QI_FTYPE_V2DF_V2DF_INT_QI,
	QI_FTYPE_V2DF_V2DF_INT_QI_INT, QI_FTYPE_V4SF_V4SF_INT,
	QI_FTYPE_V4SF_V4SF_INT_QI, QI_FTYPE_V4SF_V4SF_INT_QI_INT,
	V16SI_FTYPE_HI, V8DI_FTYPE_QI, V8DF_FTYPE_V8DF_V8DF_V8DF,
	V16SF_FTYPE_V16SF_V16SF_V16SF, V8DF_FTYPE_V8DF_V8DF_QI,
	V8DF_FTYPE_V8SF_V8DF_QI, V8DF_FTYPE_V8SI_V8DF_QI,
	V8DI_FTYPE_V8SI_V8DI_QI, V8DI_FTYPE_V8HI_V8DI_QI,
	V8DI_FTYPE_V16QI_V8DI_QI, V8DI_FTYPE_V8DI_V8DI_V8DI_QI,
	V8DF_FTYPE_V8DI_V8DF_V8DF, V8DF_FTYPE_V8DI_V8DF_V8DF_QI,
	V8DF_FTYPE_V8DF_V8DI_V8DF_QI, V8DF_FTYPE_V8DF_V8DF_V8DF_QI,
	V16SI_FTYPE_V16SI_V16SI_V16SI_HI, V2DF_FTYPE_V2DF_V2DF_V2DF_QI,
	V2DF_FTYPE_V2DF_V4SF_V2DF_QI, V16SF_FTYPE_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SI_V16SF_HI, V16SF_FTYPE_V16SF_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SI_V16SF_V16SF, V16SF_FTYPE_V16SI_V16SF_V16SF_HI,
	V16SF_FTYPE_V16SF_V16SI_V16SF_HI, V4SF_FTYPE_V4SF_V2DF_V4SF_QI,
	V4SF_FTYPE_V4SF_V4SF_V4SF_QI, V16SF_FTYPE_V4SF_V16SF_HI,
	V8DF_FTYPE_V4DF_V8DF_QI, V8DF_FTYPE_V2DF_V8DF_QI,
	V16SI_FTYPE_V4SI_V16SI_HI, V16SI_FTYPE_SI_V16SI_HI,
	V16SI_FTYPE_V16HI_V16SI_HI, V16SI_FTYPE_V16QI_V16SI_HI,
	V8SI_FTYPE_V8DF_V8SI_QI, V8DI_FTYPE_V4DI_V8DI_QI,
	V8DI_FTYPE_V2DI_V8DI_QI, V8DI_FTYPE_DI_V8DI_QI,
	V16SF_FTYPE_PCV16SF_V16SF_HI, V8DF_FTYPE_PCV8DF_V8DF_QI,
	V16SI_FTYPE_PCV16SI_V16SI_HI, V8DI_FTYPE_PCV8DI_V8DI_QI,
	V2DF_FTYPE_PCDOUBLE_V2DF_QI, V4SF_FTYPE_PCFLOAT_V4SF_QI,
	V16QI_FTYPE_V16SI_V16QI_HI, V16HI_FTYPE_V16SI_V16HI_HI,
	V8SI_FTYPE_V8DI_V8SI_QI, V8HI_FTYPE_V8DI_V8HI_QI,
	V16QI_FTYPE_V8DI_V16QI_QI, VOID_FTYPE_PV8DF_V8DF_QI,
	VOID_FTYPE_PV16SF_V16SF_HI, VOID_FTYPE_PV8DI_V8DI_QI,
	VOID_FTYPE_PV16SI_V16SI_HI, VOID_FTYPE_PDOUBLE_V2DF_QI,
	VOID_FTYPE_PFLOAT_V4SF_QI, V16SI_FTYPE_V16SF_V16SI_HI,
	V8DI_FTYPE_V8DI_V8DI_V8DI_INT_QI,
	V16SI_FTYPE_V16SI_V16SI_V16SI_INT_HI, V8DI_FTYPE_V8DI_V8DI_V8DI,
	V16SI_FTYPE_V16SI_V16SI_V16SI, V8DF_FTYPE_V8DF_V8DI_V8DF,
	V16SF_FTYPE_V16SF_V16SI_V16SF, V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI,
	V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI, V8DI_FTYPE_V16SI_V16SI_V8DI_QI,
	UINT64_FTYPE_V2DF_INT, UINT64_FTYPE_V4SF_INT, UINT_FTYPE_V2DF_INT,
	UINT_FTYPE_V4SF_INT, INT64_FTYPE_V2DF_INT, INT64_FTYPE_V4SF_INT,
	INT_FTYPE_V2DF_INT, INT_FTYPE_V4SF_INT, V2DF_FTYPE_V2DF_UINT64_INT,
	V4SF_FTYPE_V4SF_UINT64_INT, V4SF_FTYPE_V4SF_UINT_INT,
	V2DF_FTYPE_V2DF_INT64_INT, V4SF_FTYPE_V4SF_INT64_INT,
	V4SF_FTYPE_V4SF_INT_INT, V16SI_FTYPE_V16SF_V16SI_HI_INT,
	V16SF_FTYPE_V16SI_V16SF_HI_INT, V16SF_FTYPE_V16SF_V16SF_HI_INT,
	V16SF_FTYPE_V16HI_V16SF_HI_INT, V8SI_FTYPE_V8DF_V8SI_QI_INT,
	V8SF_FTYPE_V8DF_V8SF_QI_INT, V8DF_FTYPE_V8DF_V8DF_QI_INT,
	V8DF_FTYPE_V8SF_V8DF_QI_INT, V16SF_FTYPE_V16SF_V16SF_V16SF_HI_INT,
	V8DF_FTYPE_V8DF_V8DF_V8DF_QI_INT, V4SF_FTYPE_V4SF_V4SF_V4SF_QI_INT,
	V4SF_FTYPE_V4SF_V2DF_V4SF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_QI_INT,
	V2DF_FTYPE_V2DF_V4SF_V2DF_QI_INT, V2DF_FTYPE_V2DF_V2DF_V2DF_INT,
	V16SF_FTYPE_V16SF_INT_V16SF_HI_INT, V8DF_FTYPE_V8DF_INT_V8DF_QI_INT,
	V4SF_FTYPE_V4SF_V4SF_INT_V4SF_QI_INT,
	V2DF_FTYPE_V2DF_V2DF_INT_V2DF_QI_INT, V8DI_FTYPE_V8DI_SI_V8DI_V8DI,
	V16SF_FTYPE_V16SF_PCFLOAT_V16SI_HI_INT,
	V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V8SI_QI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT,
	V8SF_FTYPE_V8SF_PCFLOAT_V8DI_QI_INT,
	V8DF_FTYPE_V8DF_PCDOUBLE_V8DI_QI_INT,
	V16SI_FTYPE_V16SI_PCINT_V16SI_HI_INT,
	V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V8SI_QI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT,
	V8SI_FTYPE_V8SI_PCINT_V8DI_QI_INT,
	V8DI_FTYPE_V8DI_PCINT64_V8DI_QI_INT,
	VOID_FTYPE_PFLOAT_HI_V16SI_V16SF_INT,
	VOID_FTYPE_PDOUBLE_QI_V8SI_V8DF_INT,
	VOID_FTYPE_PFLOAT_QI_V8DI_V8SF_INT,
	VOID_FTYPE_PDOUBLE_QI_V8DI_V8DF_INT,
	VOID_FTYPE_PINT_HI_V16SI_V16SI_INT,
	VOID_FTYPE_PLONGLONG_QI_V8SI_V8DI_INT,
	VOID_FTYPE_PINT_QI_V8DI_V8SI_INT,
	VOID_FTYPE_PLONGLONG_QI_V8DI_V8DI_INT,
	VOID_FTYPE_HI_V16SI_PCINT_INT_INT, VOID_FTYPE_QI_V8DI_PCINT_INT_INT.
	(ALIAS): Add DEF_FUNCTION_TYPE_ALIAS (V16SI_FTYPE_V8DF_V8DF, ROUND).
	* config/i386/i386.c (enum ix86_builtins): Add IX86_BUILTIN_ADDPD512,
	IX86_BUILTIN_ADDPS512, IX86_BUILTIN_ADDSD_MASK,
	IX86_BUILTIN_ADDSS_MASK, IX86_BUILTIN_ALIGND512,
	IX86_BUILTIN_ALIGNQ512, IX86_BUILTIN_BLENDMD512,
	IX86_BUILTIN_BLENDMPD512, IX86_BUILTIN_BLENDMPS512,
	IX86_BUILTIN_BLENDMQ512, IX86_BUILTIN_BROADCASTF32X4_512,
	IX86_BUILTIN_BROADCASTF64X4_512, IX86_BUILTIN_BROADCASTI32X4_512,
	IX86_BUILTIN_BROADCASTI64X4_512, IX86_BUILTIN_BROADCASTSD512,
	IX86_BUILTIN_BROADCASTSS512, IX86_BUILTIN_CMPD512,
	IX86_BUILTIN_CMPPD512, IX86_BUILTIN_CMPPS512, IX86_BUILTIN_CMPQ512,
	IX86_BUILTIN_CMPSD_MASK, IX86_BUILTIN_CMPSS_MASK, IX86_BUILTIN_COMIDF,
	IX86_BUILTIN_COMISF, IX86_BUILTIN_COMPRESSPD512,
	IX86_BUILTIN_COMPRESSPDSTORE512, IX86_BUILTIN_COMPRESSPS512,
	IX86_BUILTIN_COMPRESSPSSTORE512, IX86_BUILTIN_CVTDQ2PD512,
	IX86_BUILTIN_CVTDQ2PS512, IX86_BUILTIN_CVTPD2DQ512,
	IX86_BUILTIN_CVTPD2PS512, IX86_BUILTIN_CVTPD2UDQ512,
	IX86_BUILTIN_CVTPH2PS512, IX86_BUILTIN_CVTPS2DQ512,
	IX86_BUILTIN_CVTPS2PD512, IX86_BUILTIN_CVTPS2PH512,
	IX86_BUILTIN_CVTPS2UDQ512, IX86_BUILTIN_CVTSD2SS_MASK,
	IX86_BUILTIN_CVTSI2SD64, IX86_BUILTIN_CVTSI2SS32,
	IX86_BUILTIN_CVTSI2SS64, IX86_BUILTIN_CVTSS2SD_MASK,
	IX86_BUILTIN_CVTTPD2DQ512, IX86_BUILTIN_CVTTPD2UDQ512,
	IX86_BUILTIN_CVTTPS2DQ512, IX86_BUILTIN_CVTTPS2UDQ512,
	IX86_BUILTIN_CVTUDQ2PD512, IX86_BUILTIN_CVTUDQ2PS512,
	IX86_BUILTIN_CVTUSI2SD32, IX86_BUILTIN_CVTUSI2SD64,
	IX86_BUILTIN_CVTUSI2SS32, IX86_BUILTIN_CVTUSI2SS64,
	IX86_BUILTIN_DIVPD512, IX86_BUILTIN_DIVPS512, IX86_BUILTIN_DIVSD_MASK,
	IX86_BUILTIN_DIVSS_MASK, IX86_BUILTIN_EXPANDPD512,
	IX86_BUILTIN_EXPANDPD512Z, IX86_BUILTIN_EXPANDPDLOAD512,
	IX86_BUILTIN_EXPANDPDLOAD512Z, IX86_BUILTIN_EXPANDPS512,
	IX86_BUILTIN_EXPANDPS512Z, IX86_BUILTIN_EXPANDPSLOAD512,
	IX86_BUILTIN_EXPANDPSLOAD512Z, IX86_BUILTIN_EXTRACTF32X4,
	IX86_BUILTIN_EXTRACTF64X4, IX86_BUILTIN_EXTRACTI32X4,
	IX86_BUILTIN_EXTRACTI64X4, IX86_BUILTIN_FIXUPIMMPD512_MASK,
	IX86_BUILTIN_FIXUPIMMPD512_MASKZ, IX86_BUILTIN_FIXUPIMMPS512_MASK,
	IX86_BUILTIN_FIXUPIMMPS512_MASKZ, IX86_BUILTIN_FIXUPIMMSD128_MASK,
	IX86_BUILTIN_FIXUPIMMSD128_MASKZ, IX86_BUILTIN_FIXUPIMMSS128_MASK,
	IX86_BUILTIN_FIXUPIMMSS128_MASKZ, IX86_BUILTIN_GETEXPPD512,
	IX86_BUILTIN_GETEXPPS512, IX86_BUILTIN_GETEXPSD128,
	IX86_BUILTIN_GETEXPSS128, IX86_BUILTIN_GETMANTPD512,
	IX86_BUILTIN_GETMANTPS512, IX86_BUILTIN_GETMANTSD128,
	IX86_BUILTIN_GETMANTSS128, IX86_BUILTIN_INSERTF32X4,
	IX86_BUILTIN_INSERTF64X4, IX86_BUILTIN_INSERTI32X4,
	IX86_BUILTIN_INSERTI64X4, IX86_BUILTIN_LOADAPD512,
	IX86_BUILTIN_LOADAPS512, IX86_BUILTIN_LOADDQUDI512,
	IX86_BUILTIN_LOADDQUSI512, IX86_BUILTIN_LOADSD, IX86_BUILTIN_LOADSS,
	IX86_BUILTIN_LOADUPD512, IX86_BUILTIN_LOADUPS512,
	IX86_BUILTIN_MAXPD512, IX86_BUILTIN_MAXPS512, IX86_BUILTIN_MAXSD_MASK,
	IX86_BUILTIN_MAXSS_MASK, IX86_BUILTIN_MINPD512, IX86_BUILTIN_MINPS512,
	IX86_BUILTIN_MINSD_MASK, IX86_BUILTIN_MINSS_MASK,
	IX86_BUILTIN_MOVAPD512, IX86_BUILTIN_MOVAPS512,
	IX86_BUILTIN_MOVDDUP512, IX86_BUILTIN_MOVDQA32LOAD512,
	IX86_BUILTIN_MOVDQA32STORE512, IX86_BUILTIN_MOVDQA32_512,
	IX86_BUILTIN_MOVDQA64LOAD512, IX86_BUILTIN_MOVDQA64STORE512,
	IX86_BUILTIN_MOVDQA64_512, IX86_BUILTIN_MOVESD, IX86_BUILTIN_MOVESS,
	IX86_BUILTIN_MOVNTDQ512, IX86_BUILTIN_MOVNTPD512,
	IX86_BUILTIN_MOVNTPS512, IX86_BUILTIN_MOVSHDUP512,
	IX86_BUILTIN_MOVSLDUP512, IX86_BUILTIN_MULPD512,
	IX86_BUILTIN_MULPS512, IX86_BUILTIN_MULSD_MASK,
	IX86_BUILTIN_MULSS_MASK, IX86_BUILTIN_PABSD512, IX86_BUILTIN_PABSQ512,
	IX86_BUILTIN_PADDD512, IX86_BUILTIN_PADDQ512, IX86_BUILTIN_PANDD512,
	IX86_BUILTIN_PANDND512, IX86_BUILTIN_PANDNQ512, IX86_BUILTIN_PANDQ512,
	IX86_BUILTIN_PBROADCASTD512, IX86_BUILTIN_PBROADCASTD512_GPR,
	IX86_BUILTIN_PBROADCASTMB512, IX86_BUILTIN_PBROADCASTMW512,
	IX86_BUILTIN_PBROADCASTQ512, IX86_BUILTIN_PBROADCASTQ512_GPR,
	IX86_BUILTIN_PBROADCASTQ512_MEM, IX86_BUILTIN_PCMPEQD512_MASK,
	IX86_BUILTIN_PCMPEQQ512_MASK, IX86_BUILTIN_PCMPGTD512_MASK,
	IX86_BUILTIN_PCMPGTQ512_MASK, IX86_BUILTIN_PCOMPRESSD512,
	IX86_BUILTIN_PCOMPRESSDSTORE512, IX86_BUILTIN_PCOMPRESSQ512,
	IX86_BUILTIN_PCOMPRESSQSTORE512, IX86_BUILTIN_PEXPANDD512,
	IX86_BUILTIN_PEXPANDD512Z, IX86_BUILTIN_PEXPANDDLOAD512,
	IX86_BUILTIN_PEXPANDDLOAD512Z, IX86_BUILTIN_PEXPANDQ512,
	IX86_BUILTIN_PEXPANDQ512Z, IX86_BUILTIN_PEXPANDQLOAD512,
	IX86_BUILTIN_PEXPANDQLOAD512Z, IX86_BUILTIN_PMAXSD512,
	IX86_BUILTIN_PMAXSQ512, IX86_BUILTIN_PMAXUD512,
	IX86_BUILTIN_PMAXUQ512, IX86_BUILTIN_PMINSD512,
	IX86_BUILTIN_PMINSQ512, IX86_BUILTIN_PMINUD512,
	IX86_BUILTIN_PMINUQ512, IX86_BUILTIN_PMOVDB512,
	IX86_BUILTIN_PMOVDW512, IX86_BUILTIN_PMOVQB512,
	IX86_BUILTIN_PMOVQD512, IX86_BUILTIN_PMOVQW512,
	IX86_BUILTIN_PMOVSDB512, IX86_BUILTIN_PMOVSDW512,
	IX86_BUILTIN_PMOVSQB512, IX86_BUILTIN_PMOVSQD512,
	IX86_BUILTIN_PMOVSQW512, IX86_BUILTIN_PMOVSXBD512,
	IX86_BUILTIN_PMOVSXBQ512, IX86_BUILTIN_PMOVSXDQ512,
	IX86_BUILTIN_PMOVSXWD512, IX86_BUILTIN_PMOVSXWQ512,
	IX86_BUILTIN_PMOVUSDB512, IX86_BUILTIN_PMOVUSDW512,
	IX86_BUILTIN_PMOVUSQB512, IX86_BUILTIN_PMOVUSQD512,
	IX86_BUILTIN_PMOVUSQW512, IX86_BUILTIN_PMOVZXBD512,
	IX86_BUILTIN_PMOVZXBQ512, IX86_BUILTIN_PMOVZXDQ512,
	IX86_BUILTIN_PMOVZXWD512, IX86_BUILTIN_PMOVZXWQ512,
	IX86_BUILTIN_PMULDQ512, IX86_BUILTIN_PMULLD512,
	IX86_BUILTIN_PMULUDQ512, IX86_BUILTIN_PORD512, IX86_BUILTIN_PORQ512,
	IX86_BUILTIN_PROLD512, IX86_BUILTIN_PROLQ512, IX86_BUILTIN_PROLVD512,
	IX86_BUILTIN_PROLVQ512, IX86_BUILTIN_PRORD512, IX86_BUILTIN_PRORQ512,
	IX86_BUILTIN_PRORVD512, IX86_BUILTIN_PRORVQ512,
	IX86_BUILTIN_PSHUFD512, IX86_BUILTIN_PSLLD512, IX86_BUILTIN_PSLLDI512,
	IX86_BUILTIN_PSLLQ512, IX86_BUILTIN_PSLLQI512,
	IX86_BUILTIN_PSLLVV16SI, IX86_BUILTIN_PSLLVV8DI,
	IX86_BUILTIN_PSRAD512, IX86_BUILTIN_PSRADI512, IX86_BUILTIN_PSRAQ512,
	IX86_BUILTIN_PSRAQI512, IX86_BUILTIN_PSRAVV16SI,
	IX86_BUILTIN_PSRAVV8DI, IX86_BUILTIN_PSRLD512, IX86_BUILTIN_PSRLDI512,
	IX86_BUILTIN_PSRLQ512, IX86_BUILTIN_PSRLQI512,
	IX86_BUILTIN_PSRLVV16SI, IX86_BUILTIN_PSRLVV8DI,
	IX86_BUILTIN_PSUBD512, IX86_BUILTIN_PSUBQ512, IX86_BUILTIN_PTESTMD512,
	IX86_BUILTIN_PTESTMQ512, IX86_BUILTIN_PTESTNMD512,
	IX86_BUILTIN_PTESTNMQ512, IX86_BUILTIN_PUNPCKHDQ512,
	IX86_BUILTIN_PUNPCKHQDQ512, IX86_BUILTIN_PUNPCKLDQ512,
	IX86_BUILTIN_PUNPCKLQDQ512, IX86_BUILTIN_PXORD512,
	IX86_BUILTIN_PXORQ512, IX86_BUILTIN_RCP14PD512,
	IX86_BUILTIN_RCP14PS512, IX86_BUILTIN_RCP14SD, IX86_BUILTIN_RCP14SS,
	IX86_BUILTIN_RNDSCALEPD, IX86_BUILTIN_RNDSCALEPS,
	IX86_BUILTIN_RNDSCALESD, IX86_BUILTIN_RNDSCALESS,
	IX86_BUILTIN_RSQRT14PD512, IX86_BUILTIN_RSQRT14PS512,
	IX86_BUILTIN_RSQRT14SD, IX86_BUILTIN_RSQRT14SS,
	IX86_BUILTIN_SCALEFPD512, IX86_BUILTIN_SCALEFPS512,
	IX86_BUILTIN_SCALEFSD, IX86_BUILTIN_SCALEFSS, IX86_BUILTIN_SHUFPD512,
	IX86_BUILTIN_SHUFPS512, IX86_BUILTIN_SHUF_F32x4,
	IX86_BUILTIN_SHUF_F64x2, IX86_BUILTIN_SHUF_I32x4,
	IX86_BUILTIN_SHUF_I64x2, IX86_BUILTIN_SQRTPD512,
	IX86_BUILTIN_SQRTPD512_MASK, IX86_BUILTIN_SQRTPS512_MASK,
	IX86_BUILTIN_SQRTPS_NR512, IX86_BUILTIN_SQRTSD_MASK,
	IX86_BUILTIN_SQRTSS_MASK, IX86_BUILTIN_STOREAPD512,
	IX86_BUILTIN_STOREAPS512, IX86_BUILTIN_STOREDQUDI512,
	IX86_BUILTIN_STOREDQUSI512, IX86_BUILTIN_STORESD,
	IX86_BUILTIN_STORESS, IX86_BUILTIN_STOREUPD512,
	IX86_BUILTIN_STOREUPS512, IX86_BUILTIN_SUBPD512,
	IX86_BUILTIN_SUBPS512, IX86_BUILTIN_SUBSD_MASK,
	IX86_BUILTIN_SUBSS_MASK, IX86_BUILTIN_UCMPD512, IX86_BUILTIN_UCMPQ512,
	IX86_BUILTIN_UNPCKHPD512, IX86_BUILTIN_UNPCKHPS512,
	IX86_BUILTIN_UNPCKLPD512, IX86_BUILTIN_UNPCKLPS512,
	IX86_BUILTIN_VCVTSD2SI32, IX86_BUILTIN_VCVTSD2SI64,
	IX86_BUILTIN_VCVTSD2USI32, IX86_BUILTIN_VCVTSD2USI64,
	IX86_BUILTIN_VCVTSS2SI32, IX86_BUILTIN_VCVTSS2SI64,
	IX86_BUILTIN_VCVTSS2USI32, IX86_BUILTIN_VCVTSS2USI64,
	IX86_BUILTIN_VCVTTSD2SI32, IX86_BUILTIN_VCVTTSD2SI64,
	IX86_BUILTIN_VCVTTSD2USI32, IX86_BUILTIN_VCVTTSD2USI64,
	IX86_BUILTIN_VCVTTSS2SI32, IX86_BUILTIN_VCVTTSS2SI64,
	IX86_BUILTIN_VCVTTSS2USI32, IX86_BUILTIN_VCVTTSS2USI64,
	IX86_BUILTIN_VFMADDPD512_MASK, IX86_BUILTIN_VFMADDPD512_MASK3,
	IX86_BUILTIN_VFMADDPD512_MASKZ, IX86_BUILTIN_VFMADDPS512_MASK,
	IX86_BUILTIN_VFMADDPS512_MASK3, IX86_BUILTIN_VFMADDPS512_MASKZ,
	IX86_BUILTIN_VFMADDSD3_MASK, IX86_BUILTIN_VFMADDSD3_MASK3,
	IX86_BUILTIN_VFMADDSD3_MASKZ, IX86_BUILTIN_VFMADDSS3_MASK,
	IX86_BUILTIN_VFMADDSS3_MASK3, IX86_BUILTIN_VFMADDSS3_MASKZ,
	IX86_BUILTIN_VFMADDSUBPD512_MASK, IX86_BUILTIN_VFMADDSUBPD512_MASK3,
	IX86_BUILTIN_VFMADDSUBPD512_MASKZ, IX86_BUILTIN_VFMADDSUBPS512_MASK,
	IX86_BUILTIN_VFMADDSUBPS512_MASK3, IX86_BUILTIN_VFMADDSUBPS512_MASKZ,
	IX86_BUILTIN_VFMSUBADDPD512_MASK3, IX86_BUILTIN_VFMSUBADDPS512_MASK3,
	IX86_BUILTIN_VFMSUBPD512_MASK3, IX86_BUILTIN_VFMSUBPS512_MASK3,
	IX86_BUILTIN_VFMSUBSD3_MASK3, IX86_BUILTIN_VFMSUBSS3_MASK3,
	IX86_BUILTIN_VFNMADDPD512_MASK, IX86_BUILTIN_VFNMADDPS512_MASK,
	IX86_BUILTIN_VFNMSUBPD512_MASK, IX86_BUILTIN_VFNMSUBPD512_MASK3,
	IX86_BUILTIN_VFNMSUBPS512_MASK, IX86_BUILTIN_VFNMSUBPS512_MASK3,
	IX86_BUILTIN_VPCLZCNTD512, IX86_BUILTIN_VPCLZCNTQ512,
	IX86_BUILTIN_VPCONFLICTD512, IX86_BUILTIN_VPCONFLICTQ512,
	IX86_BUILTIN_VPERMDF512, IX86_BUILTIN_VPERMDI512,
	IX86_BUILTIN_VPERMI2VARD512, IX86_BUILTIN_VPERMI2VARPD512,
	IX86_BUILTIN_VPERMI2VARPS512, IX86_BUILTIN_VPERMI2VARQ512,
	IX86_BUILTIN_VPERMILPD512, IX86_BUILTIN_VPERMILPS512,
	IX86_BUILTIN_VPERMILVARPD512, IX86_BUILTIN_VPERMILVARPS512,
	IX86_BUILTIN_VPERMT2VARD512, IX86_BUILTIN_VPERMT2VARD512_MASKZ,
	IX86_BUILTIN_VPERMT2VARPD512, IX86_BUILTIN_VPERMT2VARPD512_MASKZ,
	IX86_BUILTIN_VPERMT2VARPS512, IX86_BUILTIN_VPERMT2VARPS512_MASKZ,
	IX86_BUILTIN_VPERMT2VARQ512, IX86_BUILTIN_VPERMT2VARQ512_MASKZ,
	IX86_BUILTIN_VPERMVARDF512, IX86_BUILTIN_VPERMVARDI512,
	IX86_BUILTIN_VPERMVARSF512, IX86_BUILTIN_VPERMVARSI512,
	IX86_BUILTIN_VTERNLOGD512_MASK, IX86_BUILTIN_VTERNLOGD512_MASKZ,
	IX86_BUILTIN_VTERNLOGQ512_MASK, IX86_BUILTIN_VTERNLOGQ512_MASKZ,
	IX86_BUILTIN_KAND16, IX86_BUILTIN_KANDN16, IX86_BUILTIN_KNOT16,
	IX86_BUILTIN_KOR16, IX86_BUILTIN_KORTESTC16, IX86_BUILTIN_KORTESTZ16,
	IX86_BUILTIN_KUNPCKBW, IX86_BUILTIN_KXNOR16, IX86_BUILTIN_KXOR16,
	IX86_BUILTIN_GATHER3ALTDIV16SF, IX86_BUILTIN_GATHER3ALTDIV16SI,
	IX86_BUILTIN_GATHER3ALTSIV8DF, IX86_BUILTIN_GATHER3ALTSIV8DI,
	IX86_BUILTIN_GATHER3DIV16SF, IX86_BUILTIN_GATHER3DIV16SI,
	IX86_BUILTIN_GATHER3DIV8DF, IX86_BUILTIN_GATHER3DIV8DI,
	IX86_BUILTIN_GATHER3SIV16SF, IX86_BUILTIN_GATHER3SIV16SI,
	IX86_BUILTIN_GATHER3SIV8DF, IX86_BUILTIN_GATHER3SIV8DI,
	IX86_BUILTIN_SCATTERDIV16SF, IX86_BUILTIN_SCATTERDIV16SI,
	IX86_BUILTIN_SCATTERDIV8DF, IX86_BUILTIN_SCATTERDIV8DI,
	IX86_BUILTIN_SCATTERSIV16SF, IX86_BUILTIN_SCATTERSIV16SI,
	IX86_BUILTIN_SCATTERSIV8DF, IX86_BUILTIN_SCATTERSIV8DI,
	IX86_BUILTIN_GATHERPFDPS, IX86_BUILTIN_GATHERPFQPS,
	IX86_BUILTIN_SCATTERPFDPS, IX86_BUILTIN_SCATTERPFQPS,
	IX86_BUILTIN_EXP2PD_MASK, IX86_BUILTIN_EXP2PS_MASK,
	IX86_BUILTIN_EXP2PS, IX86_BUILTIN_RCP28PD, IX86_BUILTIN_RCP28PS,
	IX86_BUILTIN_RSQRT28PD, IX86_BUILTIN_RSQRT28PS,
	IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512, IX86_BUILTIN_CPYSGNPS512,
	IX86_BUILTIN_CPYSGNPD512, IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512,
	IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512.
	(bdesc_special_args): Add __builtin_ia32_compressstoresf512_mask,
	__builtin_ia32_compressstoresi512_mask,
	__builtin_ia32_compressstoredf512_mask,
	__builtin_ia32_compressstoredi512_mask,
	__builtin_ia32_expandloadsf512_mask,
	__builtin_ia32_expandloadsf512_maskz,
	__builtin_ia32_expandloadsi512_mask,
	__builtin_ia32_expandloadsi512_maskz,
	__builtin_ia32_expandloaddf512_mask,
	__builtin_ia32_expandloaddf512_maskz,
	__builtin_ia32_expandloaddi512_mask,
	__builtin_ia32_expandloaddi512_maskz,
	__builtin_ia32_loaddqusi512_mask, __builtin_ia32_loaddqudi512_mask,
	__builtin_ia32_loadsd_mask, __builtin_ia32_loadss_mask,
	__builtin_ia32_loadupd512_mask, __builtin_ia32_loadups512_mask,
	__builtin_ia32_loadaps512_mask, __builtin_ia32_movdqa32load512_mask,
	__builtin_ia32_loadapd512_mask, __builtin_ia32_movdqa64load512_mask,
	__builtin_ia32_movntps512, __builtin_ia32_movntpd512,
	__builtin_ia32_movntdq512, __builtin_ia32_storedqusi512_mask,
	__builtin_ia32_storedqudi512_mask, __builtin_ia32_storesd_mask,
	__builtin_ia32_storess_mask, __builtin_ia32_storeupd512_mask,
	__builtin_ia32_storeups512_mask, __builtin_ia32_storeaps512_mask,
	__builtin_ia32_movdqa32store512_mask, __builtin_ia32_storeapd512_mask,
	__builtin_ia32_movdqa64store512_mask, __builtin_ia32_alignd512_mask,
	__builtin_ia32_alignq512_mask, __builtin_ia32_blendmd_512_mask,
	__builtin_ia32_blendmpd_512_mask, __builtin_ia32_blendmps_512_mask,
	__builtin_ia32_blendmq_512_mask, __builtin_ia32_broadcastf32x4_512,
	__builtin_ia32_broadcastf64x4_512, __builtin_ia32_broadcasti32x4_512,
	__builtin_ia32_broadcasti64x4_512, __builtin_ia32_broadcastsd512,
	__builtin_ia32_broadcastss512, __builtin_ia32_cmpd512_mask,
	__builtin_ia32_cmpq512_mask, __builtin_ia32_compressdf512_mask,
	__builtin_ia32_compresssf512_mask, __builtin_ia32_cvtdq2pd512_mask,
	__builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_cvtudq2pd512_mask,
	__builtin_ia32_cvtusi2sd32, __builtin_ia32_expanddf512_mask,
	__builtin_ia32_expanddf512_maskz, __builtin_ia32_expandsf512_mask,
	__builtin_ia32_expandsf512_maskz, __builtin_ia32_extractf32x4_mask,
	__builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask,
	__builtin_ia32_extracti64x4_mask, __builtin_ia32_insertf32x4_mask,
	__builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask,
	__builtin_ia32_inserti64x4_mask, __builtin_ia32_movapd512_mask,
	__builtin_ia32_movaps512_mask, __builtin_ia32_movddup512_mask,
	__builtin_ia32_movdqa32_512_mask, __builtin_ia32_movdqa64_512_mask,
	__builtin_ia32_movesd_mask, __builtin_ia32_movess_mask,
	__builtin_ia32_movshdup512_mask, __builtin_ia32_movsldup512_mask,
	__builtin_ia32_pabsd512_mask, __builtin_ia32_pabsq512_mask,
	__builtin_ia32_paddd512_mask, __builtin_ia32_paddq512_mask,
	__builtin_ia32_pandd512_mask, __builtin_ia32_pandnd512_mask,
	__builtin_ia32_pandnq512_mask, __builtin_ia32_pandq512_mask,
	__builtin_ia32_pbroadcastd512, __builtin_ia32_pbroadcastd512_gpr_mask,
	__builtin_ia32_broadcastmb512, __builtin_ia32_broadcastmw512,
	__builtin_ia32_pbroadcastq512, __builtin_ia32_pbroadcastq512_gpr_mask,
	__builtin_ia32_pbroadcastq512_mem_mask,
	__builtin_ia32_pcmpeqd512_mask, __builtin_ia32_pcmpeqq512_mask,
	__builtin_ia32_pcmpgtd512_mask, __builtin_ia32_pcmpgtq512_mask,
	__builtin_ia32_compresssi512_mask, __builtin_ia32_compressdi512_mask,
	__builtin_ia32_expandsi512_mask, __builtin_ia32_expandsi512_maskz,
	__builtin_ia32_expanddi512_mask, __builtin_ia32_expanddi512_maskz,
	__builtin_ia32_pmaxsd512_mask, __builtin_ia32_pmaxsq512_mask,
	__builtin_ia32_pmaxud512_mask, __builtin_ia32_pmaxuq512_mask,
	__builtin_ia32_pminsd512_mask, __builtin_ia32_pminsq512_mask,
	__builtin_ia32_pminud512_mask, __builtin_ia32_pminuq512_mask,
	__builtin_ia32_pmovdb512_mask, __builtin_ia32_pmovdw512_mask,
	__builtin_ia32_pmovqb512_mask, __builtin_ia32_pmovqd512_mask,
	__builtin_ia32_pmovqw512_mask, __builtin_ia32_pmovsdb512_mask,
	__builtin_ia32_pmovsdw512_mask, __builtin_ia32_pmovsqb512_mask,
	__builtin_ia32_pmovsqd512_mask, __builtin_ia32_pmovsqw512_mask,
	__builtin_ia32_pmovsxbd512_mask, __builtin_ia32_pmovsxbq512_mask,
	__builtin_ia32_pmovsxdq512_mask, __builtin_ia32_pmovsxwd512_mask,
	__builtin_ia32_pmovsxwq512_mask, __builtin_ia32_pmovusdb512_mask,
	__builtin_ia32_pmovusdw512_mask, __builtin_ia32_pmovusqb512_mask,
	__builtin_ia32_pmovusqd512_mask, __builtin_ia32_pmovusqw512_mask,
	__builtin_ia32_pmovzxbd512_mask, __builtin_ia32_pmovzxbq512_mask,
	__builtin_ia32_pmovzxdq512_mask, __builtin_ia32_pmovzxwd512_mask,
	__builtin_ia32_pmovzxwq512_mask, __builtin_ia32_pmuldq512_mask,
	__builtin_ia32_pmulld512_mask, __builtin_ia32_pmuludq512_mask,
	__builtin_ia32_pord512_mask, __builtin_ia32_porq512_mask,
	__builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask,
	__builtin_ia32_prolvd512_mask, __builtin_ia32_prolvq512_mask,
	__builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask,
	__builtin_ia32_prorvd512_mask, __builtin_ia32_prorvq512_mask,
	__builtin_ia32_pshufd512_mask, __builtin_ia32_pslld512_mask,
	__builtin_ia32_pslldi512_mask, __builtin_ia32_psllq512_mask,
	__builtin_ia32_psllqi512_mask, __builtin_ia32_psllv16si_mask,
	__builtin_ia32_psllv8di_mask, __builtin_ia32_psrad512_mask,
	__builtin_ia32_psradi512_mask, __builtin_ia32_psraq512_mask,
	__builtin_ia32_psraqi512_mask, __builtin_ia32_psrav16si_mask,
	__builtin_ia32_psrav8di_mask, __builtin_ia32_psrld512_mask,
	__builtin_ia32_psrldi512_mask, __builtin_ia32_psrlq512_mask,
	__builtin_ia32_psrlqi512_mask, __builtin_ia32_psrlv16si_mask,
	__builtin_ia32_psrlv8di_mask, __builtin_ia32_psubd512_mask,
	__builtin_ia32_psubq512_mask, __builtin_ia32_ptestmd512,
	__builtin_ia32_ptestmq512, __builtin_ia32_ptestnmd512,
	__builtin_ia32_ptestnmq512, __builtin_ia32_punpckhdq512_mask,
	__builtin_ia32_punpckhqdq512_mask, __builtin_ia32_punpckldq512_mask,
	__builtin_ia32_punpcklqdq512_mask, __builtin_ia32_pxord512_mask,
	__builtin_ia32_pxorq512_mask, __builtin_ia32_rcp14pd512_mask,
	__builtin_ia32_rcp14ps512_mask, __builtin_ia32_rcp14sd_mask,
	__builtin_ia32_rcp14ss_mask, __builtin_ia32_rsqrt14pd512_mask,
	__builtin_ia32_rsqrt14ps512_mask, __builtin_ia32_rsqrt14sd_mask,
	__builtin_ia32_rsqrt14ss_mask, __builtin_ia32_shufpd512_mask,
	__builtin_ia32_shufps512_mask, __builtin_ia32_shuf_f32x4_mask,
	__builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask,
	__builtin_ia32_shuf_i64x2_mask, __builtin_ia32_ucmpd512_mask,
	__builtin_ia32_ucmpq512_mask, __builtin_ia32_unpckhpd512_mask,
	__builtin_ia32_unpckhps512_mask, __builtin_ia32_unpcklpd512_mask,
	__builtin_ia32_unpcklps512_mask, __builtin_ia32_vplzcntd_512_mask,
	__builtin_ia32_vplzcntq_512_mask,
	__builtin_ia32_vpconflictsi_512_mask,
	__builtin_ia32_vpconflictdi_512_mask, __builtin_ia32_permdf512_mask,
	__builtin_ia32_permdi512_mask, __builtin_ia32_vpermi2vard512_mask,
	__builtin_ia32_vpermi2varpd512_mask,
	__builtin_ia32_vpermi2varps512_mask,
	__builtin_ia32_vpermi2varq512_mask, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_vpermilvarpd512_mask,
	__builtin_ia32_vpermilvarps512_mask,
	__builtin_ia32_vpermt2vard512_mask,
	__builtin_ia32_vpermt2vard512_maskz,
	__builtin_ia32_vpermt2varpd512_mask,
	__builtin_ia32_vpermt2varpd512_maskz,
	__builtin_ia32_vpermt2varps512_mask,
	__builtin_ia32_vpermt2varps512_maskz,
	__builtin_ia32_vpermt2varq512_mask,
	__builtin_ia32_vpermt2varq512_maskz, __builtin_ia32_permvardf512_mask,
	__builtin_ia32_permvardi512_mask, __builtin_ia32_permvarsf512_mask,
	__builtin_ia32_permvarsi512_mask, __builtin_ia32_pternlogd512_mask,
	__builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask,
	__builtin_ia32_pternlogq512_maskz, __builtin_ia32_copysignps512,
	__builtin_ia32_copysignpd512, __builtin_ia32_sqrtpd512,
	__builtin_ia32_sqrtps512, __builtin_ia32_exp2ps,
	__builtin_ia32_roundpd_az_vec_pack_sfix512,
	__builtin_ia32_floorpd_vec_pack_sfix512,
	__builtin_ia32_ceilpd_vec_pack_sfix512, __builtin_ia32_kandhi,
	__builtin_ia32_kandnhi, __builtin_ia32_knothi, __builtin_ia32_korhi,
	__builtin_ia32_kortestchi, __builtin_ia32_kortestzhi,
	__builtin_ia32_kunpckhi, __builtin_ia32_kxnorhi,
	__builtin_ia32_kxorhi, __builtin_ia32_addpd512_mask,
	__builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask,
	__builtin_ia32_addss_mask, __builtin_ia32_cmppd512_mask,
	__builtin_ia32_cmpps512_mask, __builtin_ia32_cmpsd_mask,
	__builtin_ia32_cmpss_mask, __builtin_ia32_vcomisd,
	__builtin_ia32_vcomiss, __builtin_ia32_cvtdq2ps512_mask,
	__builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask,
	__builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_vcvtph2ps512_mask,
	__builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask,
	__builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask,
	__builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32,
	__builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask,
	__builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask,
	__builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask,
	__builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64,
	__builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64,
	__builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask,
	__builtin_ia32_divsd_mask, __builtin_ia32_divss_mask,
	__builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz,
	__builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz,
	__builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz,
	__builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz,
	__builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask,
	__builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask,
	__builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask,
	__builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask,
	__builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask,
	__builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask,
	__builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask,
	__builtin_ia32_minsd_mask, __builtin_ia32_minss_mask,
	__builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask,
	__builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask,
	__builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask,
	__builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask,
	__builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask,
	__builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask,
	__builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask,
	__builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask,
	__builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask,
	__builtin_ia32_subsd_mask, __builtin_ia32_subss_mask,
	__builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64,
	__builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64,
	__builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64,
	__builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64,
	__builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64,
	__builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64,
	__builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64,
	__builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64,
	__builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3,
	__builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask,
	__builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz,
	__builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3,
	__builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask,
	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
	__builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_exp2pd_mask,
	__builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask,
	__builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask,
	__builtin_ia32_rsqrt28ps_mask, __builtin_ia32_gathersiv16sf,
	__builtin_ia32_gathersiv8df, __builtin_ia32_gatherdiv16sf,
	__builtin_ia32_gatherdiv8df, __builtin_ia32_gathersiv16si,
	__builtin_ia32_gathersiv8di, __builtin_ia32_gatherdiv16si,
	__builtin_ia32_gatherdiv8di, __builtin_ia32_gatheraltsiv8df ,
	__builtin_ia32_gatheraltdiv8sf , __builtin_ia32_gatheraltsiv8di ,
	__builtin_ia32_gatheraltdiv8si , __builtin_ia32_scattersiv16sf,
	__builtin_ia32_scattersiv8df, __builtin_ia32_scatterdiv16sf,
	__builtin_ia32_scatterdiv8df, __builtin_ia32_scattersiv16si,
	__builtin_ia32_scattersiv8di, __builtin_ia32_scatterdiv16si,
	__builtin_ia32_scatterdiv8di, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps.
	(ix86_init_mmx_sse_builtins): Handle builtins with AVX512 embeded
	rounding, builtins for AVX512 gathers/scatters.
	(ix86_expand_args_builtin): Handle new functions types, add warnings
	for masked builtins.
	(ix86_erase_embedded_rounding_1): New. 
	(ix86_erase_embedded_rounding): Ditto. 
	(ix86_expand_sse_comi_round): Ditto. 
	(ix86_expand_round_builtin): Ditto. 
	(ix86_expand_special_args_builtin): Handle AVX512 gathers/scatters.
	(ix86_builtin_vectorized_function): Add 512-bit wide builtins. 
	(ix86_vectorize_builtin_gather): Ditto. 
	* config/i386/immintrin.h: Add avx512fintrin.h, avx512erintrin.h,
	avx512pfintrin.h, avx512cdintrin.h.

testsuite/ChangeLog entry:
2013-11-18  Alexander Ivchenko  <alexander.ivchenko@intel.com>
	    Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
	    Sergey Lega  <sergey.s.lega@intel.com>
	    Anna Tikhonova  <anna.tikhonova@intel.com>
	    Ilya Tocar  <ilya.tocar@intel.com>
	    Andrey Turetskiy  <andrey.turetskiy@intel.com>
	    Ilya Verbin  <ilya.verbin@intel.com>
	    Kirill Yukhin  <kirill.yukhin@intel.com>
	    Michael Zolotukhin  <michael.v.zolotukhin@intel.com>

	* gcc.target/i386/avx-1.c: Add defines for
	__builtin_ia32_addpd512_mask, __builtin_ia32_addps512_mask,
	__builtin_ia32_addsd_mask, __builtin_ia32_addss_mask,
	__builtin_ia32_alignd512_mask, __builtin_ia32_alignq512_mask,
	__builtin_ia32_cmpd512_mask, __builtin_ia32_cmppd512_mask,
	__builtin_ia32_cmpps512_mask, __builtin_ia32_cmpq512_mask,
	__builtin_ia32_cmpsd_mask, __builtin_ia32_cmpss_mask,
	__builtin_ia32_cvtdq2ps512_mask, __builtin_ia32_cvtpd2dq512_mask,
	__builtin_ia32_cvtpd2ps512_mask, __builtin_ia32_cvtpd2udq512_mask,
	__builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask,
	__builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask,
	__builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32,
	__builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask,
	__builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask,
	__builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask,
	__builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64,
	__builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64,
	__builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask,
	__builtin_ia32_divsd_mask, __builtin_ia32_divss_mask,
	__builtin_ia32_extractf32x4_mask, __builtin_ia32_extractf64x4_mask,
	__builtin_ia32_extracti32x4_mask, __builtin_ia32_extracti64x4_mask,
	__builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz,
	__builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz,
	__builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz,
	__builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz,
	__builtin_ia32_gatherdiv8df, __builtin_ia32_gatherdiv8di,
	__builtin_ia32_gatherdiv16sf, __builtin_ia32_gatherdiv16si,
	__builtin_ia32_gathersiv16sf, __builtin_ia32_gathersiv16si,
	__builtin_ia32_gathersiv8df, __builtin_ia32_gathersiv8di,
	__builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask,
	__builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask,
	__builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask,
	__builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask,
	__builtin_ia32_insertf32x4_mask, __builtin_ia32_insertf64x4_mask,
	__builtin_ia32_inserti32x4_mask, __builtin_ia32_inserti64x4_mask,
	__builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask,
	__builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask,
	__builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask,
	__builtin_ia32_minsd_mask, __builtin_ia32_minss_mask,
	__builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask,
	__builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask,
	__builtin_ia32_permdf512_mask, __builtin_ia32_permdi512_mask,
	__builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask,
	__builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask,
	__builtin_ia32_pshufd512_mask, __builtin_ia32_pslldi512_mask,
	__builtin_ia32_psllqi512_mask, __builtin_ia32_psradi512_mask,
	__builtin_ia32_psraqi512_mask, __builtin_ia32_psrldi512_mask,
	__builtin_ia32_psrlqi512_mask, __builtin_ia32_pternlogd512_mask,
	__builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask,
	__builtin_ia32_pternlogq512_maskz, __builtin_ia32_rndscalepd_mask,
	__builtin_ia32_rndscaleps_mask, __builtin_ia32_rndscalesd_mask,
	__builtin_ia32_rndscaless_mask, __builtin_ia32_scalefpd512_mask,
	__builtin_ia32_scalefps512_mask, __builtin_ia32_scalefsd_mask,
	__builtin_ia32_scalefss_mask, __builtin_ia32_scatterdiv8df,
	__builtin_ia32_scatterdiv8di, __builtin_ia32_scatterdiv16sf,
	__builtin_ia32_scatterdiv16si, __builtin_ia32_scattersiv16sf,
	__builtin_ia32_scattersiv16si, __builtin_ia32_scattersiv8df,
	__builtin_ia32_scattersiv8di, __builtin_ia32_shuf_f32x4_mask,
	__builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask,
	__builtin_ia32_shuf_i64x2_mask, __builtin_ia32_shufpd512_mask,
	__builtin_ia32_shufps512_mask, __builtin_ia32_sqrtpd512_mask,
	__builtin_ia32_sqrtps512_mask, __builtin_ia32_sqrtsd_mask,
	__builtin_ia32_sqrtss_mask, __builtin_ia32_subpd512_mask,
	__builtin_ia32_subps512_mask, __builtin_ia32_subsd_mask,
	__builtin_ia32_subss_mask, __builtin_ia32_ucmpd512_mask,
	__builtin_ia32_ucmpq512_mask, __builtin_ia32_vcomisd,
	__builtin_ia32_vcomiss, __builtin_ia32_vcvtph2ps512_mask,
	__builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_vcvtsd2si32,
	__builtin_ia32_vcvtsd2si64, __builtin_ia32_vcvtsd2usi32,
	__builtin_ia32_vcvtsd2usi64, __builtin_ia32_vcvtss2si32,
	__builtin_ia32_vcvtss2si64, __builtin_ia32_vcvtss2usi32,
	__builtin_ia32_vcvtss2usi64, __builtin_ia32_vcvttsd2si32,
	__builtin_ia32_vcvttsd2si64, __builtin_ia32_vcvttsd2usi32,
	__builtin_ia32_vcvttsd2usi64, __builtin_ia32_vcvttss2si32,
	__builtin_ia32_vcvttss2si64, __builtin_ia32_vcvttss2usi32,
	__builtin_ia32_vcvttss2usi64, __builtin_ia32_vfmaddpd512_mask,
	__builtin_ia32_vfmaddpd512_mask3, __builtin_ia32_vfmaddpd512_maskz,
	__builtin_ia32_vfmaddps512_mask, __builtin_ia32_vfmaddps512_mask3,
	__builtin_ia32_vfmaddps512_maskz, __builtin_ia32_vfmaddsd3_mask,
	__builtin_ia32_vfmaddsd3_mask3, __builtin_ia32_vfmaddsd3_maskz,
	__builtin_ia32_vfmaddss3_mask, __builtin_ia32_vfmaddss3_mask3,
	__builtin_ia32_vfmaddss3_maskz, __builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_exp2ps_mask,
	__builtin_ia32_exp2pd_mask, __builtin_ia32_exp2ps_mask,
	__builtin_ia32_exp2pd_mask, __builtin_ia32_rsqrt28ps_mask,
	__builtin_ia32_rsqrt28pd_mask, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps, __builtin_ia32_addpd512_mask,
	__builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask,
	__builtin_ia32_addss_mask, __builtin_ia32_alignd512_mask,
	__builtin_ia32_alignq512_mask, __builtin_ia32_cmpd512_mask,
	__builtin_ia32_cmppd512_mask, __builtin_ia32_cmpps512_mask,
	__builtin_ia32_cmpq512_mask, __builtin_ia32_cmpsd_mask,
	__builtin_ia32_cmpss_mask, __builtin_ia32_cvtdq2ps512_mask,
	__builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask,
	__builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_cvtps2dq512_mask,
	__builtin_ia32_cvtps2pd512_mask, __builtin_ia32_cvtps2udq512_mask,
	__builtin_ia32_cvtsd2ss_mask, __builtin_ia32_cvtsi2sd64,
	__builtin_ia32_cvtsi2ss32, __builtin_ia32_cvtsi2ss64,
	__builtin_ia32_cvtss2sd_mask, __builtin_ia32_cvttpd2dq512_mask,
	__builtin_ia32_cvttpd2udq512_mask, __builtin_ia32_cvttps2dq512_mask,
	__builtin_ia32_cvttps2udq512_mask, __builtin_ia32_cvtudq2ps512_mask,
	__builtin_ia32_cvtusi2sd64, __builtin_ia32_cvtusi2ss32,
	__builtin_ia32_cvtusi2ss64, __builtin_ia32_divpd512_mask,
	__builtin_ia32_divps512_mask, __builtin_ia32_divsd_mask,
	__builtin_ia32_divss_mask, __builtin_ia32_extractf32x4_mask,
	__builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask,
	__builtin_ia32_extracti64x4_mask, __builtin_ia32_fixupimmpd512_mask,
	__builtin_ia32_fixupimmpd512_maskz, __builtin_ia32_fixupimmps512_mask,
	__builtin_ia32_fixupimmps512_maskz, __builtin_ia32_fixupimmsd_mask,
	__builtin_ia32_fixupimmsd_maskz, __builtin_ia32_fixupimmss_mask,
	__builtin_ia32_fixupimmss_maskz, __builtin_ia32_gatherdiv8df,
	__builtin_ia32_gatherdiv8di, __builtin_ia32_gatherdiv16sf,
	__builtin_ia32_gatherdiv16si, __builtin_ia32_gathersiv16sf,
	__builtin_ia32_gathersiv16si, __builtin_ia32_gathersiv8df,
	__builtin_ia32_gathersiv8di, __builtin_ia32_getexppd512_mask,
	__builtin_ia32_getexpps512_mask, __builtin_ia32_getexpsd128_mask,
	__builtin_ia32_getexpss128_mask, __builtin_ia32_getmantpd512_mask,
	__builtin_ia32_getmantps512_mask, __builtin_ia32_getmantsd_mask,
	__builtin_ia32_getmantss_mask, __builtin_ia32_insertf32x4_mask,
	__builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask,
	__builtin_ia32_inserti64x4_mask, __builtin_ia32_maxpd512_mask,
	__builtin_ia32_maxps512_mask, __builtin_ia32_maxsd_mask,
	__builtin_ia32_maxss_mask, __builtin_ia32_minpd512_mask,
	__builtin_ia32_minps512_mask, __builtin_ia32_minsd_mask,
	__builtin_ia32_minss_mask, __builtin_ia32_mulpd512_mask,
	__builtin_ia32_mulps512_mask, __builtin_ia32_mulsd_mask,
	__builtin_ia32_mulss_mask, __builtin_ia32_permdf512_mask,
	__builtin_ia32_permdi512_mask, __builtin_ia32_prold512_mask,
	__builtin_ia32_prolq512_mask, __builtin_ia32_prord512_mask,
	__builtin_ia32_prorq512_mask, __builtin_ia32_pshufd512_mask,
	__builtin_ia32_pslldi512_mask, __builtin_ia32_psllqi512_mask,
	__builtin_ia32_psradi512_mask, __builtin_ia32_psraqi512_mask,
	__builtin_ia32_psrldi512_mask, __builtin_ia32_psrlqi512_mask,
	__builtin_ia32_pternlogd512_mask, __builtin_ia32_pternlogd512_maskz,
	__builtin_ia32_pternlogq512_mask, __builtin_ia32_pternlogq512_maskz,
	__builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask,
	__builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask,
	__builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask,
	__builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask,
	__builtin_ia32_scatterdiv8df, __builtin_ia32_scatterdiv8di,
	__builtin_ia32_scatterdiv16sf, __builtin_ia32_scatterdiv16si,
	__builtin_ia32_scattersiv16sf, __builtin_ia32_scattersiv16si,
	__builtin_ia32_scattersiv8df, __builtin_ia32_scattersiv8di,
	__builtin_ia32_shuf_f32x4_mask, __builtin_ia32_shuf_f64x2_mask,
	__builtin_ia32_shuf_i32x4_mask, __builtin_ia32_shuf_i64x2_mask,
	__builtin_ia32_shufpd512_mask, __builtin_ia32_shufps512_mask,
	__builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask,
	__builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask,
	__builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask,
	__builtin_ia32_subsd_mask, __builtin_ia32_subss_mask,
	__builtin_ia32_ucmpd512_mask, __builtin_ia32_ucmpq512_mask,
	__builtin_ia32_vcomisd, __builtin_ia32_vcomiss,
	__builtin_ia32_vcvtph2ps512_mask, __builtin_ia32_vcvtps2ph512_mask,
	__builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64,
	__builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64,
	__builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64,
	__builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64,
	__builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64,
	__builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64,
	__builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64,
	__builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64,
	__builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3,
	__builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask,
	__builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz,
	__builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3,
	__builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask,
	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
	__builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps, __builtin_ia32_exp2pd_mask,
	__builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask,
	__builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask,
	__builtin_ia32_rsqrt28ps_mask.
	* gcc.target/i386/sse-22.c (test_1y): New.
	(test_2y): Ditto.
	(test_2vx): Ditto.
	(test_3x): Ditto.
	(test_3v): Ditto.
	(test_3vx): Ditto.
	(test_4x): Ditto.
	(test_4y): Ditto.
	(test_4v): Ditto.
	(pragma GCC target): Add avx512f, avx512er, avx512cd, avx512pf.
	(tests): Add  _mm512_cvt_roundepi32_ps, _mm512_cvt_roundepu32_ps,
	_mm512_cvt_roundpd_epi32, _mm512_cvt_roundpd_epu32,
	_mm512_cvt_roundpd_ps, _mm512_cvt_roundph_ps,
	_mm512_cvt_roundps_epi32, _mm512_cvt_roundps_epu32,
	_mm512_cvt_roundps_pd, _mm512_cvtps_ph, _mm512_cvtt_roundpd_epi32,
	_mm512_cvtt_roundpd_epu32, _mm512_cvtt_roundps_epi32,
	_mm512_cvtt_roundps_epu32, _mm512_extractf32x4_ps,
	_mm512_extractf64x4_pd, _mm512_extracti32x4_epi32,
	_mm512_extracti64x4_epi64, _mm512_getexp_round_pd,
	_mm512_getexp_round_ps, _mm512_getmant_round_pd,
	_mm512_getmant_round_ps, _mm512_permute_pd, _mm512_permute_ps,
	_mm512_permutex_epi64, _mm512_permutex_pd, _mm512_rol_epi32,
	_mm512_rol_epi64, _mm512_ror_epi32, _mm512_ror_epi64,
	_mm512_shuffle_epi32, _mm512_slli_epi32, _mm512_slli_epi64,
	_mm512_sqrt_round_pd, _mm512_sqrt_round_ps, _mm512_srai_epi32,
	_mm512_srai_epi64, _mm512_srli_epi32, _mm512_srli_epi64,
	_mm_cvt_roundsd_i32, _mm_cvt_roundsd_u32, _mm_cvt_roundss_i32,
	_mm_cvt_roundss_u32, _mm_cvtt_roundsd_i32, _mm_cvtt_roundsd_u32,
	_mm_cvtt_roundss_i32, _mm_cvtt_roundss_u32, _mm512_getmant_pd,
	_mm512_getmant_ps, _mm_cvt_roundi32_ss, _mm512_add_round_pd,
	_mm512_add_round_ps, _mm512_alignr_epi32, _mm512_alignr_epi64,
	_mm512_cmp_epi32_mask, _mm512_cmp_epi64_mask, _mm512_cmp_epu32_mask,
	_mm512_cmp_epu64_mask, _mm512_cmp_pd_mask, _mm512_cmp_ps_mask,
	_mm512_div_round_pd, _mm512_div_round_ps, _mm512_i32gather_epi32,
	_mm512_i32gather_epi64, _mm512_i32gather_pd, _mm512_i32gather_ps,
	_mm512_i64gather_epi32, _mm512_i64gather_epi64, _mm512_i64gather_pd,
	_mm512_i64gather_ps, _mm512_insertf32x4, _mm512_insertf64x4,
	_mm512_inserti32x4, _mm512_inserti64x4,
	_mm512_maskz_cvt_roundepi32_ps, _mm512_maskz_cvt_roundepu32_ps,
	_mm512_maskz_cvt_roundpd_epi32, _mm512_maskz_cvt_roundpd_epu32,
	_mm512_maskz_cvt_roundpd_ps, _mm512_maskz_cvt_roundph_ps,
	_mm512_maskz_cvt_roundps_epi32, _mm512_maskz_cvt_roundps_epu32,
	_mm512_maskz_cvt_roundps_pd, _mm512_maskz_cvtps_ph,
	_mm512_maskz_cvtt_roundpd_epi32, _mm512_maskz_cvtt_roundpd_epu32,
	_mm512_maskz_cvtt_roundps_epi32, _mm512_maskz_cvtt_roundps_epu32,
	_mm512_maskz_extractf32x4_ps, _mm512_maskz_extractf64x4_pd,
	_mm512_maskz_extracti32x4_epi32, _mm512_maskz_extracti64x4_epi64,
	_mm512_maskz_getexp_round_pd, _mm512_maskz_getexp_round_ps,
	_mm512_maskz_getmant_round_pd, _mm512_maskz_getmant_round_ps,
	_mm512_maskz_permute_pd, _mm512_maskz_permute_ps,
	_mm512_maskz_permutex_epi64, _mm512_maskz_permutex_pd,
	_mm512_maskz_rol_epi32, _mm512_maskz_rol_epi64,
	_mm512_maskz_ror_epi32, _mm512_maskz_ror_epi64,
	_mm512_maskz_shuffle_epi32, _mm512_maskz_slli_epi32,
	_mm512_maskz_slli_epi64, _mm512_maskz_sqrt_round_pd,
	_mm512_maskz_sqrt_round_ps, _mm512_maskz_srai_epi32,
	_mm512_maskz_srai_epi64, _mm512_maskz_srli_epi32,
	_mm512_maskz_srli_epi64, _mm512_max_round_pd, _mm512_max_round_ps,
	_mm512_min_round_pd, _mm512_min_round_ps, _mm512_mul_round_pd,
	_mm512_mul_round_ps, _mm512_scalef_round_pd, _mm512_scalef_round_ps,
	_mm512_shuffle_f32x4, _mm512_shuffle_f64x2, _mm512_shuffle_i32x4,
	_mm512_shuffle_i64x2, _mm512_shuffle_pd, _mm512_shuffle_ps,
	_mm512_sub_round_pd, _mm512_sub_round_ps, _mm_add_round_sd,
	_mm_add_round_ss, _mm_cmp_sd_mask, _mm_cmp_ss_mask,
	_mm_cvt_roundi64_sd, _mm_cvt_roundi64_ss, _mm_cvt_roundsd_ss,
	_mm_cvt_roundss_sd, _mm_cvt_roundu32_ss, _mm_cvt_roundu64_sd,
	_mm_cvt_roundu64_ss, _mm_div_round_sd, _mm_div_round_ss,
	_mm_getexp_round_sd, _mm_getexp_round_ss, _mm_getmant_round_sd,
	_mm_getmant_round_ss, _mm_mul_round_sd, _mm_mul_round_ss,
	_mm_scalef_round_sd, _mm_scalef_round_ss, _mm_sqrt_round_sd,
	_mm_sqrt_round_ss, _mm_sub_round_sd, _mm_sub_round_ss,
	_mm512_cmp_round_pd_mask, _mm512_cmp_round_ps_mask,
	_mm512_maskz_roundscale_round_pd, _mm512_maskz_roundscale_round_ps,
	_mm_cmp_round_sd_mask, _mm_cmp_round_ss_mask, _mm_comi_round_sd,
	_mm_comi_round_ss, _mm_roundscale_round_sd, _mm_roundscale_round_ss,
	_mm512_fmadd_round_pd, _mm512_fmadd_round_ps,
	_mm512_fmaddsub_round_pd, _mm512_fmaddsub_round_ps,
	_mm512_fmsub_round_pd, _mm512_fmsub_round_ps,
	_mm512_fmsubadd_round_pd, _mm512_fmsubadd_round_ps,
	_mm512_fnmadd_round_pd, _mm512_fnmadd_round_ps,
	_mm512_fnmsub_round_pd, _mm512_fnmsub_round_ps,
	_mm512_mask_cmp_epi32_mask, _mm512_mask_cmp_epi64_mask,
	_mm512_mask_cmp_epu32_mask, _mm512_mask_cmp_epu64_mask,
	_mm512_mask_cmp_pd_mask, _mm512_mask_cmp_ps_mask,
	_mm512_mask_cvt_roundepi32_ps, _mm512_mask_cvt_roundepu32_ps,
	_mm512_mask_cvt_roundpd_epi32, _mm512_mask_cvt_roundpd_epu32,
	_mm512_mask_cvt_roundpd_ps, _mm512_mask_cvt_roundph_ps,
	_mm512_mask_cvt_roundps_epi32, _mm512_mask_cvt_roundps_epu32,
	_mm512_mask_cvt_roundps_pd, _mm512_mask_cvtps_ph,
	_mm512_mask_cvtt_roundpd_epi32, _mm512_mask_cvtt_roundpd_epu32,
	_mm512_mask_cvtt_roundps_epi32, _mm512_mask_cvtt_roundps_epu32,
	_mm512_mask_extractf32x4_ps, _mm512_mask_extractf64x4_pd,
	_mm512_mask_extracti32x4_epi32, _mm512_mask_extracti64x4_epi64,
	_mm512_mask_getexp_round_pd, _mm512_mask_getexp_round_ps,
	_mm512_mask_getmant_round_pd, _mm512_mask_getmant_round_ps,
	_mm512_mask_permute_pd, _mm512_mask_permute_ps,
	_mm512_mask_permutex_epi64, _mm512_mask_permutex_pd,
	_mm512_mask_rol_epi32, _mm512_mask_rol_epi64, _mm512_mask_ror_epi32,
	_mm512_mask_ror_epi64, _mm512_mask_shuffle_epi32,
	_mm512_mask_slli_epi32, _mm512_mask_slli_epi64,
	_mm512_mask_sqrt_round_pd, _mm512_mask_sqrt_round_ps,
	_mm512_mask_srai_epi32, _mm512_mask_srai_epi64,
	_mm512_mask_srli_epi32, _mm512_mask_srli_epi64,
	_mm512_maskz_add_round_pd, _mm512_maskz_add_round_ps,
	_mm512_maskz_alignr_epi32, _mm512_maskz_alignr_epi64,
	_mm512_maskz_div_round_pd, _mm512_maskz_div_round_ps,
	_mm512_maskz_insertf32x4, _mm512_maskz_insertf64x4,
	_mm512_maskz_inserti32x4, _mm512_maskz_inserti64x4,
	_mm512_maskz_max_round_pd, _mm512_maskz_max_round_ps,
	_mm512_maskz_min_round_pd, _mm512_maskz_min_round_ps,
	_mm512_maskz_mul_round_pd, _mm512_maskz_mul_round_ps,
	_mm512_maskz_scalef_round_pd, _mm512_maskz_scalef_round_ps,
	_mm512_maskz_shuffle_f32x4, _mm512_maskz_shuffle_f64x2,
	_mm512_maskz_shuffle_i32x4, _mm512_maskz_shuffle_i64x2,
	_mm512_maskz_shuffle_pd, _mm512_maskz_shuffle_ps,
	_mm512_maskz_sub_round_pd, _mm512_maskz_sub_round_ps,
	_mm512_ternarylogic_epi32, _mm512_ternarylogic_epi64,
	_mm_fmadd_round_sd, _mm_fmadd_round_ss, _mm_fmsub_round_sd,
	_mm_fmsub_round_ss, _mm_fnmadd_round_sd, _mm_fnmadd_round_ss,
	_mm_fnmsub_round_sd, _mm_fnmsub_round_ss, _mm_mask_cmp_sd_mask,
	_mm_mask_cmp_ss_mask, _mm_maskz_add_round_sd, _mm_maskz_add_round_ss,
	_mm_maskz_cvt_roundsd_ss, _mm_maskz_cvt_roundss_sd,
	_mm_maskz_div_round_sd, _mm_maskz_div_round_ss,
	_mm_maskz_getexp_round_sd, _mm_maskz_getexp_round_ss,
	_mm_maskz_getmant_round_sd, _mm_maskz_getmant_round_ss,
	_mm_maskz_mul_round_sd, _mm_maskz_mul_round_ss,
	_mm_maskz_scalef_round_sd, _mm_maskz_scalef_round_ss,
	_mm_maskz_sqrt_round_sd, _mm_maskz_sqrt_round_ss,
	_mm_maskz_sub_round_sd, _mm_maskz_sub_round_ss,
	_mm512_i32scatter_epi32, _mm512_i32scatter_epi64,
	_mm512_i32scatter_pd, _mm512_i32scatter_ps, _mm512_i64scatter_epi32,
	_mm512_i64scatter_epi64, _mm512_i64scatter_pd, _mm512_i64scatter_ps,
	_mm512_mask_roundscale_round_pd, _mm512_mask_roundscale_round_ps,
	_mm512_mask_cmp_round_pd_mask, _mm512_mask_cmp_round_ps_mask,
	_mm_fixupimm_round_sd, _mm_fixupimm_round_ss,
	_mm_mask_cmp_round_sd_mask, _mm_mask_cmp_round_ss_mask,
	_mm_maskz_roundscale_round_sd, _mm_maskz_roundscale_round_ss,
	_mm512_mask3_fmadd_round_pd, _mm512_mask3_fmadd_round_ps,
	_mm512_mask3_fmaddsub_round_pd, _mm512_mask3_fmaddsub_round_ps,
	_mm512_mask3_fmsub_round_pd, _mm512_mask3_fmsub_round_ps,
	_mm512_mask3_fmsubadd_round_pd, _mm512_mask3_fmsubadd_round_ps,
	_mm512_mask3_fnmadd_round_pd, _mm512_mask3_fnmadd_round_ps,
	_mm512_mask3_fnmsub_round_pd, _mm512_mask3_fnmsub_round_ps,
	_mm512_mask_add_round_pd, _mm512_mask_add_round_ps,
	_mm512_mask_alignr_epi32, _mm512_mask_alignr_epi64,
	_mm512_mask_div_round_pd, _mm512_mask_div_round_ps,
	_mm512_mask_fmadd_round_pd, _mm512_mask_fmadd_round_ps,
	_mm512_mask_fmaddsub_round_pd, _mm512_mask_fmaddsub_round_ps,
	_mm512_mask_fmsub_round_pd, _mm512_mask_fmsub_round_ps,
	_mm512_mask_fmsubadd_round_pd, _mm512_mask_fmsubadd_round_ps,
	_mm512_mask_fnmadd_round_pd, _mm512_mask_fnmadd_round_ps,
	_mm512_mask_fnmsub_round_pd, _mm512_mask_fnmsub_round_ps,
	_mm512_mask_i32gather_epi32, _mm512_mask_i32gather_epi64,
	_mm512_mask_i32gather_pd, _mm512_mask_i32gather_ps,
	_mm512_mask_i64gather_epi32, _mm512_mask_i64gather_epi64,
	_mm512_mask_i64gather_pd, _mm512_mask_i64gather_ps,
	_mm512_mask_insertf32x4, _mm512_mask_insertf64x4,
	_mm512_mask_inserti32x4, _mm512_mask_inserti64x4,
	_mm512_mask_max_round_pd, _mm512_mask_max_round_ps,
	_mm512_mask_min_round_pd, _mm512_mask_min_round_ps,
	_mm512_mask_mul_round_pd, _mm512_mask_mul_round_ps,
	_mm512_mask_scalef_round_pd, _mm512_mask_scalef_round_ps,
	_mm512_mask_shuffle_f32x4, _mm512_mask_shuffle_f64x2,
	_mm512_mask_shuffle_i32x4, _mm512_mask_shuffle_i64x2,
	_mm512_mask_shuffle_pd, _mm512_mask_shuffle_ps,
	_mm512_mask_sub_round_pd, _mm512_mask_sub_round_ps,
	_mm512_mask_ternarylogic_epi32, _mm512_mask_ternarylogic_epi64,
	_mm512_maskz_fmadd_round_pd, _mm512_maskz_fmadd_round_ps,
	_mm512_maskz_fmaddsub_round_pd, _mm512_maskz_fmaddsub_round_ps,
	_mm512_maskz_fmsub_round_pd, _mm512_maskz_fmsub_round_ps,
	_mm512_maskz_fmsubadd_round_pd, _mm512_maskz_fmsubadd_round_ps,
	_mm512_maskz_fnmadd_round_pd, _mm512_maskz_fnmadd_round_ps,
	_mm512_maskz_fnmsub_round_pd, _mm512_maskz_fnmsub_round_ps,
	_mm512_maskz_ternarylogic_epi32, _mm512_maskz_ternarylogic_epi64,
	_mm_mask3_fmadd_round_sd, _mm_mask3_fmadd_round_ss,
	_mm_mask3_fmsub_round_sd, _mm_mask3_fmsub_round_ss,
	_mm_mask3_fnmadd_round_sd, _mm_mask3_fnmadd_round_ss,
	_mm_mask3_fnmsub_round_sd, _mm_mask3_fnmsub_round_ss,
	_mm_mask_add_round_sd, _mm_mask_add_round_ss, _mm_mask_cvt_roundsd_ss,
	_mm_mask_cvt_roundss_sd, _mm_mask_div_round_sd, _mm_mask_div_round_ss,
	_mm_mask_fmadd_round_sd, _mm_mask_fmadd_round_ss,
	_mm_mask_fmsub_round_sd, _mm_mask_fmsub_round_ss,
	_mm_mask_fnmadd_round_sd, _mm_mask_fnmadd_round_ss,
	_mm_mask_fnmsub_round_sd, _mm_mask_fnmsub_round_ss,
	_mm_mask_getexp_round_sd, _mm_mask_getexp_round_ss,
	_mm_mask_getmant_round_sd, _mm_mask_getmant_round_ss,
	_mm_mask_mul_round_sd, _mm_mask_mul_round_ss,
	_mm_mask_scalef_round_sd, _mm_mask_scalef_round_ss,
	_mm_mask_sqrt_round_sd, _mm_mask_sqrt_round_ss, _mm_mask_sub_round_sd,
	_mm_mask_sub_round_ss, _mm_maskz_fmadd_round_sd,
	_mm_maskz_fmadd_round_ss, _mm_maskz_fmsub_round_sd,
	_mm_maskz_fmsub_round_ss, _mm_maskz_fnmadd_round_sd,
	_mm_maskz_fnmadd_round_ss, _mm_maskz_fnmsub_round_sd,
	_mm_maskz_fnmsub_round_ss, _mm512_mask_i32scatter_epi32,
	_mm512_mask_i32scatter_epi64, _mm512_mask_i32scatter_pd,
	_mm512_mask_i32scatter_ps, _mm512_mask_i64scatter_epi32,
	_mm512_mask_i64scatter_epi64, _mm512_mask_i64scatter_pd,
	_mm512_mask_i64scatter_ps, _mm_mask_getmant_sd, _mm_mask_getmant_ss,
	_mm_mask_roundscale_round_sd, _mm_mask_roundscale_round_ss,
	_mm512_mask_fixupimm_round_pd, _mm512_mask_fixupimm_round_ps,
	_mm512_maskz_fixupimm_round_pd, _mm512_maskz_fixupimm_round_ps,
	_mm_mask_fixupimm_round_sd, _mm_mask_fixupimm_round_ss,
	_mm_maskz_fixupimm_round_sd, _mm_maskz_fixupimm_round_ss,
	_mm512_mask_prefetch_i32gather_ps, _mm512_mask_prefetch_i32scatter_ps,
	_mm512_mask_prefetch_i64gather_ps, _mm512_mask_prefetch_i64scatter_ps,
	_mm512_exp2a23_round_pd, _mm512_exp2a23_round_ps,
	_mm512_rcp28_round_pd, _mm512_rcp28_round_ps, _mm512_rsqrt28_round_pd,
	_mm512_rsqrt28_round_ps, _mm512_maskz_exp2a23_round_pd,
	_mm512_maskz_exp2a23_round_ps, _mm512_maskz_rcp28_round_pd,
	_mm512_maskz_rcp28_round_ps, _mm512_maskz_rsqrt28_round_pd,
	_mm512_maskz_rsqrt28_round_ps, _mm512_mask_exp2a23_round_pd,
	_mm512_mask_exp2a23_round_ps, _mm512_mask_rcp28_round_pd,
	_mm512_mask_rcp28_round_ps, _mm512_mask_rsqrt28_round_pd,
	_mm512_mask_rsqrt28_round_ps.
	* gcc.target/i386/sse-22.c (pragma GCC target): Add defines for
	__builtin_ia32_addpd512_mask, __builtin_ia32_addps512_mask,
	__builtin_ia32_addsd_mask, __builtin_ia32_addss_mask,
	__builtin_ia32_alignd512_mask, __builtin_ia32_alignq512_mask,
	__builtin_ia32_cmpd512_mask, __builtin_ia32_cmppd512_mask,
	__builtin_ia32_cmpps512_mask, __builtin_ia32_cmpq512_mask,
	__builtin_ia32_cmpsd_mask, __builtin_ia32_cmpss_mask,
	__builtin_ia32_cvtdq2ps512_mask, __builtin_ia32_cvtpd2dq512_mask,
	__builtin_ia32_cvtpd2ps512_mask, __builtin_ia32_cvtpd2udq512_mask,
	__builtin_ia32_cvtps2dq512_mask, __builtin_ia32_cvtps2pd512_mask,
	__builtin_ia32_cvtps2udq512_mask, __builtin_ia32_cvtsd2ss_mask,
	__builtin_ia32_cvtsi2sd64, __builtin_ia32_cvtsi2ss32,
	__builtin_ia32_cvtsi2ss64, __builtin_ia32_cvtss2sd_mask,
	__builtin_ia32_cvttpd2dq512_mask, __builtin_ia32_cvttpd2udq512_mask,
	__builtin_ia32_cvttps2dq512_mask, __builtin_ia32_cvttps2udq512_mask,
	__builtin_ia32_cvtudq2ps512_mask, __builtin_ia32_cvtusi2sd64,
	__builtin_ia32_cvtusi2ss32, __builtin_ia32_cvtusi2ss64,
	__builtin_ia32_divpd512_mask, __builtin_ia32_divps512_mask,
	__builtin_ia32_divsd_mask, __builtin_ia32_divss_mask,
	__builtin_ia32_extractf32x4_mask, __builtin_ia32_extractf64x4_mask,
	__builtin_ia32_extracti32x4_mask, __builtin_ia32_extracti64x4_mask,
	__builtin_ia32_fixupimmpd512_mask, __builtin_ia32_fixupimmpd512_maskz,
	__builtin_ia32_fixupimmps512_mask, __builtin_ia32_fixupimmps512_maskz,
	__builtin_ia32_fixupimmsd_mask, __builtin_ia32_fixupimmsd_maskz,
	__builtin_ia32_fixupimmss_mask, __builtin_ia32_fixupimmss_maskz,
	__builtin_ia32_gatherdiv8df, __builtin_ia32_gatherdiv8di,
	__builtin_ia32_gatherdiv16sf, __builtin_ia32_gatherdiv16si,
	__builtin_ia32_gathersiv16sf, __builtin_ia32_gathersiv16si,
	__builtin_ia32_gathersiv8df, __builtin_ia32_gathersiv8di,
	__builtin_ia32_getexppd512_mask, __builtin_ia32_getexpps512_mask,
	__builtin_ia32_getexpsd128_mask, __builtin_ia32_getexpss128_mask,
	__builtin_ia32_getmantpd512_mask, __builtin_ia32_getmantps512_mask,
	__builtin_ia32_getmantsd_mask, __builtin_ia32_getmantss_mask,
	__builtin_ia32_insertf32x4_mask, __builtin_ia32_insertf64x4_mask,
	__builtin_ia32_inserti32x4_mask, __builtin_ia32_inserti64x4_mask,
	__builtin_ia32_maxpd512_mask, __builtin_ia32_maxps512_mask,
	__builtin_ia32_maxsd_mask, __builtin_ia32_maxss_mask,
	__builtin_ia32_minpd512_mask, __builtin_ia32_minps512_mask,
	__builtin_ia32_minsd_mask, __builtin_ia32_minss_mask,
	__builtin_ia32_mulpd512_mask, __builtin_ia32_mulps512_mask,
	__builtin_ia32_mulsd_mask, __builtin_ia32_mulss_mask,
	__builtin_ia32_permdf512_mask, __builtin_ia32_permdi512_mask,
	__builtin_ia32_prold512_mask, __builtin_ia32_prolq512_mask,
	__builtin_ia32_prord512_mask, __builtin_ia32_prorq512_mask,
	__builtin_ia32_pshufd512_mask, __builtin_ia32_pslldi512_mask,
	__builtin_ia32_psllqi512_mask, __builtin_ia32_psradi512_mask,
	__builtin_ia32_psraqi512_mask, __builtin_ia32_psrldi512_mask,
	__builtin_ia32_psrlqi512_mask, __builtin_ia32_pternlogd512_mask,
	__builtin_ia32_pternlogd512_maskz, __builtin_ia32_pternlogq512_mask,
	__builtin_ia32_pternlogq512_maskz, __builtin_ia32_rndscalepd_mask,
	__builtin_ia32_rndscaleps_mask, __builtin_ia32_rndscalesd_mask,
	__builtin_ia32_rndscaless_mask, __builtin_ia32_scalefpd512_mask,
	__builtin_ia32_scalefps512_mask, __builtin_ia32_scalefsd_mask,
	__builtin_ia32_scalefss_mask, __builtin_ia32_scatterdiv8df,
	__builtin_ia32_scatterdiv8di, __builtin_ia32_scatterdiv16sf,
	__builtin_ia32_scatterdiv16si, __builtin_ia32_scattersiv16sf,
	__builtin_ia32_scattersiv16si, __builtin_ia32_scattersiv8df,
	__builtin_ia32_scattersiv8di, __builtin_ia32_shuf_f32x4_mask,
	__builtin_ia32_shuf_f64x2_mask, __builtin_ia32_shuf_i32x4_mask,
	__builtin_ia32_shuf_i64x2_mask, __builtin_ia32_shufpd512_mask,
	__builtin_ia32_shufps512_mask, __builtin_ia32_sqrtpd512_mask,
	__builtin_ia32_sqrtps512_mask, __builtin_ia32_sqrtsd_mask,
	__builtin_ia32_sqrtss_mask, __builtin_ia32_subpd512_mask,
	__builtin_ia32_subps512_mask, __builtin_ia32_subsd_mask,
	__builtin_ia32_subss_mask, __builtin_ia32_ucmpd512_mask,
	__builtin_ia32_ucmpq512_mask, __builtin_ia32_vcomisd,
	__builtin_ia32_vcomiss, __builtin_ia32_vcvtph2ps512_mask,
	__builtin_ia32_vcvtps2ph512_mask, __builtin_ia32_vcvtsd2si32,
	__builtin_ia32_vcvtsd2si64, __builtin_ia32_vcvtsd2usi32,
	__builtin_ia32_vcvtsd2usi64, __builtin_ia32_vcvtss2si32,
	__builtin_ia32_vcvtss2si64, __builtin_ia32_vcvtss2usi32,
	__builtin_ia32_vcvtss2usi64, __builtin_ia32_vcvttsd2si32,
	__builtin_ia32_vcvttsd2si64, __builtin_ia32_vcvttsd2usi32,
	__builtin_ia32_vcvttsd2usi64, __builtin_ia32_vcvttss2si32,
	__builtin_ia32_vcvttss2si64, __builtin_ia32_vcvttss2usi32,
	__builtin_ia32_vcvttss2usi64, __builtin_ia32_vfmaddpd512_mask,
	__builtin_ia32_vfmaddpd512_mask3, __builtin_ia32_vfmaddpd512_maskz,
	__builtin_ia32_vfmaddps512_mask, __builtin_ia32_vfmaddps512_mask3,
	__builtin_ia32_vfmaddps512_maskz, __builtin_ia32_vfmaddsd3_mask,
	__builtin_ia32_vfmaddsd3_mask3, __builtin_ia32_vfmaddsd3_maskz,
	__builtin_ia32_vfmaddss3_mask, __builtin_ia32_vfmaddss3_mask3,
	__builtin_ia32_vfmaddss3_maskz, __builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_exp2ps_mask,
	__builtin_ia32_exp2pd_mask, __builtin_ia32_exp2ps_mask,
	__builtin_ia32_exp2pd_mask, __builtin_ia32_rsqrt28ps_mask,
	__builtin_ia32_rsqrt28pd_mask, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps, __builtin_ia32_addpd512_mask,
	__builtin_ia32_addps512_mask, __builtin_ia32_addsd_mask,
	__builtin_ia32_addss_mask, __builtin_ia32_alignd512_mask,
	__builtin_ia32_alignq512_mask, __builtin_ia32_cmpd512_mask,
	__builtin_ia32_cmppd512_mask, __builtin_ia32_cmpps512_mask,
	__builtin_ia32_cmpq512_mask, __builtin_ia32_cmpsd_mask,
	__builtin_ia32_cmpss_mask, __builtin_ia32_cvtdq2ps512_mask,
	__builtin_ia32_cvtpd2dq512_mask, __builtin_ia32_cvtpd2ps512_mask,
	__builtin_ia32_cvtpd2udq512_mask, __builtin_ia32_cvtps2dq512_mask,
	__builtin_ia32_cvtps2pd512_mask, __builtin_ia32_cvtps2udq512_mask,
	__builtin_ia32_cvtsd2ss_mask, __builtin_ia32_cvtsi2sd64,
	__builtin_ia32_cvtsi2ss32, __builtin_ia32_cvtsi2ss64,
	__builtin_ia32_cvtss2sd_mask, __builtin_ia32_cvttpd2dq512_mask,
	__builtin_ia32_cvttpd2udq512_mask, __builtin_ia32_cvttps2dq512_mask,
	__builtin_ia32_cvttps2udq512_mask, __builtin_ia32_cvtudq2ps512_mask,
	__builtin_ia32_cvtusi2sd64, __builtin_ia32_cvtusi2ss32,
	__builtin_ia32_cvtusi2ss64, __builtin_ia32_divpd512_mask,
	__builtin_ia32_divps512_mask, __builtin_ia32_divsd_mask,
	__builtin_ia32_divss_mask, __builtin_ia32_extractf32x4_mask,
	__builtin_ia32_extractf64x4_mask, __builtin_ia32_extracti32x4_mask,
	__builtin_ia32_extracti64x4_mask, __builtin_ia32_fixupimmpd512_mask,
	__builtin_ia32_fixupimmpd512_maskz, __builtin_ia32_fixupimmps512_mask,
	__builtin_ia32_fixupimmps512_maskz, __builtin_ia32_fixupimmsd_mask,
	__builtin_ia32_fixupimmsd_maskz, __builtin_ia32_fixupimmss_mask,
	__builtin_ia32_fixupimmss_maskz, __builtin_ia32_gatherdiv8df,
	__builtin_ia32_gatherdiv8di, __builtin_ia32_gatherdiv16sf,
	__builtin_ia32_gatherdiv16si, __builtin_ia32_gathersiv16sf,
	__builtin_ia32_gathersiv16si, __builtin_ia32_gathersiv8df,
	__builtin_ia32_gathersiv8di, __builtin_ia32_getexppd512_mask,
	__builtin_ia32_getexpps512_mask, __builtin_ia32_getexpsd128_mask,
	__builtin_ia32_getexpss128_mask, __builtin_ia32_getmantpd512_mask,
	__builtin_ia32_getmantps512_mask, __builtin_ia32_getmantsd_mask,
	__builtin_ia32_getmantss_mask, __builtin_ia32_insertf32x4_mask,
	__builtin_ia32_insertf64x4_mask, __builtin_ia32_inserti32x4_mask,
	__builtin_ia32_inserti64x4_mask, __builtin_ia32_maxpd512_mask,
	__builtin_ia32_maxps512_mask, __builtin_ia32_maxsd_mask,
	__builtin_ia32_maxss_mask, __builtin_ia32_minpd512_mask,
	__builtin_ia32_minps512_mask, __builtin_ia32_minsd_mask,
	__builtin_ia32_minss_mask, __builtin_ia32_mulpd512_mask,
	__builtin_ia32_mulps512_mask, __builtin_ia32_mulsd_mask,
	__builtin_ia32_mulss_mask, __builtin_ia32_permdf512_mask,
	__builtin_ia32_permdi512_mask, __builtin_ia32_prold512_mask,
	__builtin_ia32_prolq512_mask, __builtin_ia32_prord512_mask,
	__builtin_ia32_prorq512_mask, __builtin_ia32_pshufd512_mask,
	__builtin_ia32_pslldi512_mask, __builtin_ia32_psllqi512_mask,
	__builtin_ia32_psradi512_mask, __builtin_ia32_psraqi512_mask,
	__builtin_ia32_psrldi512_mask, __builtin_ia32_psrlqi512_mask,
	__builtin_ia32_pternlogd512_mask, __builtin_ia32_pternlogd512_maskz,
	__builtin_ia32_pternlogq512_mask, __builtin_ia32_pternlogq512_maskz,
	__builtin_ia32_rndscalepd_mask, __builtin_ia32_rndscaleps_mask,
	__builtin_ia32_rndscalesd_mask, __builtin_ia32_rndscaless_mask,
	__builtin_ia32_scalefpd512_mask, __builtin_ia32_scalefps512_mask,
	__builtin_ia32_scalefsd_mask, __builtin_ia32_scalefss_mask,
	__builtin_ia32_scatterdiv8df, __builtin_ia32_scatterdiv8di,
	__builtin_ia32_scatterdiv16sf, __builtin_ia32_scatterdiv16si,
	__builtin_ia32_scattersiv16sf, __builtin_ia32_scattersiv16si,
	__builtin_ia32_scattersiv8df, __builtin_ia32_scattersiv8di,
	__builtin_ia32_shuf_f32x4_mask, __builtin_ia32_shuf_f64x2_mask,
	__builtin_ia32_shuf_i32x4_mask, __builtin_ia32_shuf_i64x2_mask,
	__builtin_ia32_shufpd512_mask, __builtin_ia32_shufps512_mask,
	__builtin_ia32_sqrtpd512_mask, __builtin_ia32_sqrtps512_mask,
	__builtin_ia32_sqrtsd_mask, __builtin_ia32_sqrtss_mask,
	__builtin_ia32_subpd512_mask, __builtin_ia32_subps512_mask,
	__builtin_ia32_subsd_mask, __builtin_ia32_subss_mask,
	__builtin_ia32_ucmpd512_mask, __builtin_ia32_ucmpq512_mask,
	__builtin_ia32_vcomisd, __builtin_ia32_vcomiss,
	__builtin_ia32_vcvtph2ps512_mask, __builtin_ia32_vcvtps2ph512_mask,
	__builtin_ia32_vcvtsd2si32, __builtin_ia32_vcvtsd2si64,
	__builtin_ia32_vcvtsd2usi32, __builtin_ia32_vcvtsd2usi64,
	__builtin_ia32_vcvtss2si32, __builtin_ia32_vcvtss2si64,
	__builtin_ia32_vcvtss2usi32, __builtin_ia32_vcvtss2usi64,
	__builtin_ia32_vcvttsd2si32, __builtin_ia32_vcvttsd2si64,
	__builtin_ia32_vcvttsd2usi32, __builtin_ia32_vcvttsd2usi64,
	__builtin_ia32_vcvttss2si32, __builtin_ia32_vcvttss2si64,
	__builtin_ia32_vcvttss2usi32, __builtin_ia32_vcvttss2usi64,
	__builtin_ia32_vfmaddpd512_mask, __builtin_ia32_vfmaddpd512_mask3,
	__builtin_ia32_vfmaddpd512_maskz, __builtin_ia32_vfmaddps512_mask,
	__builtin_ia32_vfmaddps512_mask3, __builtin_ia32_vfmaddps512_maskz,
	__builtin_ia32_vfmaddsd3_mask, __builtin_ia32_vfmaddsd3_mask3,
	__builtin_ia32_vfmaddsd3_maskz, __builtin_ia32_vfmaddss3_mask,
	__builtin_ia32_vfmaddss3_mask3, __builtin_ia32_vfmaddss3_maskz,
	__builtin_ia32_vfmaddsubpd512_mask,
	__builtin_ia32_vfmaddsubpd512_mask3,
	__builtin_ia32_vfmaddsubpd512_maskz,
	__builtin_ia32_vfmaddsubps512_mask,
	__builtin_ia32_vfmaddsubps512_mask3,
	__builtin_ia32_vfmaddsubps512_maskz,
	__builtin_ia32_vfmsubaddpd512_mask3,
	__builtin_ia32_vfmsubaddps512_mask3, __builtin_ia32_vfmsubpd512_mask3,
	__builtin_ia32_vfmsubps512_mask3, __builtin_ia32_vfmsubsd3_mask3,
	__builtin_ia32_vfmsubss3_mask3, __builtin_ia32_vfnmaddpd512_mask,
	__builtin_ia32_vfnmaddps512_mask, __builtin_ia32_vfnmsubpd512_mask,
	__builtin_ia32_vfnmsubpd512_mask3, __builtin_ia32_vfnmsubps512_mask,
	__builtin_ia32_vfnmsubps512_mask3, __builtin_ia32_vpermilpd512_mask,
	__builtin_ia32_vpermilps512_mask, __builtin_ia32_gatherpfdps,
	__builtin_ia32_gatherpfqps, __builtin_ia32_scatterpfdps,
	__builtin_ia32_scatterpfqps, __builtin_ia32_exp2pd_mask,
	__builtin_ia32_exp2ps_mask, __builtin_ia32_rcp28pd_mask,
	__builtin_ia32_rcp28ps_mask, __builtin_ia32_rsqrt28pd_mask,
	__builtin_ia32_rsqrt28ps_mask.
	(pragma GCC target): Add avx512f, avx512er, avx512pf, avx512cd.

--
Thanks, K

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Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Kirill Yukhin]

Hello
> Ok for trunk?
Ping?

--
Thanks, K

Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Kirill Yukhin]

[-- Attachment #1: Type: text/plain, Size: 122 bytes --]

Hello,

On 02 Dec 16:15, Kirill Yukhin wrote:
> Hello
> > Ok for trunk?
> Ping?
Ping.

Rebased patch attached.

Thanks, K

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Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Uros Bizjak]

On Wed, Dec 18, 2013 at 2:21 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
>
> On 02 Dec 16:15, Kirill Yukhin wrote:
>> Hello
>> > Ok for trunk?
>> Ping?
> Ping.
>
> Rebased patch attached.

+      error ("third argument must be comparison constant.");

"the third ...", without dot at the end. Please review many other
instances of either missing "the" and/or unneded dot.
+          error ("the immediate argument must be 4-bit immediate.");

"... an 4-bit immediate"

+      error ("last argument must be scale 1, 2, 4, 8");

"the last ..."

+      error ("forth argument must be scale 1, 2, 4, 8");

"the fourth ..."

(disclaimer: English is not my native language).

+/* Walk through insns sequence or pattern and erase rounding mentions.
+   Main transformation is performed in ix86_erase_embedded_rounding_1.  */
+static rtx
+ix86_erase_embedded_rounding (rtx pat)

All calls to this function are made with insn pattern, so we can
remove this function and use ix86_erase_embedded_rounding_1 directly
instead. The function to handle sequences can be re-introduced when
needed, probably in a later patch.

@@ -34092,6 +35818,16 @@ ix86_builtin_vectorized_function (tree
fndecl, tree type_out,

Changes to ix86_builtin_vectorized_function belong to "[PATCH i386
5/8] [AVX-512] Extend vectorizer hooks.". This one is already huge...

So, based on following findings:
- the patch uses standard builtin expansion infrastructure and
expansion approaches
- headers and builtins survive gcc.target/i386/sse-{12,13,14,22,23}.c
and g++.dg/other/i386-{2,3}.C regression smoketests
- the functionality is covered by extensive testsuite

the patch is OK (with above mentioned changes) for mainline.

Uros.

Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Kirill Yukhin]

Hello,

On 18 Dec 18:16, Uros Bizjak wrote:
> the patch is OK (with above mentioned changes) for mainline.
Thanks,

One more nit. It seems that currently vectorizer expects mask_type to
be equal to operand_type, which doesn't hold for AVX-512F.

So, I'll comment out like this:

@@ -34677,6 +36423,31 @@ ix86_vectorize_builtin_gather (const_tree mem_vectype,
     case V8SImode:
       code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
       break;
+    /*  FIXME: Commented until vectorizer can work with (mask_type != src_type)
+    case V8DFmode:
+      if (TARGET_AVX512F)
+       code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
+      else
+       return NULL_TREE;
+      break;
+    case V8DImode:
+      if (TARGET_AVX512F)
+       code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
+      else
+       return NULL_TREE;
+      break;
+    case V16SFmode:
+      if (TARGET_AVX512F)
+       code = si ? IX86_BUILTIN_GATHER3SIV16SF :
IX86_BUILTIN_GATHER3ALTDIV16SF;
+      else
+       return NULL_TREE;
+      break;
+    case V16SImode:
+      if (TARGET_AVX512F)
+       code = si ? IX86_BUILTIN_GATHER3SIV16SI :
IX86_BUILTIN_GATHER3ALTDIV16SI;
+      else
+       return NULL_TREE;
+      break;  */

Mark avx512f-gather-*.c tests with XFAIL, submit PR and move whole hunk to 5/8.

Objections?

--
Thanks, K

Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Uros Bizjak]

On Fri, Dec 27, 2013 at 4:04 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:

> On 18 Dec 18:16, Uros Bizjak wrote:
>> the patch is OK (with above mentioned changes) for mainline.
> Thanks,
>
> One more nit. It seems that currently vectorizer expects mask_type to
> be equal to operand_type, which doesn't hold for AVX-512F.
>
> So, I'll comment out like this:
>
> @@ -34677,6 +36423,31 @@ ix86_vectorize_builtin_gather (const_tree mem_vectype,
>      case V8SImode:
>        code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI;
>        break;
> +    /*  FIXME: Commented until vectorizer can work with (mask_type != src_type)
> +    case V8DFmode:
> +      if (TARGET_AVX512F)
> +       code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF;
> +      else
> +       return NULL_TREE;
> +      break;
> +    case V8DImode:
> +      if (TARGET_AVX512F)
> +       code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI;
> +      else
> +       return NULL_TREE;
> +      break;
> +    case V16SFmode:
> +      if (TARGET_AVX512F)
> +       code = si ? IX86_BUILTIN_GATHER3SIV16SF :
> IX86_BUILTIN_GATHER3ALTDIV16SF;
> +      else
> +       return NULL_TREE;
> +      break;
> +    case V16SImode:
> +      if (TARGET_AVX512F)
> +       code = si ? IX86_BUILTIN_GATHER3SIV16SI :
> IX86_BUILTIN_GATHER3ALTDIV16SI;
> +      else
> +       return NULL_TREE;
> +      break;  */
>
> Mark avx512f-gather-*.c tests with XFAIL, submit PR and move whole hunk to 5/8.

Please put this part into #if 0/#endif, with the reference to the PR.
Also add PR reference to xfailed tests.

Thanks,
Uros.

Re: [PATCH i386 6/8] [AVX-512] Add builtins/intrinsics.

[Kirill Yukhin]

[-- Attachment #1: Type: text/plain, Size: 1862 bytes --]

Hello Uroš,
On 18 Dec 18:16, Uros Bizjak wrote:
> +/* Walk through insns sequence or pattern and erase rounding mentions.
> +   Main transformation is performed in ix86_erase_embedded_rounding_1.  */
> +static rtx
> +ix86_erase_embedded_rounding (rtx pat)
> 
> All calls to this function are made with insn pattern, so we can
> remove this function and use ix86_erase_embedded_rounding_1 directly
> instead. The function to handle sequences can be re-introduced when
> needed, probably in a later patch.
The problem is that any define_expand is ultimately insn_sequence, e.g.:
rtx
gen_addv16sf3 (rtx operand0,
        rtx operand1,
        rtx operand2)
{
  rtx _val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
ix86_fixup_binary_operands_no_copy (PLUS, V16SFmode, operands);
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (VOIDmode,
        operand0,
        gen_rtx_PLUS (V16SFmode,
        operand1,
        operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

While for define_insn we have:
rtx
gen_avx512f_getexpv16sf (rtx operand0 ATTRIBUTE_UNUSED,
        rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (VOIDmode,
        operand0,
        gen_rtx_UNSPEC (V16SFmode,
        gen_rtvec (1,
                operand1),
        148));
}
Which is actually not an INSN.

As far as we have all that sequences size equal to 1, we may replace these
two routines with single + simple check:
  static rtx
  ix86_erase_embedded_rounding (rtx pat)
  {
    if (GET_CODE (pat) == INSN)
      pat = PATTERN (pat);
  ...

I am testing attached patch. If no objections - I'll commit it tomorrow
(Moscow time).

--
Thanks, K

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