From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4294 invoked by alias); 14 Feb 2014 22:59:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 4280 invoked by uid 89); 14 Feb 2014 22:59:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.5 required=5.0 tests=AWL,BAYES_00 autolearn=ham version=3.3.2 X-HELO: e32.co.us.ibm.com Received: from e32.co.us.ibm.com (HELO e32.co.us.ibm.com) (32.97.110.150) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Fri, 14 Feb 2014 22:59:56 +0000 Received: from /spool/local by e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Fri, 14 Feb 2014 15:59:51 -0700 Received: from b03cxnp08025.gho.boulder.ibm.com (b03cxnp08025.gho.boulder.ibm.com [9.17.130.17]) by d03dlp01.boulder.ibm.com (Postfix) with ESMTP id D4AB61FF001B for ; Fri, 14 Feb 2014 15:59:50 -0700 (MST) Received: from d03av06.boulder.ibm.com (d03av06.boulder.ibm.com [9.17.195.245]) by b03cxnp08025.gho.boulder.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s1EMxoQS7995674 for ; Fri, 14 Feb 2014 23:59:50 +0100 Received: from d03av06.boulder.ibm.com (loopback [127.0.0.1]) by d03av06.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVout) with ESMTP id s1EN3D5i007373 for ; Fri, 14 Feb 2014 16:03:13 -0700 Received: from ibm-tiger.the-meissners.org (dhcp-9-32-77-206.usma.ibm.com [9.32.77.206]) by d03av06.boulder.ibm.com (8.14.4/8.13.1/NCO v10.0 AVin) with ESMTP id s1EN3DWW007364; Fri, 14 Feb 2014 16:03:13 -0700 Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id 6577043C49; Fri, 14 Feb 2014 17:59:49 -0500 (EST) Date: Fri, 14 Feb 2014 22:59:00 -0000 From: Michael Meissner To: gcc-patches@gcc.gnu.org, dje.gcc@gmail.com Subject: [PATCH] Fix PR 60203: No direct move support for long double/_Decimal128 on powerpc ISA 2.07 Message-ID: <20140214225948.GA18526@ibm-tiger.the-meissners.org> Mail-Followup-To: Michael Meissner , gcc-patches@gcc.gnu.org, dje.gcc@gmail.com MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="k1lZvvs/B4yU6o8G" Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14021422-0928-0000-0000-000006A62D7C X-IsSubscribed: yes X-SW-Source: 2014-02/txt/msg00953.txt.bz2 --k1lZvvs/B4yU6o8G Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-length: 1266 When I added direct move support for ISA 2.07 (power8), I did not add direct move support for long double and _Decimal128 types. This patch adds the direct move support for those types when you are running in 64-bit mode. Now, there are still the problems raised in PR 25972 on machines without direct move, but this simple patch does help the machines with direct move. I bootstrapped the compiler with/without the change, and there were no regressions in the test suite. Is it ok to check into the tree? [gcc] 2014-02-14 Michael Meissner PR target/60203 * config/rs6000/rs6000.md (rreg): Add TFmode, TDmode constraints. (mov_internal, TFmode/TDmode): Split TFmode/TDmode moves into 64-bit and 32-bit moves. On 64-bit moves, add support for using direct move instructions on ISA 2.07. Also adjust instruction length for 64-bit. (mov_64bit, TFmode/TDmode): Likewise. (mov_32bit, TFmode/TDmode): Likewise. [gcc/testsuite] 2014-02-14 Michael Meissner PR target/60203 * gcc.target/powerpc/pr60203.c: New testsuite. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797 --k1lZvvs/B4yU6o8G Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="pr60203.patch01b" Content-length: 1532 Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 207791) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -387,6 +387,8 @@ (define_mode_attr ptrm [(SI "m") (define_mode_attr rreg [(SF "f") (DF "ws") + (TF "f") + (TD "f") (V4SF "wf") (V2DF "wd")]) @@ -9524,10 +9526,22 @@ (define_expand "mov" ;; It's important to list Y->r and r->Y before r->r because otherwise ;; reload, given m->r, will try to pick r->r and reload it, which ;; doesn't make progress. -(define_insn_and_split "*mov_internal" +(define_insn_and_split "*mov_64bit" + [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r,r,wm") + (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r,wm,r"))] + "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 + && (gpc_reg_operand (operands[0], mode) + || gpc_reg_operand (operands[1], mode))" + "#" + "&& reload_completed" + [(pc)] +{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; } + [(set_attr "length" "8,8,8,12,12,8,8,8")]) + +(define_insn_and_split "*mov_32bit" [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r") (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r"))] - "TARGET_HARD_FLOAT && TARGET_FPRS + "TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_POWERPC64 && (gpc_reg_operand (operands[0], mode) || gpc_reg_operand (operands[1], mode))" "#" --k1lZvvs/B4yU6o8G--