* [PATCH] PR62120
@ 2014-09-01 10:43 Ilya Tocar
2014-09-01 10:55 ` Jakub Jelinek
0 siblings, 1 reply; 6+ messages in thread
From: Ilya Tocar @ 2014-09-01 10:43 UTC (permalink / raw)
To: GCC Patches
Hi, this patch adds checks for registers availability, when
alternative/numeric name is used.
Bootstraps/passes make-check on x86-64.
Ok for trunk?
ChangeLog:
gcc/
2014-09-01 Ilya Tocar <ilya.tocar@intel.com>
* varasm.c (decode_reg_name_and_count): Check availability for
registers from ADDITIONAL_REGISTER_NAMES.
---
gcc/varasm.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/gcc/varasm.c b/gcc/varasm.c
index 9d8602b..1d6f79f 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -888,7 +888,7 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
if (asmspec[0] != 0 && i < 0)
{
i = atoi (asmspec);
- if (i < FIRST_PSEUDO_REGISTER && i >= 0)
+ if (i < FIRST_PSEUDO_REGISTER && i >= 0 && reg_names[i][0])
return i;
else
return -2;
@@ -925,7 +925,8 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
for (i = 0; i < (int) ARRAY_SIZE (table); i++)
if (table[i].name[0]
- && ! strcmp (asmspec, table[i].name))
+ && ! strcmp (asmspec, table[i].name)
+ && reg_names[table[i].number][0])
return table[i].number;
}
#endif /* ADDITIONAL_REGISTER_NAMES */
--
1.8.3.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] PR62120
2014-09-01 10:43 [PATCH] PR62120 Ilya Tocar
@ 2014-09-01 10:55 ` Jakub Jelinek
2014-09-01 14:38 ` Ilya Tocar
0 siblings, 1 reply; 6+ messages in thread
From: Jakub Jelinek @ 2014-09-01 10:55 UTC (permalink / raw)
To: Ilya Tocar; +Cc: GCC Patches
On Mon, Sep 01, 2014 at 02:43:14PM +0400, Ilya Tocar wrote:
> Hi, this patch adds checks for registers availability, when
> alternative/numeric name is used.
> Bootstraps/passes make-check on x86-64.
> Ok for trunk?
>
> ChangeLog:
>
> gcc/
>
> 2014-09-01 Ilya Tocar <ilya.tocar@intel.com>
>
> * varasm.c (decode_reg_name_and_count): Check availability for
> registers from ADDITIONAL_REGISTER_NAMES.
Please mention the PR in the ChangeLog entry and add some testcases
(can be gcc.target/i386/, but we should have it tested).
Does this change anything on say register short sil __asm ("sil"); in 32-bit
mode (when it IMHO should be rejected too?)?
Jakub
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] PR62120
2014-09-01 10:55 ` Jakub Jelinek
@ 2014-09-01 14:38 ` Ilya Tocar
2014-09-15 14:43 ` Ilya Tocar
0 siblings, 1 reply; 6+ messages in thread
From: Ilya Tocar @ 2014-09-01 14:38 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: GCC Patches
> Please mention the PR in the ChangeLog entry and add some testcases
> (can be gcc.target/i386/, but we should have it tested).
> Does this change anything on say register short sil __asm ("sil"); in 32-bit
> mode (when it IMHO should be rejected too?)?
>
Do we support "sil" at all? In i386.h i see:
/* Note we are omitting these since currently I don't know how
to get gcc to use these, since they want the same but different
number as al, and ax.
*/
#define QI_REGISTER_NAMES \
{"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}
And gcc doesn't recognize sil.
Added testcase, and fixed avx512f-additional-reg-names.c to be valid on
32 bits. Ok for trunk?
gcc/
2014-09-01 Ilya Tocar <ilya.tocar@intel.com>
PR middle-end/62120
* varasm.c (decode_reg_name_and_count): Check availability for
registers from ADDITIONAL_REGISTER_NAMES.
Testsuite/
2014-09-01 Ilya Tocar <ilya.tocar@intel.com>
PR middle-end/62120
* gcc.target/i386/avx512f-additional-reg-names.c: Use register vaild
in 32-bit mode.
* gcc.target/i386/pr62120.c: New.
---
gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c | 2 +-
gcc/testsuite/gcc.target/i386/pr62120.c | 7 +++++++
gcc/varasm.c | 5 +++--
3 files changed, 11 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr62120.c
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
index 164a1de..98a9052 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
@@ -3,7 +3,7 @@
void foo ()
{
- register int zmm_var asm ("zmm9") __attribute__((unused));
+ register int zmm_var asm ("zmm7") __attribute__((unused));
__asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
}
diff --git a/gcc/testsuite/gcc.target/i386/pr62120.c b/gcc/testsuite/gcc.target/i386/pr62120.c
new file mode 100644
index 0000000..8870d48
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr62120.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-sse" } */
+
+void foo ()
+{
+ register int zmm_var asm ("ymm9");/* { dg-error "invalid register name" } */
+}
diff --git a/gcc/varasm.c b/gcc/varasm.c
index de4479c..9638665 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -888,7 +888,7 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
if (asmspec[0] != 0 && i < 0)
{
i = atoi (asmspec);
- if (i < FIRST_PSEUDO_REGISTER && i >= 0)
+ if (i < FIRST_PSEUDO_REGISTER && i >= 0 && reg_names[i][0])
return i;
else
return -2;
@@ -925,7 +925,8 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
for (i = 0; i < (int) ARRAY_SIZE (table); i++)
if (table[i].name[0]
- && ! strcmp (asmspec, table[i].name))
+ && ! strcmp (asmspec, table[i].name)
+ && reg_names[table[i].number][0])
return table[i].number;
}
#endif /* ADDITIONAL_REGISTER_NAMES */
--
1.8.3.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] PR62120
2014-09-01 14:38 ` Ilya Tocar
@ 2014-09-15 14:43 ` Ilya Tocar
2014-09-30 10:44 ` [PATCH][PING] PR62120 Ilya Tocar
0 siblings, 1 reply; 6+ messages in thread
From: Ilya Tocar @ 2014-09-15 14:43 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: GCC Patches
On 01 Sep 18:38, Ilya Tocar wrote:
> > Please mention the PR in the ChangeLog entry and add some testcases
> > (can be gcc.target/i386/, but we should have it tested).
> > Does this change anything on say register short sil __asm ("sil"); in 32-bit
> > mode (when it IMHO should be rejected too?)?
> >
> Do we support "sil" at all? In i386.h i see:
>
> /* Note we are omitting these since currently I don't know how
> to get gcc to use these, since they want the same but different
> number as al, and ax.
> */
> #define QI_REGISTER_NAMES \
> {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}
>
> And gcc doesn't recognize sil.
>
> Added testcase, and fixed avx512f-additional-reg-names.c to be valid on
> 32 bits. Ok for trunk?
>
Slightly updated tests.
Ok for trunk?
gcc/
2014-09-15 Ilya Tocar <ilya.tocar@intel.com>
PR middle-end/62120
* varasm.c (decode_reg_name_and_count): Check availability for
registers from ADDITIONAL_REGISTER_NAMES.
Testsuite/
2014-09-15 Ilya Tocar <ilya.tocar@intel.com>
PR middle-end/62120
* gcc.target/i386/avx512f-additional-reg-names.c: Use register vaild
in 32-bit mode.
* gcc.target/i386/pr62120.c: New.
---
gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c | 2 +-
gcc/testsuite/gcc.target/i386/pr62120.c | 8 ++++++++
gcc/varasm.c | 5 +++--
3 files changed, 12 insertions(+), 3 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr62120.c
diff --git a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
index 164a1de..98a9052 100644
--- a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
+++ b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
@@ -3,7 +3,7 @@
void foo ()
{
- register int zmm_var asm ("zmm9") __attribute__((unused));
+ register int zmm_var asm ("zmm7") __attribute__((unused));
__asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
}
diff --git a/gcc/testsuite/gcc.target/i386/pr62120.c b/gcc/testsuite/gcc.target/i386/pr62120.c
new file mode 100644
index 0000000..bfb8c47
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr62120.c
@@ -0,0 +1,8 @@
+/* { dg-do compile } */
+/* { dg-options "-mno-sse" } */
+
+void foo ()
+{
+ register int zmm_var asm ("ymm9");/* { dg-error "invalid register name" } */
+ register int zmm_var2 asm ("23");/* { dg-error "invalid register name" } */
+}
diff --git a/gcc/varasm.c b/gcc/varasm.c
index cd4a230..9c12b81 100644
--- a/gcc/varasm.c
+++ b/gcc/varasm.c
@@ -888,7 +888,7 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
if (asmspec[0] != 0 && i < 0)
{
i = atoi (asmspec);
- if (i < FIRST_PSEUDO_REGISTER && i >= 0)
+ if (i < FIRST_PSEUDO_REGISTER && i >= 0 && reg_names[i][0])
return i;
else
return -2;
@@ -925,7 +925,8 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
for (i = 0; i < (int) ARRAY_SIZE (table); i++)
if (table[i].name[0]
- && ! strcmp (asmspec, table[i].name))
+ && ! strcmp (asmspec, table[i].name)
+ && reg_names[table[i].number][0])
return table[i].number;
}
#endif /* ADDITIONAL_REGISTER_NAMES */
--
1.8.3.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH][PING] PR62120
2014-09-15 14:43 ` Ilya Tocar
@ 2014-09-30 10:44 ` Ilya Tocar
2014-09-30 10:49 ` Jakub Jelinek
0 siblings, 1 reply; 6+ messages in thread
From: Ilya Tocar @ 2014-09-30 10:44 UTC (permalink / raw)
To: Jakub Jelinek; +Cc: GCC Patches
Ping.
On 15 Sep 18:43, Ilya Tocar wrote:
> On 01 Sep 18:38, Ilya Tocar wrote:
> > > Please mention the PR in the ChangeLog entry and add some testcases
> > > (can be gcc.target/i386/, but we should have it tested).
> > > Does this change anything on say register short sil __asm ("sil"); in 32-bit
> > > mode (when it IMHO should be rejected too?)?
> > >
> > Do we support "sil" at all? In i386.h i see:
> >
> > /* Note we are omitting these since currently I don't know how
> > to get gcc to use these, since they want the same but different
> > number as al, and ax.
> > */
> > #define QI_REGISTER_NAMES \
> > {"al", "dl", "cl", "bl", "sil", "dil", "bpl", "spl",}
> >
> > And gcc doesn't recognize sil.
> >
> > Added testcase, and fixed avx512f-additional-reg-names.c to be valid on
> > 32 bits. Ok for trunk?
> >
>
> Slightly updated tests.
> Ok for trunk?
>
> gcc/
>
> 2014-09-15 Ilya Tocar <ilya.tocar@intel.com>
>
> PR middle-end/62120
> * varasm.c (decode_reg_name_and_count): Check availability for
> registers from ADDITIONAL_REGISTER_NAMES.
>
> Testsuite/
>
> 2014-09-15 Ilya Tocar <ilya.tocar@intel.com>
>
> PR middle-end/62120
> * gcc.target/i386/avx512f-additional-reg-names.c: Use register vaild
> in 32-bit mode.
> * gcc.target/i386/pr62120.c: New.
>
> ---
> gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c | 2 +-
> gcc/testsuite/gcc.target/i386/pr62120.c | 8 ++++++++
> gcc/varasm.c | 5 +++--
> 3 files changed, 12 insertions(+), 3 deletions(-)
> create mode 100644 gcc/testsuite/gcc.target/i386/pr62120.c
>
> diff --git a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
> index 164a1de..98a9052 100644
> --- a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
> +++ b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
> @@ -3,7 +3,7 @@
>
> void foo ()
> {
> - register int zmm_var asm ("zmm9") __attribute__((unused));
> + register int zmm_var asm ("zmm7") __attribute__((unused));
>
> __asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
> }
> diff --git a/gcc/testsuite/gcc.target/i386/pr62120.c b/gcc/testsuite/gcc.target/i386/pr62120.c
> new file mode 100644
> index 0000000..bfb8c47
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/i386/pr62120.c
> @@ -0,0 +1,8 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mno-sse" } */
> +
> +void foo ()
> +{
> + register int zmm_var asm ("ymm9");/* { dg-error "invalid register name" } */
> + register int zmm_var2 asm ("23");/* { dg-error "invalid register name" } */
> +}
> diff --git a/gcc/varasm.c b/gcc/varasm.c
> index cd4a230..9c12b81 100644
> --- a/gcc/varasm.c
> +++ b/gcc/varasm.c
> @@ -888,7 +888,7 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
> if (asmspec[0] != 0 && i < 0)
> {
> i = atoi (asmspec);
> - if (i < FIRST_PSEUDO_REGISTER && i >= 0)
> + if (i < FIRST_PSEUDO_REGISTER && i >= 0 && reg_names[i][0])
> return i;
> else
> return -2;
> @@ -925,7 +925,8 @@ decode_reg_name_and_count (const char *asmspec, int *pnregs)
>
> for (i = 0; i < (int) ARRAY_SIZE (table); i++)
> if (table[i].name[0]
> - && ! strcmp (asmspec, table[i].name))
> + && ! strcmp (asmspec, table[i].name)
> + && reg_names[table[i].number][0])
> return table[i].number;
> }
> #endif /* ADDITIONAL_REGISTER_NAMES */
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH][PING] PR62120
2014-09-30 10:44 ` [PATCH][PING] PR62120 Ilya Tocar
@ 2014-09-30 10:49 ` Jakub Jelinek
0 siblings, 0 replies; 6+ messages in thread
From: Jakub Jelinek @ 2014-09-30 10:49 UTC (permalink / raw)
To: Ilya Tocar; +Cc: GCC Patches
On Tue, Sep 30, 2014 at 02:44:21PM +0400, Ilya Tocar wrote:
> > 2014-09-15 Ilya Tocar <ilya.tocar@intel.com>
> >
> > PR middle-end/62120
> > * varasm.c (decode_reg_name_and_count): Check availability for
> > registers from ADDITIONAL_REGISTER_NAMES.
> >
> > Testsuite/
> >
> > 2014-09-15 Ilya Tocar <ilya.tocar@intel.com>
> >
> > PR middle-end/62120
> > * gcc.target/i386/avx512f-additional-reg-names.c: Use register vaild
s/vaild/valid/
> > in 32-bit mode.
> > * gcc.target/i386/pr62120.c: New.
> >
> > ---
> > gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c | 2 +-
> > gcc/testsuite/gcc.target/i386/pr62120.c | 8 ++++++++
> > gcc/varasm.c | 5 +++--
> > 3 files changed, 12 insertions(+), 3 deletions(-)
> > create mode 100644 gcc/testsuite/gcc.target/i386/pr62120.c
> >
> > diff --git a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
> > index 164a1de..98a9052 100644
> > --- a/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
> > +++ b/gcc/testsuite/gcc.target/i386/avx512f-additional-reg-names.c
> > @@ -3,7 +3,7 @@
> >
> > void foo ()
> > {
> > - register int zmm_var asm ("zmm9") __attribute__((unused));
> > + register int zmm_var asm ("zmm7") __attribute__((unused));
> >
> > __asm__ __volatile__("vxorpd %%zmm0, %%zmm0, %%zmm7\n" : : : "zmm7" );
Please use zmm6 instead, zmm7 is clobbered in the following statement.
Otherwise LGTM.
Jakub
^ permalink raw reply [flat|nested] 6+ messages in thread
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2014-09-01 10:43 [PATCH] PR62120 Ilya Tocar
2014-09-01 10:55 ` Jakub Jelinek
2014-09-01 14:38 ` Ilya Tocar
2014-09-15 14:43 ` Ilya Tocar
2014-09-30 10:44 ` [PATCH][PING] PR62120 Ilya Tocar
2014-09-30 10:49 ` Jakub Jelinek
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