From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 5941 invoked by alias); 14 Jan 2015 11:57:06 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 5923 invoked by uid 89); 14 Jan 2015 11:57:05 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.3 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS,SUBJ_ALL_CAPS autolearn=no version=3.3.2 X-HELO: mail-qc0-f179.google.com Received: from mail-qc0-f179.google.com (HELO mail-qc0-f179.google.com) (209.85.216.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Wed, 14 Jan 2015 11:57:04 +0000 Received: by mail-qc0-f179.google.com with SMTP id c9so6741999qcz.10 for ; Wed, 14 Jan 2015 03:57:02 -0800 (PST) X-Received: by 10.140.48.197 with SMTP id o63mr5385649qga.81.1421236622228; Wed, 14 Jan 2015 03:57:02 -0800 (PST) Received: from msticlxl7.ims.intel.com (jfdmzpr01-ext.jf.intel.com. [134.134.139.70]) by mx.google.com with ESMTPSA id c67sm1626044qgd.45.2015.01.14.03.56.58 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 14 Jan 2015 03:57:01 -0800 (PST) Date: Wed, 14 Jan 2015 12:08:00 -0000 From: Ilya Tocar To: Uros Bizjak Cc: GCC Patches Subject: [PATCH] PR64393 Message-ID: <20150114115649.GB66571@msticlxl7.ims.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes X-SW-Source: 2015-01/txt/msg01028.txt.bz2 Hi, This patch fixes https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64393 It makes -mavx512vbmi enable avx512bw, as it requires 64-bit masks. OK for trunk? ChangeLog: gcc/ PR target/64393 * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VBMI_SET): Enable AVX512BW. (OPTION_MASK_ISA_AVX512BW_UNSET): Disable AVX512BW. * config/i386/i386.c (ix86_hard_regno_mode_ok): Don't check AVX512VBMI, as it implies AVX512BW. testsuite/ PR target/64393 * gcc.target/i386/pr64393.c: New test. --- gcc/common/config/i386/i386-common.c | 5 +++-- gcc/config/i386/i386.c | 2 +- gcc/testsuite/gcc.target/i386/pr64393.c | 12 ++++++++++++ 3 files changed, 16 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr64393.c diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index 77edb47..4e5687a 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -74,7 +74,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_AVX512IFMA_SET \ (OPTION_MASK_ISA_AVX512IFMA | OPTION_MASK_ISA_AVX512F_SET) #define OPTION_MASK_ISA_AVX512VBMI_SET \ - (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512F_SET) + (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET) #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED @@ -171,7 +171,8 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_AVX512PF_UNSET OPTION_MASK_ISA_AVX512PF #define OPTION_MASK_ISA_AVX512ER_UNSET OPTION_MASK_ISA_AVX512ER #define OPTION_MASK_ISA_AVX512DQ_UNSET OPTION_MASK_ISA_AVX512DQ -#define OPTION_MASK_ISA_AVX512BW_UNSET OPTION_MASK_ISA_AVX512BW +#define OPTION_MASK_ISA_AVX512BW_UNSET \ + (OPTION_MASK_ISA_AVX512BW | OPTION_MASK_ISA_AVX512VBMI_UNSET) #define OPTION_MASK_ISA_AVX512VL_UNSET OPTION_MASK_ISA_AVX512VL #define OPTION_MASK_ISA_AVX512IFMA_UNSET OPTION_MASK_ISA_AVX512IFMA #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 7a39f80..91eae5a 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -41669,7 +41669,7 @@ ix86_hard_regno_mode_ok (int regno, machine_mode mode) return VALID_FP_MODE_P (mode); if (MASK_REGNO_P (regno)) return (VALID_MASK_REG_MODE (mode) - || ((TARGET_AVX512BW || TARGET_AVX512VBMI) + || (TARGET_AVX512BW && VALID_MASK_AVX512BW_MODE (mode))); if (BND_REGNO_P (regno)) return VALID_BND_REG_MODE (mode); diff --git a/gcc/testsuite/gcc.target/i386/pr64393.c b/gcc/testsuite/gcc.target/i386/pr64393.c new file mode 100644 index 0000000..37a0e48 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr64393.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-options "-O -mavx512vbmi" } */ + +int a[1024]; + +void +foo (int i) +{ + for (;; i++) + if (a[i] != (i ^ (i * 3) ^ (i * 7))) + return; +} -- 1.8.3.1