From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 21132 invoked by alias); 2 Jun 2015 10:45:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 21122 invoked by uid 89); 2 Jun 2015 10:45:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 02 Jun 2015 10:45:13 +0000 Received: from arm.com (e106375-lin.cambridge.arm.com [10.2.207.23]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id t52Aj9Nh026293; Tue, 2 Jun 2015 11:45:09 +0100 Date: Tue, 02 Jun 2015 11:03:00 -0000 From: James Greenhalgh To: Kyrill Tkachov Cc: Jim Wilson , "gcc-patches@gcc.gnu.org" , Alan Lawrence Subject: Re: [PATCH, AARCH64] make stdarg functions work with +nofp Message-ID: <20150602104509.GA30419@arm.com> References: <20150602094230.GA4502@arm.com> <556D87A5.8020808@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <556D87A5.8020808@arm.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg00178.txt.bz2 On Tue, Jun 02, 2015 at 11:38:29AM +0100, Kyrill Tkachov wrote: > Hi James, Jim, > > On 02/06/15 10:42, James Greenhalgh wrote: > > On Sat, May 23, 2015 at 12:24:00AM +0100, Jim Wilson wrote: > >> The compiler currently ICEs when compiling a stdarg function with > >> +nofp, as reported in PR 66258. > >> > >> The aarch64.md file disables FP instructions using TARGET_FLOAT, which > >> supports both -mgeneral-regs-only and +nofp. But there is code in > >> aarch64.c that checks TARGET_GENERAL_REGS_ONLY. This results in FP > >> instructions when using +nofp, The aarch64.c code needs to use > >> TARGET_FLOAT instead like the md file already does. > >> > >> I can't meaningfully test this with a bootstrap, since the patch has > >> no effect unless I bootstrap with +nofp, and that will fail as gcc > >> contains floating point code. > >> > >> The testsuite already has multiple stdarg tests, so there is no need > >> for another one. > >> > >> I tested this by verifying I get the same results for some simple > >> testcasess with and without the patch, with and without using > >> -mgeneral-regs-only and -mcpu=cortex-a53+nofp. > > This patch doesn't quite look right to me. The cases you change seem > > like they should be (TARGET_FLOAT || TARGET_SIMD), rather than just > > TARGET_FLOAT. In an armv8-a+nofp environment, you still have access to the > > SIMD registers and instructions (reading between the lines on the bug > > report, this is almost certainly not what is intended in Grub!). > > I don't think that's quite right. TARGET_SIMD *always* implies TARGET_FP as > it is a superset of that functionality. > > For the precise relations of them look in aarch64-option-extensions.def. > Turning off fp with +nofp (or -mgeneral-regs-only) always turns off simd > while turning off simd with +nosimd doesn't turn off fp. Right, understood. I had incorrectly thought we had kept them as fully distinct options to disable parts of the ARMv8-A instruction set. In which case, Jim, your patch is OK. Sorry for my initial confusion. I think I saw a patch kicking around internally to improve the documentation in this area, Alan - was that yours? Thanks, James