From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 36443 invoked by alias); 10 Jun 2015 16:37:19 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 36421 invoked by uid 89); 10 Jun 2015 16:37:18 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.1 required=5.0 tests=AWL,BAYES_40,KAM_LAZY_DOMAIN_SECURITY autolearn=no version=3.3.2 X-HELO: e19.ny.us.ibm.com Received: from e19.ny.us.ibm.com (HELO e19.ny.us.ibm.com) (129.33.205.209) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (CAMELLIA256-SHA encrypted) ESMTPS; Wed, 10 Jun 2015 16:37:17 +0000 Received: from /spool/local by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 10 Jun 2015 12:37:14 -0400 Received: from d01dlp03.pok.ibm.com (9.56.250.168) by e19.ny.us.ibm.com (146.89.104.206) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 10 Jun 2015 12:37:12 -0400 Received: from b01cxnp23032.gho.pok.ibm.com (b01cxnp23032.gho.pok.ibm.com [9.57.198.27]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id 4281FC90042 for ; Wed, 10 Jun 2015 12:28:19 -0400 (EDT) Received: from d01av01.pok.ibm.com (d01av01.pok.ibm.com [9.56.224.215]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t5AGbCoC55771214 for ; Wed, 10 Jun 2015 16:37:12 GMT Received: from d01av01.pok.ibm.com (localhost [127.0.0.1]) by d01av01.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t5AGbBrv028024 for ; Wed, 10 Jun 2015 12:37:11 -0400 Received: from ibm-tiger.the-meissners.org (dhcp-9-32-77-111.usma.ibm.com [9.32.77.111]) by d01av01.pok.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t5AGbBNm027981; Wed, 10 Jun 2015 12:37:11 -0400 Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id AE3F444A15; Wed, 10 Jun 2015 12:37:10 -0400 (EDT) Date: Wed, 10 Jun 2015 17:23:00 -0000 From: Michael Meissner To: David Edelsohn Cc: Michael Meissner , Segher Boessenkool , GCC Patches Subject: Re: [PATCH] PR 66474, Document using %x for VSX registers on PowerPC Message-ID: <20150610163709.GA13213@ibm-tiger.the-meissners.org> Mail-Followup-To: Michael Meissner , David Edelsohn , Segher Boessenkool , GCC Patches References: <20150609180048.GA14132@ibm-tiger.the-meissners.org> <20150609191719.GA22400@gate.crashing.org> <20150609192607.GA1408@ibm-tiger.the-meissners.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15061016-0057-0000-0000-00000069E828 X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg00788.txt.bz2 On Tue, Jun 09, 2015 at 08:28:35PM -0400, David Edelsohn wrote: > On Tue, Jun 9, 2015 at 3:26 PM, Michael Meissner > wrote: > > On Tue, Jun 09, 2015 at 02:17:19PM -0500, Segher Boessenkool wrote: > >> On Tue, Jun 09, 2015 at 02:00:48PM -0400, Michael Meissner wrote: > >> > +asm ("xvadddp %x0,%x1,%x2" "=wa" (v1) : "wa" (v2), "wa" (v3)); > >> > >> A colon went missing? ^^^ > > > > Yes, I will correct it when I check it in. Thanks. > > Mike, > > VSX registers are a superset of Altivec registers, so the statement > about an Altivec register used where a VSX register is expected is a > little confusing. How about: > > Otherwise the register number output in the assembly file will be > incorrect if an Altivec register is an operand of a VSX instruction > that expects VSX register numbering. The re-wording is fine with me. I will check in the patch. Thanks. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797