From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 23976 invoked by alias); 16 Jun 2015 10:08:55 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 23965 invoked by uid 89); 16 Jun 2015 10:08:55 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Tue, 16 Jun 2015 10:08:53 +0000 Received: from arm.com (e106375-lin.cambridge.arm.com [10.2.207.23]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id t5GA8oq5016467; Tue, 16 Jun 2015 11:08:50 +0100 Date: Tue, 16 Jun 2015 10:10:00 -0000 From: James Greenhalgh To: Christophe Lyon Cc: "gcc-patches@gcc.gnu.org" Subject: Re: [Patch ARM-AArch64/testsuite Neon intrinsics 00/20] Executable tests Message-ID: <20150616100849.GA31808@arm.com> References: <1432757747-4891-1-git-send-email-christophe.lyon@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg01101.txt.bz2 On Mon, Jun 15, 2015 at 11:11:16PM +0100, Christophe Lyon wrote: > Ping? > > > On 27 May 2015 at 22:15, Christophe Lyon wrote: > > This patch series is a follow-up to the tests I already contributed, > > converted from my original testsuite. > > > > This series consists in 20 new patches, which can be committed > > independently. For vrecpe, I added the setting of the "Flush-to-Zero" > > FP flag, to force AArch64 to behave the same as ARM by default. > > > > This is the final batch, except for the vget_lane tests which I will > > submit later. This should cover the subset of AdvSIMD intrinsics > > common to ARMv7 and AArch64. > > > > Tested with qemu on arm*linux, aarch64-linux. > > > > 2015-05-27 Christophe Lyon > > > > * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h > > (_ARM_FPSCR): Add FZ field. > > (clean_results): Force FZ=1 on AArch64. > > * gcc.target/aarch64/advsimd-intrinsics/vrecpe.c: New file. > > * gcc.target/aarch64/advsimd-intrinsics/vrecps.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrev.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrshl.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrshr_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrshrn_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrsqrte.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrsqrts.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vrsra_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vset_lane.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vshl_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vshll_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vshr_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vshrn_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vsra_n.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vst1_lane.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vtbX.c: Likewise. > > * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Likewise. > > This patch set is OK. As with the last patch set, please do a quick run through of each patch before committing and ensure that the trailing '\' characters line up, and look for any fall-out (particularly on aarch64_be) after these are in. Thanks, James