From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7669 invoked by alias); 24 Jun 2015 00:52:21 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 7187 invoked by uid 89); 24 Jun 2015 00:52:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL,BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-pa0-f45.google.com Received: from mail-pa0-f45.google.com (HELO mail-pa0-f45.google.com) (209.85.220.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Wed, 24 Jun 2015 00:52:19 +0000 Received: by paceq1 with SMTP id eq1so17366112pac.3 for ; Tue, 23 Jun 2015 17:52:17 -0700 (PDT) X-Received: by 10.66.101.103 with SMTP id ff7mr75472501pab.13.1435107137265; Tue, 23 Jun 2015 17:52:17 -0700 (PDT) Received: from bubble.grove.modra.org (CPE-58-160-155-134.oycza5.sa.bigpond.net.au. [58.160.155.134]) by mx.google.com with ESMTPSA id ug1sm24547206pbc.39.2015.06.23.17.52.15 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 23 Jun 2015 17:52:16 -0700 (PDT) Received: by bubble.grove.modra.org (Postfix, from userid 1000) id 1F411EA0074; Wed, 24 Jun 2015 10:22:12 +0930 (ACST) Date: Wed, 24 Jun 2015 00:53:00 -0000 From: Alan Modra To: gcc-patches@gcc.gnu.org Cc: David Edelsohn Subject: [RS6000 3/7] rtx_costs for ROTATE/ASHIFT inside AND Message-ID: <20150624005212.GX1723@bubble.grove.modra.org> Mail-Followup-To: gcc-patches@gcc.gnu.org, David Edelsohn References: <20150624004649.GU1723@bubble.grove.modra.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20150624004649.GU1723@bubble.grove.modra.org> User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes X-SW-Source: 2015-06/txt/msg01643.txt.bz2 The odd patterns for rldic and rldicr that require an insn predicate that examines both the shift count and the mask, must be costed at a point where both count and mask are available. Also tidies the mode passed to a couple of predicates. * config/rs6000/rs6000.c (rs6000_rtx_costs): Pass mode to reg_or_add_cint_operand and reg_or_sub_cint_operand. Handle rldic and rldicr insns under AND. diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 5f42192..a4a72f3 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -30681,9 +30681,9 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, return true; } else if ((outer_code == PLUS - && reg_or_add_cint_operand (x, VOIDmode)) + && reg_or_add_cint_operand (x, mode)) || (outer_code == MINUS - && reg_or_sub_cint_operand (x, VOIDmode)) + && reg_or_sub_cint_operand (x, mode)) || ((outer_code == SET || outer_code == IOR || outer_code == XOR) @@ -30801,7 +30801,6 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, } /* FALLTHRU */ - case AND: case CLZ: case IOR: case XOR: @@ -30809,6 +30808,24 @@ rs6000_rtx_costs (rtx x, machine_mode mode, int outer_code, *total = COSTS_N_INSNS (1); return false; + case AND: + *total = COSTS_N_INSNS (1); + if (mode == DImode) + { + rtx op0 = XEXP (x, 0); + if ((GET_CODE (op0) == ASHIFT || GET_CODE (op0) == ROTATE) + && CONST_INT_P (XEXP (op0, 1))) + { + rtx op1 = XEXP (x, 1); + if (includes_rldic_lshift_p (XEXP (op0, 1), op1)) + return true; + if (GET_CODE (op0) == ASHIFT + && includes_rldicr_lshift_p (XEXP (op0, 1), op1)) + return true; + } + } + return false; + case ASHIFT: case ASHIFTRT: case LSHIFTRT: -- Alan Modra Australia Development Lab, IBM