From: James Greenhalgh <james.greenhalgh@arm.com>
To: Kyrill Tkachov <kyrylo.tkachov@arm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
Marcus Shawcroft <Marcus.Shawcroft@arm.com>,
Richard Earnshaw <Richard.Earnshaw@arm.com>
Subject: Re: [PATCH][AArch64][2/3] Implement negcc, notcc optabs
Date: Thu, 10 Sep 2015 08:50:00 -0000 [thread overview]
Message-ID: <20150910082758.GA10673@arm.com> (raw)
In-Reply-To: <55E5BE85.2080200@arm.com>
On Tue, Sep 01, 2015 at 04:04:37PM +0100, Kyrill Tkachov wrote:
> Hi all,
>
> This second patch implements the new optabs for aarch64.
> The new expander is almost identical to the mov<mode>cc expander
> except that operand 2 has a neg or a not before it to reflect the
> fact that it should be negated if the comparison in operand 1 holds.
> These patterns will eventually match to the CSNEG and CSINV instructions.
>
> The test included shows the kind of code that triggers this.
> We will now create a single immediate move followed by a CSNEG (or CSINV)
> rather than performing two immediate moves followed by a CSEL.
>
> Bootstrapped and tested on aarch64-none-linux-gnu.
> diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
> index c3b985b..77bc7cd 100644
> --- a/gcc/config/aarch64/aarch64.md
> +++ b/gcc/config/aarch64/aarch64.md
> @@ -3038,6 +3038,24 @@ (define_expand "mov<mode>cc"
> }
> )
>
> +(define_expand "<neg_not_op><mode>cc"
> + [(set (match_operand:GPI 0 "register_operand" "")
> + (if_then_else:GPI (match_operand 1 "aarch64_comparison_operator" "")
> + (NEG_NOT:GPI (match_operand:GPI 2 "register_operand" ""))
> + (match_operand:GPI 3 "register_operand" "")))]
> + ""
> + {
> + rtx ccreg;
> + enum rtx_code code = GET_CODE (operands[1]);
> +
> + if (code == UNEQ || code == LTGT)
> + FAIL;
> +
> + ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
> + XEXP (operands[1], 1));
> + operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
> + }
> +)
OK. Shame we can't refactor some of this duplicate expansion code...
Thanks,
James
> 2015-09-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>
> * config/aarch64/aarch64.md (<neg_not_op><mode>cc): New define_expand.
> * config/aarch64/iterators.md (NEG_NOT): New code iterator.
> (neg_not_op): New code attribute.
>
> 2015-09-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
>
> * gcc.target/aarch64/cond_op_imm_1.c: New test.
prev parent reply other threads:[~2015-09-10 8:28 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-01 15:04 Kyrill Tkachov
2015-09-10 8:50 ` James Greenhalgh [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20150910082758.GA10673@arm.com \
--to=james.greenhalgh@arm.com \
--cc=Marcus.Shawcroft@arm.com \
--cc=Richard.Earnshaw@arm.com \
--cc=gcc-patches@gcc.gnu.org \
--cc=kyrylo.tkachov@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).