From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 19209 invoked by alias); 18 Sep 2015 14:26:51 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 18064 invoked by uid 89); 18 Sep 2015 14:26:50 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL,BAYES_00,SPF_PASS,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Fri, 18 Sep 2015 14:26:49 +0000 Received: from arm.com (e107456-lin.cambridge.arm.com [10.2.207.14]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id t8IEQjMj009680; Fri, 18 Sep 2015 15:26:45 +0100 Date: Fri, 18 Sep 2015 14:27:00 -0000 From: James Greenhalgh To: Wilco Dijkstra Cc: "'GCC Patches'" Subject: Re: [PATCH][AArch64][3/5] Improve immediate generation Message-ID: <20150918142644.GC16108@arm.com> References: <000b01d0e57b$dc384e00$94a8ea00$@com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <000b01d0e57b$dc384e00$94a8ea00$@com> User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes X-SW-Source: 2015-09/txt/msg01420.txt.bz2 On Wed, Sep 02, 2015 at 01:35:33PM +0100, Wilco Dijkstra wrote: > Remove aarch64_bitmasks, aarch64_build_bitmask_table and aarch64_bitmasks_cmp > as they are no longer used by the immediate generation code. > > No change in generated code, passes GCC regression tests/bootstrap. OK. Thanks, James > > ChangeLog: > 2015-09-02 Wilco Dijkstra > > * gcc/config/aarch64/aarch64.c (aarch64_bitmasks): Remove. > (AARCH64_NUM_BITMASKS) remove. (aarch64_bitmasks_cmp): Remove. > (aarch64_build_bitmask_table): Remove. > > --- > gcc/config/aarch64/aarch64.c | 69 -------------------------------------------- > 1 file changed, 69 deletions(-) > > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c > index 070c68b..0bc6b19 100644 > --- a/gcc/config/aarch64/aarch64.c > +++ b/gcc/config/aarch64/aarch64.c > @@ -563,12 +563,6 @@ static const struct aarch64_option_extension all_extensions[] = > increment address. */ > static machine_mode aarch64_memory_reference_mode; > > -/* A table of valid AArch64 "bitmask immediate" values for > - logical instructions. */ > - > -#define AARCH64_NUM_BITMASKS 5334 > -static unsigned HOST_WIDE_INT aarch64_bitmasks[AARCH64_NUM_BITMASKS]; > - > typedef enum aarch64_cond_code > { > AARCH64_EQ = 0, AARCH64_NE, AARCH64_CS, AARCH64_CC, AARCH64_MI, AARCH64_PL, > @@ -3172,67 +3166,6 @@ aarch64_tls_referenced_p (rtx x) > } > > > -static int > -aarch64_bitmasks_cmp (const void *i1, const void *i2) > -{ > - const unsigned HOST_WIDE_INT *imm1 = (const unsigned HOST_WIDE_INT *) i1; > - const unsigned HOST_WIDE_INT *imm2 = (const unsigned HOST_WIDE_INT *) i2; > - > - if (*imm1 < *imm2) > - return -1; > - if (*imm1 > *imm2) > - return +1; > - return 0; > -} > - > - > -static void > -aarch64_build_bitmask_table (void) > -{ > - unsigned HOST_WIDE_INT mask, imm; > - unsigned int log_e, e, s, r; > - unsigned int nimms = 0; > - > - for (log_e = 1; log_e <= 6; log_e++) > - { > - e = 1 << log_e; > - if (e == 64) > - mask = ~(HOST_WIDE_INT) 0; > - else > - mask = ((HOST_WIDE_INT) 1 << e) - 1; > - for (s = 1; s < e; s++) > - { > - for (r = 0; r < e; r++) > - { > - /* set s consecutive bits to 1 (s < 64) */ > - imm = ((unsigned HOST_WIDE_INT)1 << s) - 1; > - /* rotate right by r */ > - if (r != 0) > - imm = ((imm >> r) | (imm << (e - r))) & mask; > - /* replicate the constant depending on SIMD size */ > - switch (log_e) { > - case 1: imm |= (imm << 2); > - case 2: imm |= (imm << 4); > - case 3: imm |= (imm << 8); > - case 4: imm |= (imm << 16); > - case 5: imm |= (imm << 32); > - case 6: > - break; > - default: > - gcc_unreachable (); > - } > - gcc_assert (nimms < AARCH64_NUM_BITMASKS); > - aarch64_bitmasks[nimms++] = imm; > - } > - } > - } > - > - gcc_assert (nimms == AARCH64_NUM_BITMASKS); > - qsort (aarch64_bitmasks, nimms, sizeof (aarch64_bitmasks[0]), > - aarch64_bitmasks_cmp); > -} > - > - > /* Return true if val can be encoded as a 12-bit unsigned immediate with > a left shift of 0 or 12 bits. */ > bool > @@ -7828,8 +7761,6 @@ aarch64_override_options (void) > || (aarch64_arch_string && valid_arch)) > gcc_assert (explicit_arch != aarch64_no_arch); > > - aarch64_build_bitmask_table (); > - > aarch64_override_options_internal (&global_options); > > /* Save these options as the default ones in case we push and pop them later > -- > 1.8.3 > > >