* [PATCH, i386, AVX-512] Fix iterator for k<logic>, introduce kshift[lr][bwdq].
@ 2015-09-22 15:18 Kirill Yukhin
2015-09-22 15:29 ` Uros Bizjak
2015-09-23 13:41 ` Kirill Yukhin
0 siblings, 2 replies; 3+ messages in thread
From: Kirill Yukhin @ 2015-09-22 15:18 UTC (permalink / raw)
To: Uros Bizjak; +Cc: GCC Patches, Ilya Enkovich
Hello,
Patch in the bottom fixes iterator for k<logic> insns
since QI mode is only available for AVX-512DQ.
It also adds support for kshift[rl][bwdq]. This patterns
will be used for mask load/store autogeneration on which
Ilya Enkovich is working on.
gcc/
* config/i386/i386.md (define_code_attr mshift): New.
(define_mode_iterator SWI1248_AVX512BW): Rename ...
(SWI1248_AVX512BW): ... to this. Make QI enabled for TARGET_AVX512DQ
only.
(define_insn "*k<logic><mode>"): Use new iterator name.
(define_insn "*<mshift><mode>3"): New.
Bootstrapped and regtest in progress
Is it ok for trunk (if regtest pass)?
--
Thanks, K
commit 3a521c3cfd7044008635d1c813320d3667fc1e90
Author: Kirill Yukhin <kirill.yukhin@intel.com>
Date: Tue Sep 22 16:48:50 2015 +0300
AVX-512. Add kshift[lr][bwdq]. Fix iterator.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 2f8cdb2..c0911d4 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -893,6 +893,9 @@
(define_code_attr shift [(ashift "sll") (lshiftrt "shr") (ashiftrt "sar")])
(define_code_attr vshift [(ashift "sll") (lshiftrt "srl") (ashiftrt "sra")])
+;; Mask variant left right mnemonics
+(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
+
;; Mapping of rotate operators
(define_code_iterator any_rotate [rotate rotatert])
@@ -935,9 +938,9 @@
;; All integer modes.
(define_mode_iterator SWI1248x [QI HI SI DI])
-;; All integer modes with AVX512BW.
-(define_mode_iterator SWI1248_AVX512BW
- [QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
+;; All integer modes with AVX512BW/DQ.
+(define_mode_iterator SWI1248_AVX512BWDQ
+ [(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
;; All integer modes without QImode.
(define_mode_iterator SWI248x [HI SI DI])
@@ -7841,9 +7844,9 @@
(match_dup 2)))])
(define_insn "*k<logic><mode>"
- [(set (match_operand:SWI1248_AVX512BW 0 "mask_reg_operand" "=k")
- (any_logic:SWI1248_AVX512BW (match_operand:SWI1248_AVX512BW 1 "mask_reg_operand" "k")
- (match_operand:SWI1248_AVX512BW 2 "mask_reg_operand" "k")))]
+ [(set (match_operand:SWI1248_AVX512BWDQ 0 "mask_reg_operand" "=k")
+ (any_logic:SWI1248_AVX512BWDQ (match_operand:SWI1248_AVX512BWDQ 1 "mask_reg_operand" "k")
+ (match_operand:SWI1248_AVX512BWDQ 2 "mask_reg_operand" "k")))]
"TARGET_AVX512F"
{
if (!TARGET_AVX512DQ && <MODE>mode == QImode)
@@ -9358,6 +9361,15 @@
;; shift pair, instead using moves and sign extension for counts greater
;; than 31.
+(define_insn "*<mshift><mode>3"
+ [(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k")
+ (any_lshift:SWI1248_AVX512BWDQ (match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k")
+ (match_operand:QI 2 "immediate_operand" "i")))]
+ "TARGET_AVX512F"
+ "k<mshift><mskmodesuffix> %2, %1, %0|%0, %1, %2"
+ [(set_attr "type" "msklog")
+ (set_attr "prefix" "vex")])
+
(define_expand "ashl<mode>3"
[(set (match_operand:SDWIM 0 "<shift_operand>")
(ashift:SDWIM (match_operand:SDWIM 1 "<ashl_input_operand>")
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH, i386, AVX-512] Fix iterator for k<logic>, introduce kshift[lr][bwdq].
2015-09-22 15:18 [PATCH, i386, AVX-512] Fix iterator for k<logic>, introduce kshift[lr][bwdq] Kirill Yukhin
@ 2015-09-22 15:29 ` Uros Bizjak
2015-09-23 13:41 ` Kirill Yukhin
1 sibling, 0 replies; 3+ messages in thread
From: Uros Bizjak @ 2015-09-22 15:29 UTC (permalink / raw)
To: Kirill Yukhin; +Cc: GCC Patches, Ilya Enkovich
On Tue, Sep 22, 2015 at 5:14 PM, Kirill Yukhin <kirill.yukhin@gmail.com> wrote:
> Hello,
> Patch in the bottom fixes iterator for k<logic> insns
> since QI mode is only available for AVX-512DQ.
>
> It also adds support for kshift[rl][bwdq]. This patterns
> will be used for mask load/store autogeneration on which
> Ilya Enkovich is working on.
>
> gcc/
> * config/i386/i386.md (define_code_attr mshift): New.
> (define_mode_iterator SWI1248_AVX512BW): Rename ...
> (SWI1248_AVX512BW): ... to this. Make QI enabled for TARGET_AVX512DQ
> only.
> (define_insn "*k<logic><mode>"): Use new iterator name.
> (define_insn "*<mshift><mode>3"): New.
>
> Bootstrapped and regtest in progress
>
> Is it ok for trunk (if regtest pass)?
This is AVX512 stuff, so - your call ;) .
Uros.
> --
> Thanks, K
>
> commit 3a521c3cfd7044008635d1c813320d3667fc1e90
> Author: Kirill Yukhin <kirill.yukhin@intel.com>
> Date: Tue Sep 22 16:48:50 2015 +0300
>
> AVX-512. Add kshift[lr][bwdq]. Fix iterator.
>
> diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
> index 2f8cdb2..c0911d4 100644
> --- a/gcc/config/i386/i386.md
> +++ b/gcc/config/i386/i386.md
> @@ -893,6 +893,9 @@
> (define_code_attr shift [(ashift "sll") (lshiftrt "shr") (ashiftrt "sar")])
> (define_code_attr vshift [(ashift "sll") (lshiftrt "srl") (ashiftrt "sra")])
>
> +;; Mask variant left right mnemonics
> +(define_code_attr mshift [(ashift "shiftl") (lshiftrt "shiftr")])
> +
> ;; Mapping of rotate operators
> (define_code_iterator any_rotate [rotate rotatert])
>
> @@ -935,9 +938,9 @@
> ;; All integer modes.
> (define_mode_iterator SWI1248x [QI HI SI DI])
>
> -;; All integer modes with AVX512BW.
> -(define_mode_iterator SWI1248_AVX512BW
> - [QI HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
> +;; All integer modes with AVX512BW/DQ.
> +(define_mode_iterator SWI1248_AVX512BWDQ
> + [(QI "TARGET_AVX512DQ") HI (SI "TARGET_AVX512BW") (DI "TARGET_AVX512BW")])
>
> ;; All integer modes without QImode.
> (define_mode_iterator SWI248x [HI SI DI])
> @@ -7841,9 +7844,9 @@
> (match_dup 2)))])
>
> (define_insn "*k<logic><mode>"
> - [(set (match_operand:SWI1248_AVX512BW 0 "mask_reg_operand" "=k")
> - (any_logic:SWI1248_AVX512BW (match_operand:SWI1248_AVX512BW 1 "mask_reg_operand" "k")
> - (match_operand:SWI1248_AVX512BW 2 "mask_reg_operand" "k")))]
> + [(set (match_operand:SWI1248_AVX512BWDQ 0 "mask_reg_operand" "=k")
> + (any_logic:SWI1248_AVX512BWDQ (match_operand:SWI1248_AVX512BWDQ 1 "mask_reg_operand" "k")
> + (match_operand:SWI1248_AVX512BWDQ 2 "mask_reg_operand" "k")))]
> "TARGET_AVX512F"
> {
> if (!TARGET_AVX512DQ && <MODE>mode == QImode)
> @@ -9358,6 +9361,15 @@
> ;; shift pair, instead using moves and sign extension for counts greater
> ;; than 31.
>
> +(define_insn "*<mshift><mode>3"
> + [(set (match_operand:SWI1248_AVX512BWDQ 0 "register_operand" "=k")
> + (any_lshift:SWI1248_AVX512BWDQ (match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k")
> + (match_operand:QI 2 "immediate_operand" "i")))]
> + "TARGET_AVX512F"
> + "k<mshift><mskmodesuffix> %2, %1, %0|%0, %1, %2"
> + [(set_attr "type" "msklog")
> + (set_attr "prefix" "vex")])
> +
> (define_expand "ashl<mode>3"
> [(set (match_operand:SDWIM 0 "<shift_operand>")
> (ashift:SDWIM (match_operand:SDWIM 1 "<ashl_input_operand>")
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH, i386, AVX-512] Fix iterator for k<logic>, introduce kshift[lr][bwdq].
2015-09-22 15:18 [PATCH, i386, AVX-512] Fix iterator for k<logic>, introduce kshift[lr][bwdq] Kirill Yukhin
2015-09-22 15:29 ` Uros Bizjak
@ 2015-09-23 13:41 ` Kirill Yukhin
1 sibling, 0 replies; 3+ messages in thread
From: Kirill Yukhin @ 2015-09-23 13:41 UTC (permalink / raw)
To: Uros Bizjak; +Cc: GCC Patches, Ilya Enkovich
Hello,
On 22 Sep 18:14, Kirill Yukhin wrote:
> Hello,
> Patch in the bottom fixes iterator for k<logic> insns
> since QI mode is only available for AVX-512DQ.
>
> It also adds support for kshift[rl][bwdq]. This patterns
> will be used for mask load/store autogeneration on which
> Ilya Enkovich is working on.
>
> gcc/
> * config/i386/i386.md (define_code_attr mshift): New.
> (define_mode_iterator SWI1248_AVX512BW): Rename ...
> (SWI1248_AVX512BW): ... to this. Make QI enabled for TARGET_AVX512DQ
> only.
> (define_insn "*k<logic><mode>"): Use new iterator name.
> (define_insn "*<mshift><mode>3"): New.
>
> Bootstrapped and regtest in progress
>
> Is it ok for trunk (if regtest pass)?
Emit pattern was wrong (caught by Spec2k6 autogeneration).
Comitted to main trunk as obvious.
gcc/
* config/i386/i386.md (define_insn "*<mshift><mode>3"): Fix
insn emit.
--
Thanks, K
commit 254e3b944ac96441544d36c438e92a9a09b963b1
Author: Kirill Yukhin <kirill.yukhin@intel.com>
Date: Wed Sep 23 16:24:50 2015 +0300
AVX-512. Fix emit in '*<mshift><mode>3' pattern.
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c0911d4..ba5ab32 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -9366,7 +9366,7 @@
(any_lshift:SWI1248_AVX512BWDQ (match_operand:SWI1248_AVX512BWDQ 1 "register_operand" "k")
(match_operand:QI 2 "immediate_operand" "i")))]
"TARGET_AVX512F"
- "k<mshift><mskmodesuffix> %2, %1, %0|%0, %1, %2"
+ "k<mshift><mskmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "type" "msklog")
(set_attr "prefix" "vex")])
^ permalink raw reply [flat|nested] 3+ messages in thread
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2015-09-22 15:18 [PATCH, i386, AVX-512] Fix iterator for k<logic>, introduce kshift[lr][bwdq] Kirill Yukhin
2015-09-22 15:29 ` Uros Bizjak
2015-09-23 13:41 ` Kirill Yukhin
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