From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 15184 invoked by alias); 16 Nov 2015 09:28:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 15157 invoked by uid 89); 16 Nov 2015 09:28:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Mon, 16 Nov 2015 09:28:24 +0000 Received: from arm.com (e107456-lin.cambridge.arm.com [10.2.206.78]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id tAG9SKoO000585; Mon, 16 Nov 2015 09:28:20 GMT Date: Mon, 16 Nov 2015 09:28:00 -0000 From: James Greenhalgh To: Richard Biener Cc: GCC Patches , Marcus Shawcroft , Richard Earnshaw Subject: Re: [AArch64] Cortex-A57 Choose some new branch costs. Message-ID: <20151116092819.GA9586@arm.com> References: <1447409605-35653-1-git-send-email-james.greenhalgh@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes X-SW-Source: 2015-11/txt/msg01909.txt.bz2 On Fri, Nov 13, 2015 at 11:40:56AM +0100, Richard Biener wrote: > On Fri, Nov 13, 2015 at 11:13 AM, James Greenhalgh > wrote: > > > > Hi, > > > > With all the work that has recently gone in to ifcvt, I thought I'd revisit > > the branch cost settings for Cortex-A57. After a run of experiments [1], > > I found {1, 3} to be the sweet spot, giving a small set of performance > > improvements across some popular benchmarks. > > > > I'd therefore like to propose changing the branch cost to those numbers. > > > > Patch bootstrapped tuning for Cortex-A57 with no issues. I'll revisit > > the same for Cortex-A53. > > > > OK? > > Can you re-do the experiment with adding a LOGICAL_OP_NON_SHORT_CIRCUIT > target macro for aarch64? It's fallback uses BRANCH_COST (see fold-const.c > and tree-ssa-ifcombine.c) This didn't drastically change the results for the workloads I was using as benchmarks. I'd still pick {1, 3} out as the winner. Thanks, James > > --- > > 2015-11-12 James Greenhalgh > > > > * config/aarch64/aarch64.c (cortexa57_branch_costs): New. > > (cortexa57_tunings): Use it. > > >