From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4350 invoked by alias); 23 Nov 2015 13:35:54 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 4331 invoked by uid 89); 23 Nov 2015 13:35:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_PASS autolearn=ham version=3.3.2 X-HELO: cam-smtp0.cambridge.arm.com Received: from fw-tnat.cambridge.arm.com (HELO cam-smtp0.cambridge.arm.com) (217.140.96.140) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Mon, 23 Nov 2015 13:35:52 +0000 Received: from arm.com (e107456-lin.cambridge.arm.com [10.2.206.78]) by cam-smtp0.cambridge.arm.com (8.13.8/8.13.8) with ESMTP id tANDZlPw011752; Mon, 23 Nov 2015 13:35:47 GMT Date: Mon, 23 Nov 2015 13:37:00 -0000 From: James Greenhalgh To: Matthew Wahab Cc: gcc-patches@gcc.gnu.org Subject: Re: [AArch64][PATCH 6/7] Add NEON intrinsics vqrdmlah and vqrdmlsh. Message-ID: <20151123133547.GB11516@arm.com> References: <562A2519.3020102@foss.arm.com> <562A2763.4070600@foss.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <562A2763.4070600@foss.arm.com> User-Agent: Mutt/1.5.21 (2010-09-15) X-IsSubscribed: yes X-SW-Source: 2015-11/txt/msg02712.txt.bz2 On Fri, Oct 23, 2015 at 01:26:11PM +0100, Matthew Wahab wrote: > The ARMv8.1 architecture extension adds two Adv.SIMD instructions, > sqrdmlah and sqrdmlsh. This patch adds the NEON intrinsics vqrdmlah and > vqrdmlsh for these instructions. The new intrinsics are of the form > vqrdml{as}h[q]_. > > Tested the series for aarch64-none-linux-gnu with native bootstrap and > make check on an ARMv8 architecture. Also tested aarch64-none-elf with > cross-compiled check-gcc on an ARMv8.1 emulator. > > Ok for trunk? > Matthew > > gcc/ > 2015-10-23 Matthew Wahab > > * gcc/config/aarch64/arm_neon.h (vqrdmlah_s16, vqrdmlah_s32): New. > (vqrdmlahq_s16, vqrdmlahq_s32): New. > (vqrdmlsh_s16, vqrdmlsh_s32): New. > (vqrdmlshq_s16, vqrdmlshq_s32): New. > > gcc/testsuite > 2015-10-23 Matthew Wahab > > * gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh.inc: New file, > support code for vqrdml{as}h tests. > * gcc.target/aarch64/advsimd-intrinsics/vqrdmlah.c: New. > * gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh.c: New. > > From 611e1232a59dfe42f2cd9666680407d67abcfea5 Mon Sep 17 00:00:00 2001 > From: Matthew Wahab > Date: Thu, 27 Aug 2015 13:22:41 +0100 > Subject: [PATCH 6/7] Add neon intrinsics: vqrdmlah, vqrdmlsh. > > Change-Id: I5c7f8d36ee980d280c1d50f6f212b286084c5acf > --- > gcc/config/aarch64/arm_neon.h | 53 ++++++++ > .../aarch64/advsimd-intrinsics/vqrdmlXh.inc | 138 +++++++++++++++++++++ > .../aarch64/advsimd-intrinsics/vqrdmlah.c | 57 +++++++++ > .../aarch64/advsimd-intrinsics/vqrdmlsh.c | 61 +++++++++ > 4 files changed, 309 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh.inc > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlah.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh.c > > diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h > index e186348..9e73809 100644 > --- a/gcc/config/aarch64/arm_neon.h > +++ b/gcc/config/aarch64/arm_neon.h > @@ -2649,6 +2649,59 @@ vqrdmulhq_s32 (int32x4_t __a, int32x4_t __b) > return (int32x4_t) __builtin_aarch64_sqrdmulhv4si (__a, __b); > } > > +#pragma GCC push_options > +#pragma GCC target ("arch=armv8.1-a") Can we please patch the documentation to make it clear that -march=armv8.1-a always implies -march=armv8.1-a+rdma ? The documentation around which feature modifiers are implied when leaves much to be desired. > + > +__extension__ static __inline int16x4_t __attribute__ ((__always_inline__)) > +vqrdmlah_s16 (int16x4_t __a, int16x4_t __b, int16x4_t __c) > +{ > + return (int16x4_t) __builtin_aarch64_sqrdmlahv4hi (__a, __b, __c); We don't need this cast (likewise the other instances)? Thanks, James