My first mail did not seem to be delivered, so I'm trying again. This fixes a bug with the debug switch -mvsx-timode that we would eventually like to enable by default on PowerPC little endian server systems. The bug is that the load with rotate or rotate with store instructions needed on power8 little endian systems used VEC_SELECT to swap the 64-bit words. This patch uses ROTATE for TImode, just like I did for KFmode. Without this patch, 10 of the 30 spec 2006 benchmarks fail to compile on a little endian PowerPC system with -mvsx-timode. With the patch, all 30 benchmarks compile and do the spec verification. In developing the patch, I noticed that the generic swap optimizations that are done for vector types are not done for TImode, since we don't split the TImoves until after register allocation when we discover a vector register was used instead of a GPR register. So, I added a peephole2 to catch the common case of store followed by load, eliminating the pair of ROTATE insns. I bootstrapped it on both a big endian power7 and a little endian power8 system with no regressions. Is it ok to install on the trunk? At the current time, I don't see the need to back port it to GCC 5 (though the backport is fairly simple), because it isn't on by default in GCC 5, and we don't plan to eventually have -mvsx-timode and -mlra on by default in that branch. [gcc] 2015-12-15 Michael Meissner PR target/68805 * config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Use ROTATE instead of VEC_SELECT for TImode. * config/rs6000/vsx.md (VSX_LE): Move TImode from VSX_LE to VSX_LE_128, so that we use ROTATE to swap the 64-bit words instead of using VEC_SELECT. (VSX_LE_128): Likewise. (define_peephole2): Add peephole to eliminate double xxpermdi when copying TImode. [gcc/testsuite] 2015-12-15 Michael Meissner PR target/68805 * gcc.target/powerpc/pr68805.c: New test. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797