* [PATCH] Fix up my recent change to vect_get_constant_vectors (PR tree-optimization/69207)
@ 2016-01-11 17:13 Jakub Jelinek
2016-01-12 14:21 ` Ilya Enkovich
0 siblings, 1 reply; 26+ messages in thread
From: Jakub Jelinek @ 2016-01-11 17:13 UTC (permalink / raw)
To: Richard Biener; +Cc: gcc-patches
Hi!
Based on discussions on IRC, I'm submitting following fix for a regression
on aarch64 - partial reversion (the case where VCE works too, just I thought
using NOP_EXPR would be nicer) and change in the assert - op better be
some integral value if converting it to VECTOR_BOOLEAN_TYPE_P's element
type.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2016-01-11 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/69207
* tree-vect-slp.c (vect_get_constant_vectors): For
VECTOR_BOOLEAN_TYPE_P, assert op has integral type instead of
fold_convertible_p to vector_type's element type, and always
use VCE for non-VECTOR_BOOLEAN_TYPE_P.
--- gcc/tree-vect-slp.c.jj 2016-01-08 21:45:57.000000000 +0100
+++ gcc/tree-vect-slp.c 2016-01-11 12:07:19.633366712 +0100
@@ -2999,12 +2999,9 @@ vect_get_constant_vectors (tree op, slp_
gimple *init_stmt;
if (VECTOR_BOOLEAN_TYPE_P (vector_type))
{
- gcc_assert (fold_convertible_p (TREE_TYPE (vector_type),
- op));
+ gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op)));
init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op);
}
- else if (fold_convertible_p (TREE_TYPE (vector_type), op))
- init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op);
else
{
op = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (vector_type),
Jakub
^ permalink raw reply [flat|nested] 26+ messages in thread* Re: [PATCH] Fix up my recent change to vect_get_constant_vectors (PR tree-optimization/69207) 2016-01-11 17:13 [PATCH] Fix up my recent change to vect_get_constant_vectors (PR tree-optimization/69207) Jakub Jelinek @ 2016-01-12 14:21 ` Ilya Enkovich 2016-06-03 17:33 ` [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Ilya Enkovich @ 2016-01-12 14:21 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, gcc-patches 2016-01-11 20:13 GMT+03:00 Jakub Jelinek <jakub@redhat.com>: > Hi! > > Based on discussions on IRC, I'm submitting following fix for a regression > on aarch64 - partial reversion (the case where VCE works too, just I thought > using NOP_EXPR would be nicer) and change in the assert - op better be > some integral value if converting it to VECTOR_BOOLEAN_TYPE_P's element > type. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? > > 2016-01-11 Jakub Jelinek <jakub@redhat.com> > > PR tree-optimization/69207 > * tree-vect-slp.c (vect_get_constant_vectors): For > VECTOR_BOOLEAN_TYPE_P, assert op has integral type instead of > fold_convertible_p to vector_type's element type, and always > use VCE for non-VECTOR_BOOLEAN_TYPE_P. > > --- gcc/tree-vect-slp.c.jj 2016-01-08 21:45:57.000000000 +0100 > +++ gcc/tree-vect-slp.c 2016-01-11 12:07:19.633366712 +0100 > @@ -2999,12 +2999,9 @@ vect_get_constant_vectors (tree op, slp_ > gimple *init_stmt; > if (VECTOR_BOOLEAN_TYPE_P (vector_type)) > { > - gcc_assert (fold_convertible_p (TREE_TYPE (vector_type), > - op)); > + gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); > init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); In vect_init_vector we had to introduce COND_EXPR to choose between 0 and -1 for boolean vectors. Shouldn't we do similar in SLP? Thanks, Ilya > } > - else if (fold_convertible_p (TREE_TYPE (vector_type), op)) > - init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); > else > { > op = build1 (VIEW_CONVERT_EXPR, TREE_TYPE (vector_type), > > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-01-12 14:21 ` Ilya Enkovich @ 2016-06-03 17:33 ` Jakub Jelinek 2016-06-06 8:06 ` Richard Biener 2016-06-07 9:23 ` Christophe Lyon 0 siblings, 2 replies; 26+ messages in thread From: Jakub Jelinek @ 2016-06-03 17:33 UTC (permalink / raw) To: Richard Biener, Ilya Enkovich; +Cc: gcc-patches On Tue, Jan 12, 2016 at 05:21:37PM +0300, Ilya Enkovich wrote: > > --- gcc/tree-vect-slp.c.jj 2016-01-08 21:45:57.000000000 +0100 > > +++ gcc/tree-vect-slp.c 2016-01-11 12:07:19.633366712 +0100 > > @@ -2999,12 +2999,9 @@ vect_get_constant_vectors (tree op, slp_ > > gimple *init_stmt; > > if (VECTOR_BOOLEAN_TYPE_P (vector_type)) > > { > > - gcc_assert (fold_convertible_p (TREE_TYPE (vector_type), > > - op)); > > + gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); > > init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); > > In vect_init_vector we had to introduce COND_EXPR to choose between 0 and -1 for > boolean vectors. Shouldn't we do similar in SLP? Apparently the answer to this is YES. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/6.2? 2016-06-03 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/71259 * tree-vect-slp.c (vect_get_constant_vectors): For VECTOR_BOOLEAN_TYPE_P, return all ones constant instead of one for constant op, and use COND_EXPR for non-constant. * gcc.dg/vect/pr71259.c: New test. --- gcc/tree-vect-slp.c.jj 2016-05-24 10:56:02.000000000 +0200 +++ gcc/tree-vect-slp.c 2016-06-03 17:01:12.740955935 +0200 @@ -3056,7 +3056,7 @@ vect_get_constant_vectors (tree op, slp_ if (integer_zerop (op)) op = build_int_cst (TREE_TYPE (vector_type), 0); else if (integer_onep (op)) - op = build_int_cst (TREE_TYPE (vector_type), 1); + op = build_all_ones_cst (TREE_TYPE (vector_type)); else gcc_unreachable (); } @@ -3071,8 +3071,14 @@ vect_get_constant_vectors (tree op, slp_ gimple *init_stmt; if (VECTOR_BOOLEAN_TYPE_P (vector_type)) { + tree true_val + = build_all_ones_cst (TREE_TYPE (vector_type)); + tree false_val + = build_zero_cst (TREE_TYPE (vector_type)); gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); - init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); + init_stmt = gimple_build_assign (new_temp, COND_EXPR, + op, true_val, + false_val); } else { --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 @@ -0,0 +1,28 @@ +/* PR tree-optimization/71259 */ +/* { dg-do run } */ +/* { dg-options "-O3" } */ +/* { dg-additional-options "-mavx" { target avx_runtime } } */ + +#include "tree-vect.h" + +long a, b[1][44][2]; +long long c[44][17][2]; + +int +main () +{ + int i, j, k; + check_vect (); + asm volatile ("" : : : "memory"); + for (i = 0; i < 44; i++) + for (j = 0; j < 17; j++) + for (k = 0; k < 2; k++) + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; + asm volatile ("" : : : "memory"); + for (i = 0; i < 44; i++) + for (j = 0; j < 17; j++) + for (k = 0; k < 2; k++) + if (c[i][j][k] != -5105075050047261684) + __builtin_abort (); + return 0; +} Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-03 17:33 ` [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) Jakub Jelinek @ 2016-06-06 8:06 ` Richard Biener 2016-06-06 17:44 ` Jakub Jelinek 2016-06-07 9:23 ` Christophe Lyon 1 sibling, 1 reply; 26+ messages in thread From: Richard Biener @ 2016-06-06 8:06 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Ilya Enkovich, gcc-patches On Fri, 3 Jun 2016, Jakub Jelinek wrote: > On Tue, Jan 12, 2016 at 05:21:37PM +0300, Ilya Enkovich wrote: > > > --- gcc/tree-vect-slp.c.jj 2016-01-08 21:45:57.000000000 +0100 > > > +++ gcc/tree-vect-slp.c 2016-01-11 12:07:19.633366712 +0100 > > > @@ -2999,12 +2999,9 @@ vect_get_constant_vectors (tree op, slp_ > > > gimple *init_stmt; > > > if (VECTOR_BOOLEAN_TYPE_P (vector_type)) > > > { > > > - gcc_assert (fold_convertible_p (TREE_TYPE (vector_type), > > > - op)); > > > + gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); > > > init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); > > > > In vect_init_vector we had to introduce COND_EXPR to choose between 0 and -1 for > > boolean vectors. Shouldn't we do similar in SLP? > > Apparently the answer to this is YES. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/6.2? > > 2016-06-03 Jakub Jelinek <jakub@redhat.com> > > PR tree-optimization/71259 > * tree-vect-slp.c (vect_get_constant_vectors): For > VECTOR_BOOLEAN_TYPE_P, return all ones constant instead of > one for constant op, and use COND_EXPR for non-constant. > > * gcc.dg/vect/pr71259.c: New test. > > --- gcc/tree-vect-slp.c.jj 2016-05-24 10:56:02.000000000 +0200 > +++ gcc/tree-vect-slp.c 2016-06-03 17:01:12.740955935 +0200 > @@ -3056,7 +3056,7 @@ vect_get_constant_vectors (tree op, slp_ > if (integer_zerop (op)) > op = build_int_cst (TREE_TYPE (vector_type), 0); > else if (integer_onep (op)) > - op = build_int_cst (TREE_TYPE (vector_type), 1); > + op = build_all_ones_cst (TREE_TYPE (vector_type)); > else > gcc_unreachable (); > } > @@ -3071,8 +3071,14 @@ vect_get_constant_vectors (tree op, slp_ > gimple *init_stmt; > if (VECTOR_BOOLEAN_TYPE_P (vector_type)) > { > + tree true_val > + = build_all_ones_cst (TREE_TYPE (vector_type)); > + tree false_val > + = build_zero_cst (TREE_TYPE (vector_type)); > gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); > - init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); > + init_stmt = gimple_build_assign (new_temp, COND_EXPR, > + op, true_val, > + false_val); So this ends up generating { a ? -1 : 0, b ? -1 : 0, ... }. That might be less optimal than doing { a, b, ... } ? { -1, -1 ... } : { 0, 0, .. } though I'm not sure we can easily construct a "proper" vector boolean from _Bool values either. Thus the patch is ok. Thanks, Richard. > } > else > { > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 > @@ -0,0 +1,28 @@ > +/* PR tree-optimization/71259 */ > +/* { dg-do run } */ > +/* { dg-options "-O3" } */ > +/* { dg-additional-options "-mavx" { target avx_runtime } } */ > + > +#include "tree-vect.h" > + > +long a, b[1][44][2]; > +long long c[44][17][2]; > + > +int > +main () > +{ > + int i, j, k; > + check_vect (); > + asm volatile ("" : : : "memory"); > + for (i = 0; i < 44; i++) > + for (j = 0; j < 17; j++) > + for (k = 0; k < 2; k++) > + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; > + asm volatile ("" : : : "memory"); > + for (i = 0; i < 44; i++) > + for (j = 0; j < 17; j++) > + for (k = 0; k < 2; k++) > + if (c[i][j][k] != -5105075050047261684) > + __builtin_abort (); > + return 0; > +} > > > Jakub > > -- Richard Biener <rguenther@suse.de> SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nuernberg) ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-06 8:06 ` Richard Biener @ 2016-06-06 17:44 ` Jakub Jelinek 2016-06-07 7:13 ` Richard Biener 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-06 17:44 UTC (permalink / raw) To: Richard Biener; +Cc: Ilya Enkovich, gcc-patches On Mon, Jun 06, 2016 at 10:05:57AM +0200, Richard Biener wrote: > So this ends up generating { a ? -1 : 0, b ? -1 : 0, ... }. That Yes, that is already what we do now for loop vectorization. > might be less optimal than doing { a, b, ... } ? { -1, -1 ... } : { 0, 0, > .. } Well, it would need to be { a, b, ... } != { 0, 0, ... } ? { -1, -1, ... } : { 0, 0, ... } then, doesn't VEC_COND_EXPR assume the condition is in canonical VECTOR_BOOLEAN_TYPE_P form? Anyway, if something like the above would be faster, perhaps generic vector lowering or some similar pass could detect that case post-vectorization and optimize? Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-06 17:44 ` Jakub Jelinek @ 2016-06-07 7:13 ` Richard Biener 0 siblings, 0 replies; 26+ messages in thread From: Richard Biener @ 2016-06-07 7:13 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Ilya Enkovich, gcc-patches On Mon, 6 Jun 2016, Jakub Jelinek wrote: > On Mon, Jun 06, 2016 at 10:05:57AM +0200, Richard Biener wrote: > > So this ends up generating { a ? -1 : 0, b ? -1 : 0, ... }. That > > Yes, that is already what we do now for loop vectorization. > > > might be less optimal than doing { a, b, ... } ? { -1, -1 ... } : { 0, 0, > > .. } > > Well, it would need to be > { a, b, ... } != { 0, 0, ... } ? { -1, -1, ... } : { 0, 0, ... } > then, doesn't VEC_COND_EXPR assume the condition is in canonical > VECTOR_BOOLEAN_TYPE_P form? > > Anyway, if something like the above would be faster, perhaps generic vector > lowering or some similar pass could detect that case post-vectorization and > optimize? Yeah. OTOH an "ideal" vectorizer would already consider the smaller prologue cost for its cost modeling. Richard. ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-03 17:33 ` [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) Jakub Jelinek 2016-06-06 8:06 ` Richard Biener @ 2016-06-07 9:23 ` Christophe Lyon 2016-06-07 9:28 ` Jakub Jelinek 1 sibling, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-07 9:23 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches Hi Jakub, On 3 June 2016 at 19:33, Jakub Jelinek <jakub@redhat.com> wrote: > On Tue, Jan 12, 2016 at 05:21:37PM +0300, Ilya Enkovich wrote: >> > --- gcc/tree-vect-slp.c.jj 2016-01-08 21:45:57.000000000 +0100 >> > +++ gcc/tree-vect-slp.c 2016-01-11 12:07:19.633366712 +0100 >> > @@ -2999,12 +2999,9 @@ vect_get_constant_vectors (tree op, slp_ >> > gimple *init_stmt; >> > if (VECTOR_BOOLEAN_TYPE_P (vector_type)) >> > { >> > - gcc_assert (fold_convertible_p (TREE_TYPE (vector_type), >> > - op)); >> > + gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); >> > init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); >> >> In vect_init_vector we had to introduce COND_EXPR to choose between 0 and -1 for >> boolean vectors. Shouldn't we do similar in SLP? > > Apparently the answer to this is YES. > > Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk/6.2? > > 2016-06-03 Jakub Jelinek <jakub@redhat.com> > > PR tree-optimization/71259 > * tree-vect-slp.c (vect_get_constant_vectors): For > VECTOR_BOOLEAN_TYPE_P, return all ones constant instead of > one for constant op, and use COND_EXPR for non-constant. > > * gcc.dg/vect/pr71259.c: New test. > > --- gcc/tree-vect-slp.c.jj 2016-05-24 10:56:02.000000000 +0200 > +++ gcc/tree-vect-slp.c 2016-06-03 17:01:12.740955935 +0200 > @@ -3056,7 +3056,7 @@ vect_get_constant_vectors (tree op, slp_ > if (integer_zerop (op)) > op = build_int_cst (TREE_TYPE (vector_type), 0); > else if (integer_onep (op)) > - op = build_int_cst (TREE_TYPE (vector_type), 1); > + op = build_all_ones_cst (TREE_TYPE (vector_type)); > else > gcc_unreachable (); > } > @@ -3071,8 +3071,14 @@ vect_get_constant_vectors (tree op, slp_ > gimple *init_stmt; > if (VECTOR_BOOLEAN_TYPE_P (vector_type)) > { > + tree true_val > + = build_all_ones_cst (TREE_TYPE (vector_type)); > + tree false_val > + = build_zero_cst (TREE_TYPE (vector_type)); > gcc_assert (INTEGRAL_TYPE_P (TREE_TYPE (op))); > - init_stmt = gimple_build_assign (new_temp, NOP_EXPR, op); > + init_stmt = gimple_build_assign (new_temp, COND_EXPR, > + op, true_val, > + false_val); > } > else > { > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 > @@ -0,0 +1,28 @@ > +/* PR tree-optimization/71259 */ > +/* { dg-do run } */ > +/* { dg-options "-O3" } */ > +/* { dg-additional-options "-mavx" { target avx_runtime } } */ > + > +#include "tree-vect.h" > + > +long a, b[1][44][2]; > +long long c[44][17][2]; > + > +int > +main () > +{ > + int i, j, k; > + check_vect (); > + asm volatile ("" : : : "memory"); > + for (i = 0; i < 44; i++) > + for (j = 0; j < 17; j++) > + for (k = 0; k < 2; k++) > + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; > + asm volatile ("" : : : "memory"); > + for (i = 0; i < 44; i++) > + for (j = 0; j < 17; j++) > + for (k = 0; k < 2; k++) > + if (c[i][j][k] != -5105075050047261684) > + __builtin_abort (); > + return 0; > +} > This new test fails on ARM targets where the default FPU is not Neon like. The error message I'm seeing is: In file included from /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/pr71259.c:6:0: /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h: In function 'check_vect': /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h:65:5: error: inconsistent operand constraints in an 'asm' Well, the same error message actually appears with other tests, I did notice this one because it is a new one. The arm code is: /* On some processors without NEON support, this instruction may be a no-op, on others it may trap, so check that it executes correctly. */ long long a = 0, b = 1; asm ("vorr %P0, %P1, %P2" : "=w" (a) : "0" (a), "w" (b)); ... which has been here since 2007 :( IIUC, its purpose is to check Neon availability, but this makes the tests fail instead of being unsupported. Why not use an effective-target check instead? Christophe. > > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-07 9:23 ` Christophe Lyon @ 2016-06-07 9:28 ` Jakub Jelinek 2016-06-07 9:36 ` Ramana Radhakrishnan 2016-06-08 9:28 ` Christophe Lyon 0 siblings, 2 replies; 26+ messages in thread From: Jakub Jelinek @ 2016-06-07 9:28 UTC (permalink / raw) To: Christophe Lyon; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: > > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 > > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 > > @@ -0,0 +1,28 @@ > > +/* PR tree-optimization/71259 */ > > +/* { dg-do run } */ > > +/* { dg-options "-O3" } */ Would changing this from dg-options to dg-additional-options help for the ARM issues? check_vect () is the standard way for testing for HW vectorization support and hundreds of tests use it. > > +/* { dg-additional-options "-mavx" { target avx_runtime } } */ > > + > > +#include "tree-vect.h" > > + > > +long a, b[1][44][2]; > > +long long c[44][17][2]; > > + > > +int > > +main () > > +{ > > + int i, j, k; > > + check_vect (); > > + asm volatile ("" : : : "memory"); > > + for (i = 0; i < 44; i++) > > + for (j = 0; j < 17; j++) > > + for (k = 0; k < 2; k++) > > + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; > > + asm volatile ("" : : : "memory"); > > + for (i = 0; i < 44; i++) > > + for (j = 0; j < 17; j++) > > + for (k = 0; k < 2; k++) > > + if (c[i][j][k] != -5105075050047261684) > > + __builtin_abort (); > > + return 0; > > +} > > > > This new test fails on ARM targets where the default FPU is not Neon like. > The error message I'm seeing is: > In file included from > /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/pr71259.c:6:0: > /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h: > In function 'check_vect': > /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h:65:5: > error: inconsistent operand constraints in an 'asm' > > Well, the same error message actually appears with other tests, I did > notice this one because > it is a new one. > > The arm code is: > /* On some processors without NEON support, this instruction may > be a no-op, on others it may trap, so check that it executes > correctly. */ > long long a = 0, b = 1; > asm ("vorr %P0, %P1, %P2" > : "=w" (a) > : "0" (a), "w" (b)); > > ... which has been here since 2007 :( > > IIUC, its purpose is to check Neon availability, but this makes the > tests fail instead of > being unsupported. > > Why not use an effective-target check instead? Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-07 9:28 ` Jakub Jelinek @ 2016-06-07 9:36 ` Ramana Radhakrishnan 2016-06-07 9:42 ` Jakub Jelinek 2016-06-08 9:28 ` Christophe Lyon 1 sibling, 1 reply; 26+ messages in thread From: Ramana Radhakrishnan @ 2016-06-07 9:36 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Christophe Lyon, Richard Biener, Ilya Enkovich, gcc-patches On Tue, Jun 7, 2016 at 10:28 AM, Jakub Jelinek <jakub@redhat.com> wrote: > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 >> > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 >> > @@ -0,0 +1,28 @@ >> > +/* PR tree-optimization/71259 */ >> > +/* { dg-do run } */ >> > +/* { dg-options "-O3" } */ > > Would changing this from dg-options to dg-additional-options help for the > ARM issues? > check_vect () is the standard way for testing for HW vectorization support > and hundreds of tests use it. all tests in gcc.dg/vect have some form of dg-require-effective-target - so I think this test should just have dg-require-effective-target "vect_int" . Ramana > >> > +/* { dg-additional-options "-mavx" { target avx_runtime } } */ >> > + >> > +#include "tree-vect.h" >> > + >> > +long a, b[1][44][2]; >> > +long long c[44][17][2]; >> > + >> > +int >> > +main () >> > +{ >> > + int i, j, k; >> > + check_vect (); >> > + asm volatile ("" : : : "memory"); >> > + for (i = 0; i < 44; i++) >> > + for (j = 0; j < 17; j++) >> > + for (k = 0; k < 2; k++) >> > + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; >> > + asm volatile ("" : : : "memory"); >> > + for (i = 0; i < 44; i++) >> > + for (j = 0; j < 17; j++) >> > + for (k = 0; k < 2; k++) >> > + if (c[i][j][k] != -5105075050047261684) >> > + __builtin_abort (); >> > + return 0; >> > +} >> > >> >> This new test fails on ARM targets where the default FPU is not Neon like. >> The error message I'm seeing is: >> In file included from >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/pr71259.c:6:0: >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h: >> In function 'check_vect': >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h:65:5: >> error: inconsistent operand constraints in an 'asm' >> >> Well, the same error message actually appears with other tests, I did >> notice this one because >> it is a new one. >> >> The arm code is: >> /* On some processors without NEON support, this instruction may >> be a no-op, on others it may trap, so check that it executes >> correctly. */ >> long long a = 0, b = 1; >> asm ("vorr %P0, %P1, %P2" >> : "=w" (a) >> : "0" (a), "w" (b)); >> >> ... which has been here since 2007 :( >> >> IIUC, its purpose is to check Neon availability, but this makes the >> tests fail instead of >> being unsupported. >> >> Why not use an effective-target check instead? > > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-07 9:36 ` Ramana Radhakrishnan @ 2016-06-07 9:42 ` Jakub Jelinek 2016-06-07 12:43 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-07 9:42 UTC (permalink / raw) To: Ramana Radhakrishnan Cc: Christophe Lyon, Richard Biener, Ilya Enkovich, gcc-patches On Tue, Jun 07, 2016 at 10:36:25AM +0100, Ramana Radhakrishnan wrote: > On Tue, Jun 7, 2016 at 10:28 AM, Jakub Jelinek <jakub@redhat.com> wrote: > > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: > >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 > >> > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 > >> > @@ -0,0 +1,28 @@ > >> > +/* PR tree-optimization/71259 */ > >> > +/* { dg-do run } */ > >> > +/* { dg-options "-O3" } */ > > > > Would changing this from dg-options to dg-additional-options help for the > > ARM issues? > > check_vect () is the standard way for testing for HW vectorization support > > and hundreds of tests use it. > > > all tests in gcc.dg/vect have some form of dg-require-effective-target No, at least 170+ tests don't. > - so I think this test should just have dg-require-effective-target > "vect_int" . No, why? This test doesn't test whether the function has been vectorized. It only tests whether it works. And the check_vect () is supposed to exit early if some extra flags were passed by vect.exp (like e.g. on i?86-linux -msse2) and the HW doesn't support those. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-07 9:42 ` Jakub Jelinek @ 2016-06-07 12:43 ` Christophe Lyon 2016-06-07 12:47 ` Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-07 12:43 UTC (permalink / raw) To: Jakub Jelinek Cc: Ramana Radhakrishnan, Richard Biener, Ilya Enkovich, gcc-patches On 7 June 2016 at 11:42, Jakub Jelinek <jakub@redhat.com> wrote: > On Tue, Jun 07, 2016 at 10:36:25AM +0100, Ramana Radhakrishnan wrote: >> On Tue, Jun 7, 2016 at 10:28 AM, Jakub Jelinek <jakub@redhat.com> wrote: >> > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: >> >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 >> >> > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 >> >> > @@ -0,0 +1,28 @@ >> >> > +/* PR tree-optimization/71259 */ >> >> > +/* { dg-do run } */ >> >> > +/* { dg-options "-O3" } */ >> > >> > Would changing this from dg-options to dg-additional-options help for the >> > ARM issues? >> > check_vect () is the standard way for testing for HW vectorization support >> > and hundreds of tests use it. >> >> >> all tests in gcc.dg/vect have some form of dg-require-effective-target > > No, at least 170+ tests don't. > >> - so I think this test should just have dg-require-effective-target >> "vect_int" . > > No, why? This test doesn't test whether the function has been vectorized. > It only tests whether it works. > And the check_vect () is supposed to exit early if some extra flags were > passed by vect.exp (like e.g. on i?86-linux -msse2) and the HW doesn't > support those. > But this makes the tests fails, rather than be unsupported, right? > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-07 12:43 ` Christophe Lyon @ 2016-06-07 12:47 ` Jakub Jelinek 0 siblings, 0 replies; 26+ messages in thread From: Jakub Jelinek @ 2016-06-07 12:47 UTC (permalink / raw) To: Christophe Lyon Cc: Ramana Radhakrishnan, Richard Biener, Ilya Enkovich, gcc-patches On Tue, Jun 07, 2016 at 02:43:37PM +0200, Christophe Lyon wrote: > > No, why? This test doesn't test whether the function has been vectorized. > > It only tests whether it works. > > And the check_vect () is supposed to exit early if some extra flags were > > passed by vect.exp (like e.g. on i?86-linux -msse2) and the HW doesn't > > support those. > > > But this makes the tests fails, rather than be unsupported, right? check_vect is supposed to exit (0) if the HW doesn't support vectorization, so the test would PASS. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-07 9:28 ` Jakub Jelinek 2016-06-07 9:36 ` Ramana Radhakrishnan @ 2016-06-08 9:28 ` Christophe Lyon 2016-06-08 10:26 ` Richard Biener 1 sibling, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-08 9:28 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On 7 June 2016 at 11:28, Jakub Jelinek <jakub@redhat.com> wrote: > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 >> > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 >> > @@ -0,0 +1,28 @@ >> > +/* PR tree-optimization/71259 */ >> > +/* { dg-do run } */ >> > +/* { dg-options "-O3" } */ > > Would changing this from dg-options to dg-additional-options help for the > ARM issues? > check_vect () is the standard way for testing for HW vectorization support > and hundreds of tests use it. > This does fix the problem for pr71259. I've also tried to replace all the dg-options by dg-additional-options in vect/*.c, and this improves: gcc.dg/vect/vect-shift-2-big-array.c gcc.dg/vect/vect-shift-2.c It has no effect on arm/aarch64 on these tests (which already pass or are unsupported): no-tree-pre-pr45241.c pr18308.c pr24049.c pr33373.c pr36228.c pr42395.c pr42604.c pr46663.c (unsupported) pr48765.c pr49093.c pr49352.c pr52298.c pr52870.c pr53185.c pr53773.c pr56695.c (unsupported) pr62171.c pr63530.c pr68339.c (unsupported) vect-82_64.c (unsupported) vect-83_64.c vect-debug-pr41926.c vect-fold-1.c vect-singleton_1.c So: should I change dg-options into dg-additional-options for all the tests for consistency, or only on the 3 ones where it makes them pass? (pr71259.c, vect-shift-2-big-array.c, vect-shift-2.c) Thanks Christophe. >> > +/* { dg-additional-options "-mavx" { target avx_runtime } } */ >> > + >> > +#include "tree-vect.h" >> > + >> > +long a, b[1][44][2]; >> > +long long c[44][17][2]; >> > + >> > +int >> > +main () >> > +{ >> > + int i, j, k; >> > + check_vect (); >> > + asm volatile ("" : : : "memory"); >> > + for (i = 0; i < 44; i++) >> > + for (j = 0; j < 17; j++) >> > + for (k = 0; k < 2; k++) >> > + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; >> > + asm volatile ("" : : : "memory"); >> > + for (i = 0; i < 44; i++) >> > + for (j = 0; j < 17; j++) >> > + for (k = 0; k < 2; k++) >> > + if (c[i][j][k] != -5105075050047261684) >> > + __builtin_abort (); >> > + return 0; >> > +} >> > >> >> This new test fails on ARM targets where the default FPU is not Neon like. >> The error message I'm seeing is: >> In file included from >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/pr71259.c:6:0: >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h: >> In function 'check_vect': >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h:65:5: >> error: inconsistent operand constraints in an 'asm' >> >> Well, the same error message actually appears with other tests, I did >> notice this one because >> it is a new one. >> >> The arm code is: >> /* On some processors without NEON support, this instruction may >> be a no-op, on others it may trap, so check that it executes >> correctly. */ >> long long a = 0, b = 1; >> asm ("vorr %P0, %P1, %P2" >> : "=w" (a) >> : "0" (a), "w" (b)); >> >> ... which has been here since 2007 :( >> >> IIUC, its purpose is to check Neon availability, but this makes the >> tests fail instead of >> being unsupported. >> >> Why not use an effective-target check instead? > > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-08 9:28 ` Christophe Lyon @ 2016-06-08 10:26 ` Richard Biener 2016-06-08 10:32 ` Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Richard Biener @ 2016-06-08 10:26 UTC (permalink / raw) To: Christophe Lyon; +Cc: Jakub Jelinek, Ilya Enkovich, gcc-patches On Wed, 8 Jun 2016, Christophe Lyon wrote: > On 7 June 2016 at 11:28, Jakub Jelinek <jakub@redhat.com> wrote: > > On Tue, Jun 07, 2016 at 11:23:01AM +0200, Christophe Lyon wrote: > >> > --- gcc/testsuite/gcc.dg/vect/pr71259.c.jj 2016-06-03 17:05:37.693475438 +0200 > >> > +++ gcc/testsuite/gcc.dg/vect/pr71259.c 2016-06-03 17:05:32.418544731 +0200 > >> > @@ -0,0 +1,28 @@ > >> > +/* PR tree-optimization/71259 */ > >> > +/* { dg-do run } */ > >> > +/* { dg-options "-O3" } */ > > > > Would changing this from dg-options to dg-additional-options help for the > > ARM issues? > > check_vect () is the standard way for testing for HW vectorization support > > and hundreds of tests use it. > > > > This does fix the problem for pr71259. > I've also tried to replace all the dg-options by dg-additional-options > in vect/*.c, and this improves: > gcc.dg/vect/vect-shift-2-big-array.c > gcc.dg/vect/vect-shift-2.c > > It has no effect on arm/aarch64 on these tests (which already pass or > are unsupported): > no-tree-pre-pr45241.c > pr18308.c > pr24049.c > pr33373.c > pr36228.c > pr42395.c > pr42604.c > pr46663.c > (unsupported) pr48765.c > pr49093.c > pr49352.c > pr52298.c > pr52870.c > pr53185.c > pr53773.c > pr56695.c > (unsupported) pr62171.c > pr63530.c > pr68339.c > (unsupported) vect-82_64.c > (unsupported) vect-83_64.c > vect-debug-pr41926.c > vect-fold-1.c > vect-singleton_1.c > > So: should I change dg-options into dg-additional-options for all the > tests for consistency, or only on the 3 ones where it makes them pass? > (pr71259.c, vect-shift-2-big-array.c, vect-shift-2.c) I think all tests should use dg-additional-options. Richard. > Thanks > > Christophe. > > >> > +/* { dg-additional-options "-mavx" { target avx_runtime } } */ > >> > + > >> > +#include "tree-vect.h" > >> > + > >> > +long a, b[1][44][2]; > >> > +long long c[44][17][2]; > >> > + > >> > +int > >> > +main () > >> > +{ > >> > + int i, j, k; > >> > + check_vect (); > >> > + asm volatile ("" : : : "memory"); > >> > + for (i = 0; i < 44; i++) > >> > + for (j = 0; j < 17; j++) > >> > + for (k = 0; k < 2; k++) > >> > + c[i][j][k] = (30995740 >= *(k + *(j + *b)) != (a != 8)) - 5105075050047261684; > >> > + asm volatile ("" : : : "memory"); > >> > + for (i = 0; i < 44; i++) > >> > + for (j = 0; j < 17; j++) > >> > + for (k = 0; k < 2; k++) > >> > + if (c[i][j][k] != -5105075050047261684) > >> > + __builtin_abort (); > >> > + return 0; > >> > +} > >> > > >> > >> This new test fails on ARM targets where the default FPU is not Neon like. > >> The error message I'm seeing is: > >> In file included from > >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/pr71259.c:6:0: > >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h: > >> In function 'check_vect': > >> /aci-gcc-fsf/sources/gcc-fsf/gccsrc/gcc/testsuite/gcc.dg/vect/tree-vect.h:65:5: > >> error: inconsistent operand constraints in an 'asm' > >> > >> Well, the same error message actually appears with other tests, I did > >> notice this one because > >> it is a new one. > >> > >> The arm code is: > >> /* On some processors without NEON support, this instruction may > >> be a no-op, on others it may trap, so check that it executes > >> correctly. */ > >> long long a = 0, b = 1; > >> asm ("vorr %P0, %P1, %P2" > >> : "=w" (a) > >> : "0" (a), "w" (b)); > >> > >> ... which has been here since 2007 :( > >> > >> IIUC, its purpose is to check Neon availability, but this makes the > >> tests fail instead of > >> being unsupported. > >> > >> Why not use an effective-target check instead? > > > > Jakub > > -- Richard Biener <rguenther@suse.de> SUSE LINUX GmbH, GF: Felix Imendoerffer, Jane Smithard, Graham Norton, HRB 21284 (AG Nuernberg) ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-08 10:26 ` Richard Biener @ 2016-06-08 10:32 ` Jakub Jelinek 2016-06-08 10:33 ` Richard Biener 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-08 10:32 UTC (permalink / raw) To: Richard Biener; +Cc: Christophe Lyon, Ilya Enkovich, gcc-patches On Wed, Jun 08, 2016 at 12:26:17PM +0200, Richard Biener wrote: > > So: should I change dg-options into dg-additional-options for all the > > tests for consistency, or only on the 3 ones where it makes them pass? > > (pr71259.c, vect-shift-2-big-array.c, vect-shift-2.c) > > I think all tests should use dg-additional-options. All tests in {gcc,g++}.dg/vect/, right? I agree with that. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-08 10:32 ` Jakub Jelinek @ 2016-06-08 10:33 ` Richard Biener 2016-06-08 14:44 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Richard Biener @ 2016-06-08 10:33 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Christophe Lyon, Ilya Enkovich, gcc-patches On Wed, 8 Jun 2016, Jakub Jelinek wrote: > On Wed, Jun 08, 2016 at 12:26:17PM +0200, Richard Biener wrote: > > > So: should I change dg-options into dg-additional-options for all the > > > tests for consistency, or only on the 3 ones where it makes them pass? > > > (pr71259.c, vect-shift-2-big-array.c, vect-shift-2.c) > > > > I think all tests should use dg-additional-options. > > All tests in {gcc,g++}.dg/vect/, right? I agree with that. Yes. [and most of the vect.exp fancy-filename stuff should be replaced by adding dg-additional-options] Richard. ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-08 10:33 ` Richard Biener @ 2016-06-08 14:44 ` Christophe Lyon 2016-06-08 14:50 ` Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-08 14:44 UTC (permalink / raw) To: Richard Biener; +Cc: Jakub Jelinek, Ilya Enkovich, gcc-patches [-- Attachment #1: Type: text/plain, Size: 1311 bytes --] On 8 June 2016 at 12:33, Richard Biener <rguenther@suse.de> wrote: > On Wed, 8 Jun 2016, Jakub Jelinek wrote: > >> On Wed, Jun 08, 2016 at 12:26:17PM +0200, Richard Biener wrote: >> > > So: should I change dg-options into dg-additional-options for all the >> > > tests for consistency, or only on the 3 ones where it makes them pass? >> > > (pr71259.c, vect-shift-2-big-array.c, vect-shift-2.c) >> > >> > I think all tests should use dg-additional-options. >> >> All tests in {gcc,g++}.dg/vect/, right? I agree with that. > > Yes. [and most of the vect.exp fancy-filename stuff should be replaced > by adding dg-additional-options] > I've tried the attached patch (which does only dg-options -> dg-additional-options). For GCC, it's better, except that on arm-none-eabi qemu complains about an illegal instruction when asked to use arm926 and GCC is configured with the default cpu. Maybe that's because check_vect does not have the expected behaviour ? (I have checked yet which instruction causes that because it will take a bit of time to reproduce manually the needed environment) For G++, the tests now pass with --std=c++XX instead of std=gnu++XX. Is it OK? <DATE> Christophe Lyon <christophe.lyon@linaro.org> * gcc.dg/vect/YYY.c: Use dg-additional options instead of dg-options. > Richard. [-- Attachment #2: vect-options.patch.txt --] [-- Type: text/plain, Size: 15013 bytes --] diff --git a/gcc/testsuite/g++.dg/vect/pr33834_2.cc b/gcc/testsuite/g++.dg/vect/pr33834_2.cc index ecaf588..49e72d2 100644 --- a/gcc/testsuite/g++.dg/vect/pr33834_2.cc +++ b/gcc/testsuite/g++.dg/vect/pr33834_2.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize" } */ +/* { dg-additional-options "-O3 -ftree-vectorize" } */ /* Testcase by Martin Michlmayr <tbm@cyrius.com> */ diff --git a/gcc/testsuite/g++.dg/vect/pr33860a.cc b/gcc/testsuite/g++.dg/vect/pr33860a.cc index 0e5164f..bbfdeef 100644 --- a/gcc/testsuite/g++.dg/vect/pr33860a.cc +++ b/gcc/testsuite/g++.dg/vect/pr33860a.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ +/* { dg-additional-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* Testcase by Martin Michlmayr <tbm@cyrius.com> */ diff --git a/gcc/testsuite/g++.dg/vect/pr45470-a.cc b/gcc/testsuite/g++.dg/vect/pr45470-a.cc index 98ce4ca..ba5873c 100644 --- a/gcc/testsuite/g++.dg/vect/pr45470-a.cc +++ b/gcc/testsuite/g++.dg/vect/pr45470-a.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */ struct A { diff --git a/gcc/testsuite/g++.dg/vect/pr45470-b.cc b/gcc/testsuite/g++.dg/vect/pr45470-b.cc index 3ad66ec..ce04f8e 100644 --- a/gcc/testsuite/g++.dg/vect/pr45470-b.cc +++ b/gcc/testsuite/g++.dg/vect/pr45470-b.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */ template < typename _Tp > struct new_allocator { diff --git a/gcc/testsuite/g++.dg/vect/pr60896.cc b/gcc/testsuite/g++.dg/vect/pr60896.cc index c6ce68b..b4ff0d3 100644 --- a/gcc/testsuite/g++.dg/vect/pr60896.cc +++ b/gcc/testsuite/g++.dg/vect/pr60896.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3" } */ +/* { dg-additional-options "-O3" } */ struct A { diff --git a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c index 54aa89b..00055b8 100644 --- a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c +++ b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c @@ -1,6 +1,6 @@ /* PR tree-optimization/45241 */ /* { dg-do compile } */ -/* { dg-options "-ftree-vectorize" } */ +/* { dg-additional-options "-ftree-vectorize" } */ int foo (short x) diff --git a/gcc/testsuite/gcc.dg/vect/pr18308.c b/gcc/testsuite/gcc.dg/vect/pr18308.c index b71f08e..51bcc83 100644 --- a/gcc/testsuite/gcc.dg/vect/pr18308.c +++ b/gcc/testsuite/gcc.dg/vect/pr18308.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -ftree-vectorize -funroll-loops" } */ +/* { dg-additional-options "-O -ftree-vectorize -funroll-loops" } */ void foo(); void bar(int j) diff --git a/gcc/testsuite/gcc.dg/vect/pr24049.c b/gcc/testsuite/gcc.dg/vect/pr24049.c index a7798bd..dd3e94c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr24049.c +++ b/gcc/testsuite/gcc.dg/vect/pr24049.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */ +/* { dg-additional-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */ void unscrunch (unsigned char *, int *); diff --git a/gcc/testsuite/gcc.dg/vect/pr33373.c b/gcc/testsuite/gcc.dg/vect/pr33373.c index efba2ab..7ab6223 100644 --- a/gcc/testsuite/gcc.dg/vect/pr33373.c +++ b/gcc/testsuite/gcc.dg/vect/pr33373.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-do compile } */ void DOSMEM_FillIsrTable(int*isr) { int i; diff --git a/gcc/testsuite/gcc.dg/vect/pr36228.c b/gcc/testsuite/gcc.dg/vect/pr36228.c index 5f17739..710cf95 100644 --- a/gcc/testsuite/gcc.dg/vect/pr36228.c +++ b/gcc/testsuite/gcc.dg/vect/pr36228.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -fdump-tree-vect-details" } */ +/* { dg-additional-options "-O3 -fdump-tree-vect-details" } */ #define COLS 8 #define ROWS 8 diff --git a/gcc/testsuite/gcc.dg/vect/pr42395.c b/gcc/testsuite/gcc.dg/vect/pr42395.c index 7d0b832..540473b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr42395.c +++ b/gcc/testsuite/gcc.dg/vect/pr42395.c @@ -1,6 +1,6 @@ /* PR debug/42395 */ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize -g" } */ +/* { dg-additional-options "-O3 -ftree-vectorize -g" } */ void foo(int j, int *A) { diff --git a/gcc/testsuite/gcc.dg/vect/pr42604.c b/gcc/testsuite/gcc.dg/vect/pr42604.c index 4e05c23..1619f24 100644 --- a/gcc/testsuite/gcc.dg/vect/pr42604.c +++ b/gcc/testsuite/gcc.dg/vect/pr42604.c @@ -1,6 +1,6 @@ /* PR debug/42604 */ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize -g -ffast-math" } */ +/* { dg-additional-options "-O3 -ftree-vectorize -g -ffast-math" } */ unsigned *d; unsigned short e; diff --git a/gcc/testsuite/gcc.dg/vect/pr46663.c b/gcc/testsuite/gcc.dg/vect/pr46663.c index 15f15a5..b42e114 100644 --- a/gcc/testsuite/gcc.dg/vect/pr46663.c +++ b/gcc/testsuite/gcc.dg/vect/pr46663.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */ +/* { dg-additional-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */ typedef __attribute__ ((const)) int (*bart) (void); diff --git a/gcc/testsuite/gcc.dg/vect/pr48765.c b/gcc/testsuite/gcc.dg/vect/pr48765.c index 978dc25..ae36437 100644 --- a/gcc/testsuite/gcc.dg/vect/pr48765.c +++ b/gcc/testsuite/gcc.dg/vect/pr48765.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ -/* { dg-options "-O3 -mcpu=power6" } */ +/* { dg-additional-options "-O3 -mcpu=power6" } */ enum reg_class { diff --git a/gcc/testsuite/gcc.dg/vect/pr49093.c b/gcc/testsuite/gcc.dg/vect/pr49093.c index 5a29506..9b3b7f4 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49093.c +++ b/gcc/testsuite/gcc.dg/vect/pr49093.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */ volatile unsigned char g_324[4] = {0, 1, 0, 1}; void foo (int); diff --git a/gcc/testsuite/gcc.dg/vect/pr49352.c b/gcc/testsuite/gcc.dg/vect/pr49352.c index d8e0bae..0d3fc9c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49352.c +++ b/gcc/testsuite/gcc.dg/vect/pr49352.c @@ -1,6 +1,6 @@ /* PR tree-optimization/49352 */ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fcompare-debug" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -fcompare-debug" } */ /* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ int diff --git a/gcc/testsuite/gcc.dg/vect/pr52298.c b/gcc/testsuite/gcc.dg/vect/pr52298.c index 453d7c8..4aa5c0d 100644 --- a/gcc/testsuite/gcc.dg/vect/pr52298.c +++ b/gcc/testsuite/gcc.dg/vect/pr52298.c @@ -1,4 +1,4 @@ -/* { dg-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */ extern void abort (void); int c[80]; diff --git a/gcc/testsuite/gcc.dg/vect/pr52870.c b/gcc/testsuite/gcc.dg/vect/pr52870.c index 7b185ee..b89856a 100644 --- a/gcc/testsuite/gcc.dg/vect/pr52870.c +++ b/gcc/testsuite/gcc.dg/vect/pr52870.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize" } */ +/* { dg-additional-options "-O1 -ftree-vectorize" } */ void foo (unsigned long int); diff --git a/gcc/testsuite/gcc.dg/vect/pr53185.c b/gcc/testsuite/gcc.dg/vect/pr53185.c index af1efba..adf208b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr53185.c +++ b/gcc/testsuite/gcc.dg/vect/pr53185.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize" } */ +/* { dg-additional-options "-O3 -ftree-vectorize" } */ unsigned short a, e; int *b, *d; int c; diff --git a/gcc/testsuite/gcc.dg/vect/pr53773.c b/gcc/testsuite/gcc.dg/vect/pr53773.c index 2be76d7..1bee98b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr53773.c +++ b/gcc/testsuite/gcc.dg/vect/pr53773.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-fdump-tree-optimized" } */ +/* { dg-additional-options "-fdump-tree-optimized" } */ int foo (int integral, int decimal, int power_ten) diff --git a/gcc/testsuite/gcc.dg/vect/pr56695.c b/gcc/testsuite/gcc.dg/vect/pr56695.c index ee3d829..2fbe754 100644 --- a/gcc/testsuite/gcc.dg/vect/pr56695.c +++ b/gcc/testsuite/gcc.dg/vect/pr56695.c @@ -1,6 +1,6 @@ /* PR tree-optimization/56695 */ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-additional-options "-O2 -ftree-vectorize" } */ int a, b, i; diff --git a/gcc/testsuite/gcc.dg/vect/pr62171.c b/gcc/testsuite/gcc.dg/vect/pr62171.c index 18517b3..bada4db 100644 --- a/gcc/testsuite/gcc.dg/vect/pr62171.c +++ b/gcc/testsuite/gcc.dg/vect/pr62171.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ /* { dg-require-effective-target vect_double } */ struct omp_data_i diff --git a/gcc/testsuite/gcc.dg/vect/pr63530.c b/gcc/testsuite/gcc.dg/vect/pr63530.c index b583b9b..919b355 100644 --- a/gcc/testsuite/gcc.dg/vect/pr63530.c +++ b/gcc/testsuite/gcc.dg/vect/pr63530.c @@ -1,4 +1,4 @@ -/* { dg-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */ /* PR tree-optimization/63530 */ /* On armv7 hardware, following options cause run time failure */ diff --git a/gcc/testsuite/gcc.dg/vect/pr68339.c b/gcc/testsuite/gcc.dg/vect/pr68339.c index ab0eede..28fa294 100644 --- a/gcc/testsuite/gcc.dg/vect/pr68339.c +++ b/gcc/testsuite/gcc.dg/vect/pr68339.c @@ -1,6 +1,6 @@ /* PR middle-end/68339 */ /* { dg-do compile } */ -/* { dg-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */ +/* { dg-additional-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */ #pragma omp declare simd notinbranch int diff --git a/gcc/testsuite/gcc.dg/vect/pr71259.c b/gcc/testsuite/gcc.dg/vect/pr71259.c index eefa243..89aacd9 100644 --- a/gcc/testsuite/gcc.dg/vect/pr71259.c +++ b/gcc/testsuite/gcc.dg/vect/pr71259.c @@ -1,6 +1,6 @@ /* PR tree-optimization/71259 */ /* { dg-do run } */ -/* { dg-options "-O3" } */ +/* { dg-additional-options "-O3" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-82_64.c b/gcc/testsuite/gcc.dg/vect/vect-82_64.c index fc7434a..e5bb509 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-82_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-82_64.c @@ -1,6 +1,6 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ -/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/vect-83_64.c b/gcc/testsuite/gcc.dg/vect/vect-83_64.c index 03f9f7b..39fd998 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-83_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-83_64.c @@ -1,6 +1,6 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ -/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c index a2d36d3..4429348 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c +++ b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c @@ -1,6 +1,6 @@ /* PR debug/41926 */ /* { dg-do compile } */ -/* { dg-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ void diff --git a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c index 2bd21a4..cc1349e 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-ccp1" } */ +/* { dg-additional-options "-O2 -fdump-tree-ccp1" } */ typedef unsigned char v4qi __attribute__ ((vector_size (4))); diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c index 85ff0e0..682b319 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c +++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-require-effective-target vect_shift } */ /* { dg-require-effective-target vect_int } */ /* Check the standard integer types for left and right shifts to see if the diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c index 6199cd6..ba8e7c1 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c +++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-require-effective-target vect_shift } */ /* { dg-require-effective-target vect_int } */ /* Check the standard integer types for left and right shifts to see if the diff --git a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c index 6c2ff49..bd243f8 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c @@ -1,7 +1,7 @@ /* PR target/59843 ICE on function taking/returning vector of one float64_t. */ /* { dg-do compile } */ -/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ +/* { dg-additional-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ #define TEST(BASETYPE, VECTYPE, SUFFIX) \ typedef BASETYPE VECTYPE \ ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-08 14:44 ` Christophe Lyon @ 2016-06-08 14:50 ` Jakub Jelinek 2016-06-09 12:18 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-08 14:50 UTC (permalink / raw) To: Christophe Lyon; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: > I've tried the attached patch (which does only dg-options -> > dg-additional-options). > For GCC, it's better, except that on arm-none-eabi qemu complains about > an illegal instruction when asked to use arm926 and GCC is configured with > the default cpu. Maybe that's because check_vect does not have the expected check_vect installs a SIGILL handler and if the insn is invalid, excepts a signal to be raised. Is that not the case with qemu? Or is qemu just being too noisy? > <DATE> Christophe Lyon <christophe.lyon@linaro.org> > > * gcc.dg/vect/YYY.c: Use dg-additional options instead of dg-options. Please list all the changed tests in the ChangeLog (with : Likewise. for all but the first one). Ok with that change. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-08 14:50 ` Jakub Jelinek @ 2016-06-09 12:18 ` Christophe Lyon 2016-06-09 12:31 ` Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-09 12:18 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On 8 June 2016 at 16:50, Jakub Jelinek <jakub@redhat.com> wrote: > On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: >> I've tried the attached patch (which does only dg-options -> >> dg-additional-options). >> For GCC, it's better, except that on arm-none-eabi qemu complains about >> an illegal instruction when asked to use arm926 and GCC is configured with >> the default cpu. Maybe that's because check_vect does not have the expected > > check_vect installs a SIGILL handler and if the insn is invalid, excepts > a signal to be raised. Is that not the case with qemu? Or is qemu just > being too noisy? > qemu complains when executing check_vect's prologue, which contains movw r1, #35712 which is not supported either on arm926. I don't know if the signal is not raised or if qemu hides it (I'm using qemu user mode) >> <DATE> Christophe Lyon <christophe.lyon@linaro.org> >> >> * gcc.dg/vect/YYY.c: Use dg-additional options instead of dg-options. > > Please list all the changed tests in the ChangeLog (with : Likewise. for > all but the first one). > Yes, that's what I meant. > Ok with that change. > > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-09 12:18 ` Christophe Lyon @ 2016-06-09 12:31 ` Jakub Jelinek 2016-06-09 12:40 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-09 12:31 UTC (permalink / raw) To: Christophe Lyon; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On Thu, Jun 09, 2016 at 02:18:44PM +0200, Christophe Lyon wrote: > On 8 June 2016 at 16:50, Jakub Jelinek <jakub@redhat.com> wrote: > > On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: > >> I've tried the attached patch (which does only dg-options -> > >> dg-additional-options). > >> For GCC, it's better, except that on arm-none-eabi qemu complains about > >> an illegal instruction when asked to use arm926 and GCC is configured with > >> the default cpu. Maybe that's because check_vect does not have the expected > > > > check_vect installs a SIGILL handler and if the insn is invalid, excepts > > a signal to be raised. Is that not the case with qemu? Or is qemu just > > being too noisy? > > > qemu complains when executing check_vect's prologue, which contains > movw r1, #35712 > which is not supported either on arm926. Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); call or after it. If before, then I guess you'd better rewrite the long long a = 0, b = 1; asm ("vorr %P0, %P1, %P2" : "=w" (a) : "0" (a), "w" (b)); if (a != 1) fully into inline asm, if after, then it is likely either just too noisy qemu, or misdesigned issue in qemu. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-09 12:31 ` Jakub Jelinek @ 2016-06-09 12:40 ` Christophe Lyon 2016-06-09 12:46 ` Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-09 12:40 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On 9 June 2016 at 14:31, Jakub Jelinek <jakub@redhat.com> wrote: > On Thu, Jun 09, 2016 at 02:18:44PM +0200, Christophe Lyon wrote: >> On 8 June 2016 at 16:50, Jakub Jelinek <jakub@redhat.com> wrote: >> > On Wed, Jun 08, 2016 at 04:44:00PM +0200, Christophe Lyon wrote: >> >> I've tried the attached patch (which does only dg-options -> >> >> dg-additional-options). >> >> For GCC, it's better, except that on arm-none-eabi qemu complains about >> >> an illegal instruction when asked to use arm926 and GCC is configured with >> >> the default cpu. Maybe that's because check_vect does not have the expected >> > >> > check_vect installs a SIGILL handler and if the insn is invalid, excepts >> > a signal to be raised. Is that not the case with qemu? Or is qemu just >> > being too noisy? >> > >> qemu complains when executing check_vect's prologue, which contains >> movw r1, #35712 >> which is not supported either on arm926. > > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); > call or after it. If before, then I guess you'd better rewrite the > long long a = 0, b = 1; > asm ("vorr %P0, %P1, %P2" > : "=w" (a) > : "0" (a), "w" (b)); > if (a != 1) Of course you are right: it happens just before the call to signal, to build the sig_ill_handler address in r1. So it's not even a problem with rewriting the asm. > fully into inline asm, if after, then it is likely either just too noisy > qemu, or misdesigned issue in qemu. > > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-09 12:40 ` Christophe Lyon @ 2016-06-09 12:46 ` Jakub Jelinek 2016-06-15 8:45 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-09 12:46 UTC (permalink / raw) To: Christophe Lyon; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote: > > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); > > call or after it. If before, then I guess you'd better rewrite the > > long long a = 0, b = 1; > > asm ("vorr %P0, %P1, %P2" > > : "=w" (a) > > : "0" (a), "w" (b)); > > if (a != 1) > > Of course you are right: it happens just before the call to signal, > to build the sig_ill_handler address in r1. > > So it's not even a problem with rewriting the asm. Ugh, so the added options don't affect just vectorized code, but normal integer only code? check_vect is fragile, there is always a risk that some instruction is scheduled before the call. If you have working target attribute support, I think you should compile check_vect with attribute set to some lowest common denominator that every ARM CPU supports (if there is any, that is). Though most likely you'll need to tweak the inline asm, because maybe "w" constraint won't be available then. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-09 12:46 ` Jakub Jelinek @ 2016-06-15 8:45 ` Christophe Lyon 2016-06-21 13:10 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-15 8:45 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches [-- Attachment #1: Type: text/plain, Size: 1592 bytes --] On 9 June 2016 at 14:46, Jakub Jelinek <jakub@redhat.com> wrote: > On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote: >> > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); >> > call or after it. If before, then I guess you'd better rewrite the >> > long long a = 0, b = 1; >> > asm ("vorr %P0, %P1, %P2" >> > : "=w" (a) >> > : "0" (a), "w" (b)); >> > if (a != 1) >> >> Of course you are right: it happens just before the call to signal, >> to build the sig_ill_handler address in r1. >> >> So it's not even a problem with rewriting the asm. > > Ugh, so the added options don't affect just vectorized code, but normal > integer only code? > check_vect is fragile, there is always a risk that some instruction is > scheduled before the call. Yes, here it's an instruction used to build a parameter of the call. > If you have working target attribute support, I think you should compile > check_vect with attribute set to some lowest common denominator that every > ARM CPU supports (if there is any, that is). Though most likely you'll need > to tweak the inline asm, because maybe "w" constraint won't be available > then. ARM does not support attribute/pragma cpu :( Here is a new patch version, which removes the hardcoded dg-do run directives, so that tests use compile or run depending on the result of check_vect_support_and_set_flags. On ARM, this first uses arm_neon_ok to detect the required flags, then depending on arm_neon_hw, it decides whether to dg-do run or compile. OK? Christophe > Jakub [-- Attachment #2: vect-v2.log.txt --] [-- Type: text/plain, Size: 1782 bytes --] gcc/testsuite/ChangeLog: 2016-06-15 Christophe Lyon <christophe.lyon@linaro.org> * g++.dg/vect/pr33834_2.cc: Use dg-additional options instead of dg-options. * g++.dg/vect/pr33860a.cc: Likewise. * g++.dg/vect/pr45470-a.cc: Likewise. * g++.dg/vect/pr45470-b.cc: Likewise. * g++.dg/vect/pr60896.cc: Likewise. * gcc.dg/vect/no-tree-pre-pr45241.c: Likewise. * gcc.dg/vect/pr18308.c: Likewise. * gcc.dg/vect/pr24049.c: Likewise. * gcc.dg/vect/pr33373.c: Likewise. * gcc.dg/vect/pr36228.c: Likewise. * gcc.dg/vect/pr42395.c: Likewise. * gcc.dg/vect/pr42604.c: Likewise. * gcc.dg/vect/pr46663.c: Likewise. * gcc.dg/vect/pr48765.c: Likewise. * gcc.dg/vect/pr49093.c: Likewise. * gcc.dg/vect/pr49352.c: Likewise. * gcc.dg/vect/pr52298.c: Likewise. * gcc.dg/vect/pr52870.c: Likewise. * gcc.dg/vect/pr53185.c: Likewise. * gcc.dg/vect/pr53773.c: Likewise. * gcc.dg/vect/pr56695.c: Likewise. * gcc.dg/vect/pr62171.c: Likewise. * gcc.dg/vect/pr63530.c: Likewise. * gcc.dg/vect/pr68339.c: Likewise. * gcc.dg/vect/vect-82_64.c: Likewise. * gcc.dg/vect/vect-83_64.c: Likewise. * gcc.dg/vect/vect-debug-pr41926.c: Likewise. * gcc.dg/vect/vect-fold-1.c: Likewise. * gcc.dg/vect/vect-shift-2-big-array.c: Likewise. * gcc.dg/vect/vect-shift-2.c: Likewise. * gcc.dg/vect/vect-singleton_1.c: Likewise. * gcc.dg/vect/O3-pr70130.c: Remove dg-do run. * gcc.dg/vect/pr70021.c: Likewise. * gcc.dg/vect/pr70138-1.c: Likewise. * gcc.dg/vect/pr70138-2.c: Likewise. * gcc.dg/vect/pr70354-1.c: Likewise. * gcc.dg/vect/pr70354-2.c: Likewise. * gcc.dg/vect/vect-nb-iter-ub-1.c: Likewise. * gcc.dg/vect/vect-nb-iter-ub-2.c: Likewise. * gcc.dg/vect/vect-nb-iter-ub-3.c: Likewise. * gcc.dg/vect/pr71259.c: Use dg-additional options instead of dg-options. Remove dg-do run. [-- Attachment #3: vect-v2.patch.txt --] [-- Type: text/plain, Size: 18311 bytes --] diff --git a/gcc/testsuite/g++.dg/vect/pr33834_2.cc b/gcc/testsuite/g++.dg/vect/pr33834_2.cc index ecaf588..49e72d2 100644 --- a/gcc/testsuite/g++.dg/vect/pr33834_2.cc +++ b/gcc/testsuite/g++.dg/vect/pr33834_2.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize" } */ +/* { dg-additional-options "-O3 -ftree-vectorize" } */ /* Testcase by Martin Michlmayr <tbm@cyrius.com> */ diff --git a/gcc/testsuite/g++.dg/vect/pr33860a.cc b/gcc/testsuite/g++.dg/vect/pr33860a.cc index 0e5164f..bbfdeef 100644 --- a/gcc/testsuite/g++.dg/vect/pr33860a.cc +++ b/gcc/testsuite/g++.dg/vect/pr33860a.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ +/* { dg-additional-options "-Wno-psabi" { target { { i?86-*-* x86_64-*-* } && ilp32 } } } */ /* Testcase by Martin Michlmayr <tbm@cyrius.com> */ diff --git a/gcc/testsuite/g++.dg/vect/pr45470-a.cc b/gcc/testsuite/g++.dg/vect/pr45470-a.cc index 98ce4ca..ba5873c 100644 --- a/gcc/testsuite/g++.dg/vect/pr45470-a.cc +++ b/gcc/testsuite/g++.dg/vect/pr45470-a.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fnon-call-exceptions" } */ struct A { diff --git a/gcc/testsuite/g++.dg/vect/pr45470-b.cc b/gcc/testsuite/g++.dg/vect/pr45470-b.cc index 3ad66ec..ce04f8e 100644 --- a/gcc/testsuite/g++.dg/vect/pr45470-b.cc +++ b/gcc/testsuite/g++.dg/vect/pr45470-b.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fno-vect-cost-model -fnon-call-exceptions" } */ template < typename _Tp > struct new_allocator { diff --git a/gcc/testsuite/g++.dg/vect/pr60896.cc b/gcc/testsuite/g++.dg/vect/pr60896.cc index c6ce68b..b4ff0d3 100644 --- a/gcc/testsuite/g++.dg/vect/pr60896.cc +++ b/gcc/testsuite/g++.dg/vect/pr60896.cc @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3" } */ +/* { dg-additional-options "-O3" } */ struct A { diff --git a/gcc/testsuite/gcc.dg/vect/O3-pr70130.c b/gcc/testsuite/gcc.dg/vect/O3-pr70130.c index e9938c2..288982f 100644 --- a/gcc/testsuite/gcc.dg/vect/O3-pr70130.c +++ b/gcc/testsuite/gcc.dg/vect/O3-pr70130.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target vsx_hw { target powerpc*-*-* } } */ /* { dg-additional-options "-mcpu=power7" { target powerpc*-*-* } } */ diff --git a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c index 54aa89b..00055b8 100644 --- a/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c +++ b/gcc/testsuite/gcc.dg/vect/no-tree-pre-pr45241.c @@ -1,6 +1,6 @@ /* PR tree-optimization/45241 */ /* { dg-do compile } */ -/* { dg-options "-ftree-vectorize" } */ +/* { dg-additional-options "-ftree-vectorize" } */ int foo (short x) diff --git a/gcc/testsuite/gcc.dg/vect/pr18308.c b/gcc/testsuite/gcc.dg/vect/pr18308.c index b71f08e..51bcc83 100644 --- a/gcc/testsuite/gcc.dg/vect/pr18308.c +++ b/gcc/testsuite/gcc.dg/vect/pr18308.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -ftree-vectorize -funroll-loops" } */ +/* { dg-additional-options "-O -ftree-vectorize -funroll-loops" } */ void foo(); void bar(int j) diff --git a/gcc/testsuite/gcc.dg/vect/pr24049.c b/gcc/testsuite/gcc.dg/vect/pr24049.c index a7798bd..dd3e94c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr24049.c +++ b/gcc/testsuite/gcc.dg/vect/pr24049.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */ +/* { dg-additional-options "-O1 -ftree-vectorize --param ggc-min-heapsize=0 --param ggc-min-expand=0" } */ void unscrunch (unsigned char *, int *); diff --git a/gcc/testsuite/gcc.dg/vect/pr33373.c b/gcc/testsuite/gcc.dg/vect/pr33373.c index efba2ab..7ab6223 100644 --- a/gcc/testsuite/gcc.dg/vect/pr33373.c +++ b/gcc/testsuite/gcc.dg/vect/pr33373.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-do compile } */ void DOSMEM_FillIsrTable(int*isr) { int i; diff --git a/gcc/testsuite/gcc.dg/vect/pr36228.c b/gcc/testsuite/gcc.dg/vect/pr36228.c index 5f17739..710cf95 100644 --- a/gcc/testsuite/gcc.dg/vect/pr36228.c +++ b/gcc/testsuite/gcc.dg/vect/pr36228.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -fdump-tree-vect-details" } */ +/* { dg-additional-options "-O3 -fdump-tree-vect-details" } */ #define COLS 8 #define ROWS 8 diff --git a/gcc/testsuite/gcc.dg/vect/pr42395.c b/gcc/testsuite/gcc.dg/vect/pr42395.c index 7d0b832..540473b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr42395.c +++ b/gcc/testsuite/gcc.dg/vect/pr42395.c @@ -1,6 +1,6 @@ /* PR debug/42395 */ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize -g" } */ +/* { dg-additional-options "-O3 -ftree-vectorize -g" } */ void foo(int j, int *A) { diff --git a/gcc/testsuite/gcc.dg/vect/pr42604.c b/gcc/testsuite/gcc.dg/vect/pr42604.c index 4e05c23..1619f24 100644 --- a/gcc/testsuite/gcc.dg/vect/pr42604.c +++ b/gcc/testsuite/gcc.dg/vect/pr42604.c @@ -1,6 +1,6 @@ /* PR debug/42604 */ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize -g -ffast-math" } */ +/* { dg-additional-options "-O3 -ftree-vectorize -g -ffast-math" } */ unsigned *d; unsigned short e; diff --git a/gcc/testsuite/gcc.dg/vect/pr46663.c b/gcc/testsuite/gcc.dg/vect/pr46663.c index 15f15a5..b42e114 100644 --- a/gcc/testsuite/gcc.dg/vect/pr46663.c +++ b/gcc/testsuite/gcc.dg/vect/pr46663.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */ +/* { dg-additional-options "-O -ftree-vectorize -fdump-tree-vect-details -fexceptions" } */ typedef __attribute__ ((const)) int (*bart) (void); diff --git a/gcc/testsuite/gcc.dg/vect/pr48765.c b/gcc/testsuite/gcc.dg/vect/pr48765.c index 978dc25..ae36437 100644 --- a/gcc/testsuite/gcc.dg/vect/pr48765.c +++ b/gcc/testsuite/gcc.dg/vect/pr48765.c @@ -1,6 +1,6 @@ /* { dg-do compile { target { powerpc*-*-* } } } */ /* { dg-skip-if "do not override -mcpu" { *-*-* } { "-mcpu=*" } { "-mcpu=power6" } } */ -/* { dg-options "-O3 -mcpu=power6" } */ +/* { dg-additional-options "-O3 -mcpu=power6" } */ enum reg_class { diff --git a/gcc/testsuite/gcc.dg/vect/pr49093.c b/gcc/testsuite/gcc.dg/vect/pr49093.c index 5a29506..9b3b7f4 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49093.c +++ b/gcc/testsuite/gcc.dg/vect/pr49093.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fdump-tree-vect-details -fno-tree-fre" } */ volatile unsigned char g_324[4] = {0, 1, 0, 1}; void foo (int); diff --git a/gcc/testsuite/gcc.dg/vect/pr49352.c b/gcc/testsuite/gcc.dg/vect/pr49352.c index d8e0bae..0d3fc9c 100644 --- a/gcc/testsuite/gcc.dg/vect/pr49352.c +++ b/gcc/testsuite/gcc.dg/vect/pr49352.c @@ -1,6 +1,6 @@ /* PR tree-optimization/49352 */ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fcompare-debug" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -fcompare-debug" } */ /* { dg-xfail-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ int diff --git a/gcc/testsuite/gcc.dg/vect/pr52298.c b/gcc/testsuite/gcc.dg/vect/pr52298.c index 453d7c8..4aa5c0d 100644 --- a/gcc/testsuite/gcc.dg/vect/pr52298.c +++ b/gcc/testsuite/gcc.dg/vect/pr52298.c @@ -1,4 +1,4 @@ -/* { dg-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */ +/* { dg-additional-options "-O1 -ftree-vectorize -fno-tree-pre -fno-tree-loop-im" } */ extern void abort (void); int c[80]; diff --git a/gcc/testsuite/gcc.dg/vect/pr52870.c b/gcc/testsuite/gcc.dg/vect/pr52870.c index 7b185ee..b89856a 100644 --- a/gcc/testsuite/gcc.dg/vect/pr52870.c +++ b/gcc/testsuite/gcc.dg/vect/pr52870.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O1 -ftree-vectorize" } */ +/* { dg-additional-options "-O1 -ftree-vectorize" } */ void foo (unsigned long int); diff --git a/gcc/testsuite/gcc.dg/vect/pr53185.c b/gcc/testsuite/gcc.dg/vect/pr53185.c index af1efba..adf208b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr53185.c +++ b/gcc/testsuite/gcc.dg/vect/pr53185.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O3 -ftree-vectorize" } */ +/* { dg-additional-options "-O3 -ftree-vectorize" } */ unsigned short a, e; int *b, *d; int c; diff --git a/gcc/testsuite/gcc.dg/vect/pr53773.c b/gcc/testsuite/gcc.dg/vect/pr53773.c index 2be76d7..1bee98b 100644 --- a/gcc/testsuite/gcc.dg/vect/pr53773.c +++ b/gcc/testsuite/gcc.dg/vect/pr53773.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-fdump-tree-optimized" } */ +/* { dg-additional-options "-fdump-tree-optimized" } */ int foo (int integral, int decimal, int power_ten) diff --git a/gcc/testsuite/gcc.dg/vect/pr56695.c b/gcc/testsuite/gcc.dg/vect/pr56695.c index ee3d829..2fbe754 100644 --- a/gcc/testsuite/gcc.dg/vect/pr56695.c +++ b/gcc/testsuite/gcc.dg/vect/pr56695.c @@ -1,6 +1,6 @@ /* PR tree-optimization/56695 */ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize" } */ +/* { dg-additional-options "-O2 -ftree-vectorize" } */ int a, b, i; diff --git a/gcc/testsuite/gcc.dg/vect/pr62171.c b/gcc/testsuite/gcc.dg/vect/pr62171.c index 18517b3..bada4db 100644 --- a/gcc/testsuite/gcc.dg/vect/pr62171.c +++ b/gcc/testsuite/gcc.dg/vect/pr62171.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -fdump-tree-vect-details" } */ /* { dg-require-effective-target vect_double } */ struct omp_data_i diff --git a/gcc/testsuite/gcc.dg/vect/pr63530.c b/gcc/testsuite/gcc.dg/vect/pr63530.c index b583b9b..919b355 100644 --- a/gcc/testsuite/gcc.dg/vect/pr63530.c +++ b/gcc/testsuite/gcc.dg/vect/pr63530.c @@ -1,4 +1,4 @@ -/* { dg-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -funroll-loops --param \"max-completely-peeled-insns=400\"" } */ /* PR tree-optimization/63530 */ /* On armv7 hardware, following options cause run time failure */ diff --git a/gcc/testsuite/gcc.dg/vect/pr68339.c b/gcc/testsuite/gcc.dg/vect/pr68339.c index ab0eede..28fa294 100644 --- a/gcc/testsuite/gcc.dg/vect/pr68339.c +++ b/gcc/testsuite/gcc.dg/vect/pr68339.c @@ -1,6 +1,6 @@ /* PR middle-end/68339 */ /* { dg-do compile } */ -/* { dg-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */ +/* { dg-additional-options "--param ggc-min-heapsize=0 --param ggc-min-expand=0 -fopenmp-simd" } */ #pragma omp declare simd notinbranch int diff --git a/gcc/testsuite/gcc.dg/vect/pr70021.c b/gcc/testsuite/gcc.dg/vect/pr70021.c index b147fa1..988fc53 100644 --- a/gcc/testsuite/gcc.dg/vect/pr70021.c +++ b/gcc/testsuite/gcc.dg/vect/pr70021.c @@ -1,5 +1,4 @@ /* PR target/70021 */ -/* { dg-do run } */ #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/pr70138-1.c b/gcc/testsuite/gcc.dg/vect/pr70138-1.c index bd4d006..e391e76 100644 --- a/gcc/testsuite/gcc.dg/vect/pr70138-1.c +++ b/gcc/testsuite/gcc.dg/vect/pr70138-1.c @@ -1,5 +1,3 @@ -/* { dg-do run } */ - #include "tree-vect.h" double u[33 * 33]; diff --git a/gcc/testsuite/gcc.dg/vect/pr70138-2.c b/gcc/testsuite/gcc.dg/vect/pr70138-2.c index b1f9737..01c5dd8 100644 --- a/gcc/testsuite/gcc.dg/vect/pr70138-2.c +++ b/gcc/testsuite/gcc.dg/vect/pr70138-2.c @@ -1,5 +1,3 @@ -/* { dg-do run } */ - #include "tree-vect.h" double u[33]; diff --git a/gcc/testsuite/gcc.dg/vect/pr70354-1.c b/gcc/testsuite/gcc.dg/vect/pr70354-1.c index 70de811..9d601dc 100644 --- a/gcc/testsuite/gcc.dg/vect/pr70354-1.c +++ b/gcc/testsuite/gcc.dg/vect/pr70354-1.c @@ -1,5 +1,4 @@ /* PR tree-optimization/70354 */ -/* { dg-do run } */ #ifndef main #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/pr70354-2.c b/gcc/testsuite/gcc.dg/vect/pr70354-2.c index 356a115..160e1e0 100644 --- a/gcc/testsuite/gcc.dg/vect/pr70354-2.c +++ b/gcc/testsuite/gcc.dg/vect/pr70354-2.c @@ -1,5 +1,4 @@ /* PR tree-optimization/70354 */ -/* { dg-do run } */ #ifndef main #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/pr71259.c b/gcc/testsuite/gcc.dg/vect/pr71259.c index eefa243..587a8e3 100644 --- a/gcc/testsuite/gcc.dg/vect/pr71259.c +++ b/gcc/testsuite/gcc.dg/vect/pr71259.c @@ -1,6 +1,5 @@ /* PR tree-optimization/71259 */ -/* { dg-do run } */ -/* { dg-options "-O3" } */ +/* { dg-additional-options "-O3" } */ /* { dg-additional-options "-mavx" { target avx_runtime } } */ #include "tree-vect.h" diff --git a/gcc/testsuite/gcc.dg/vect/vect-82_64.c b/gcc/testsuite/gcc.dg/vect/vect-82_64.c index fc7434a..e5bb509 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-82_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-82_64.c @@ -1,6 +1,6 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ -/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/vect-83_64.c b/gcc/testsuite/gcc.dg/vect/vect-83_64.c index 03f9f7b..39fd998 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-83_64.c +++ b/gcc/testsuite/gcc.dg/vect/vect-83_64.c @@ -1,6 +1,6 @@ /* { dg-do run { target { { powerpc*-*-* && lp64 } && powerpc_altivec_ok } } } */ /* { dg-do compile { target { { powerpc*-*-* && ilp32 } && powerpc_altivec_ok } } } */ -/* { dg-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ +/* { dg-additional-options "-O2 -ftree-vectorize -mpowerpc64 -fdump-tree-vect-details -maltivec" } */ /* { dg-skip-if "" { powerpc-ibm-aix* } { "*" } { "" } } */ #include <stdarg.h> diff --git a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c index a2d36d3..4429348 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c +++ b/gcc/testsuite/gcc.dg/vect/vect-debug-pr41926.c @@ -1,6 +1,6 @@ /* PR debug/41926 */ /* { dg-do compile } */ -/* { dg-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */ +/* { dg-additional-options "-O2 -g -ffast-math -funroll-loops -ftree-vectorize -msse2" { target { i?86-*-* x86_64-*-* } } } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ void diff --git a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c index 2bd21a4..cc1349e 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-fold-1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-fold-1.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -fdump-tree-ccp1" } */ +/* { dg-additional-options "-O2 -fdump-tree-ccp1" } */ typedef unsigned char v4qi __attribute__ ((vector_size (4))); diff --git a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c index 456866d..ec36915 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-1.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ /* { dg-additional-options "-msse2 -fdump-tree-cunroll-details" { target { i?86-*-* x86_64-*-* } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c index cf1c1ef..bfc7c3b 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c +++ b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-2.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ /* { dg-additional-options "-msse2 -fdump-tree-cunroll-details" { target { i?86-*-* x86_64-*-* } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c index d8fe307..8bb3a0b 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c +++ b/gcc/testsuite/gcc.dg/vect/vect-nb-iter-ub-3.c @@ -1,4 +1,3 @@ -/* { dg-do run } */ /* { dg-require-effective-target sse2 { target { i?86-*-* x86_64-*-* } } } */ /* { dg-additional-options "-msse2 -fdump-tree-cunroll-details" { target { i?86-*-* x86_64-*-* } } } */ diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c index 85ff0e0..682b319 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c +++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2-big-array.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-require-effective-target vect_shift } */ /* { dg-require-effective-target vect_int } */ /* Check the standard integer types for left and right shifts to see if the diff --git a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c index 6199cd6..ba8e7c1 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-shift-2.c +++ b/gcc/testsuite/gcc.dg/vect/vect-shift-2.c @@ -1,4 +1,4 @@ -/* { dg-options "-Wno-shift-overflow" } */ +/* { dg-additional-options "-Wno-shift-overflow" } */ /* { dg-require-effective-target vect_shift } */ /* { dg-require-effective-target vect_int } */ /* Check the standard integer types for left and right shifts to see if the diff --git a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c index 6c2ff49..bd243f8 100644 --- a/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c +++ b/gcc/testsuite/gcc.dg/vect/vect-singleton_1.c @@ -1,7 +1,7 @@ /* PR target/59843 ICE on function taking/returning vector of one float64_t. */ /* { dg-do compile } */ -/* { dg-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ +/* { dg-additional-options "-Warray-bounds -O2 -fno-inline -std=c99" } */ #define TEST(BASETYPE, VECTYPE, SUFFIX) \ typedef BASETYPE VECTYPE \ ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-15 8:45 ` Christophe Lyon @ 2016-06-21 13:10 ` Christophe Lyon 2016-06-21 13:13 ` Jakub Jelinek 0 siblings, 1 reply; 26+ messages in thread From: Christophe Lyon @ 2016-06-21 13:10 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On 15 June 2016 at 10:45, Christophe Lyon <christophe.lyon@linaro.org> wrote: > On 9 June 2016 at 14:46, Jakub Jelinek <jakub@redhat.com> wrote: >> On Thu, Jun 09, 2016 at 02:40:43PM +0200, Christophe Lyon wrote: >>> > Bet it depends if this happens before the signal(SIGILL, sig_ill_handler); >>> > call or after it. If before, then I guess you'd better rewrite the >>> > long long a = 0, b = 1; >>> > asm ("vorr %P0, %P1, %P2" >>> > : "=w" (a) >>> > : "0" (a), "w" (b)); >>> > if (a != 1) >>> >>> Of course you are right: it happens just before the call to signal, >>> to build the sig_ill_handler address in r1. >>> >>> So it's not even a problem with rewriting the asm. >> >> Ugh, so the added options don't affect just vectorized code, but normal >> integer only code? >> check_vect is fragile, there is always a risk that some instruction is >> scheduled before the call. > > Yes, here it's an instruction used to build a parameter of the call. > >> If you have working target attribute support, I think you should compile >> check_vect with attribute set to some lowest common denominator that every >> ARM CPU supports (if there is any, that is). Though most likely you'll need >> to tweak the inline asm, because maybe "w" constraint won't be available >> then. > > ARM does not support attribute/pragma cpu :( > > Here is a new patch version, which removes the hardcoded dg-do run directives, > so that tests use compile or run depending on the result of > check_vect_support_and_set_flags. > > On ARM, this first uses arm_neon_ok to detect the required flags, then > depending on > arm_neon_hw, it decides whether to dg-do run or compile. > > OK? ping? > > Christophe > >> Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-21 13:10 ` Christophe Lyon @ 2016-06-21 13:13 ` Jakub Jelinek 2016-06-21 13:46 ` Christophe Lyon 0 siblings, 1 reply; 26+ messages in thread From: Jakub Jelinek @ 2016-06-21 13:13 UTC (permalink / raw) To: Christophe Lyon; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On Tue, Jun 21, 2016 at 03:10:33PM +0200, Christophe Lyon wrote: > > Here is a new patch version, which removes the hardcoded dg-do run directives, > > so that tests use compile or run depending on the result of > > check_vect_support_and_set_flags. > > > > On ARM, this first uses arm_neon_ok to detect the required flags, then > > depending on > > arm_neon_hw, it decides whether to dg-do run or compile. > > > > OK? > > ping? I'm not convinced we want to do this, even if the hw doesn't support it, the dg-do run tests are tested for not just compilation, but also assembly and linking; IMHO much better is to really fix up check_vect so that it works on ARM as it does everywhere else, even if it just means rewriting parts of it in inline asm. Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
* Re: [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) 2016-06-21 13:13 ` Jakub Jelinek @ 2016-06-21 13:46 ` Christophe Lyon 0 siblings, 0 replies; 26+ messages in thread From: Christophe Lyon @ 2016-06-21 13:46 UTC (permalink / raw) To: Jakub Jelinek; +Cc: Richard Biener, Ilya Enkovich, gcc-patches On 21 June 2016 at 15:13, Jakub Jelinek <jakub@redhat.com> wrote: > On Tue, Jun 21, 2016 at 03:10:33PM +0200, Christophe Lyon wrote: >> > Here is a new patch version, which removes the hardcoded dg-do run directives, >> > so that tests use compile or run depending on the result of >> > check_vect_support_and_set_flags. >> > >> > On ARM, this first uses arm_neon_ok to detect the required flags, then >> > depending on >> > arm_neon_hw, it decides whether to dg-do run or compile. >> > >> > OK? >> >> ping? > > I'm not convinced we want to do this, even if the hw doesn't support it, the > dg-do run tests are tested for not just compilation, but also assembly and > linking; IMHO much better is to really fix up > check_vect so that it works on ARM as it does everywhere else, even if it > just means rewriting parts of it in inline asm. > I'm not sure to follow: many other targets use dg-do compile if some "hw" support is not present (see check_vect_support_and_set_flags for powerpc, sparc, alpha, x86). Do you mean that on these targets, we want to run the tests, even if the hw does not support the required features and that removing dg-do run will result is less coverage on these targets? What about defaulting to 'assemble' instead of 'compile' ? > Jakub ^ permalink raw reply [flat|nested] 26+ messages in thread
end of thread, other threads:[~2016-06-21 13:46 UTC | newest] Thread overview: 26+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-01-11 17:13 [PATCH] Fix up my recent change to vect_get_constant_vectors (PR tree-optimization/69207) Jakub Jelinek 2016-01-12 14:21 ` Ilya Enkovich 2016-06-03 17:33 ` [PATCH] Fix SLP wrong-code with VECTOR_BOOLEAN_TYPE_P (PR tree-optimization/71259) Jakub Jelinek 2016-06-06 8:06 ` Richard Biener 2016-06-06 17:44 ` Jakub Jelinek 2016-06-07 7:13 ` Richard Biener 2016-06-07 9:23 ` Christophe Lyon 2016-06-07 9:28 ` Jakub Jelinek 2016-06-07 9:36 ` Ramana Radhakrishnan 2016-06-07 9:42 ` Jakub Jelinek 2016-06-07 12:43 ` Christophe Lyon 2016-06-07 12:47 ` Jakub Jelinek 2016-06-08 9:28 ` Christophe Lyon 2016-06-08 10:26 ` Richard Biener 2016-06-08 10:32 ` Jakub Jelinek 2016-06-08 10:33 ` Richard Biener 2016-06-08 14:44 ` Christophe Lyon 2016-06-08 14:50 ` Jakub Jelinek 2016-06-09 12:18 ` Christophe Lyon 2016-06-09 12:31 ` Jakub Jelinek 2016-06-09 12:40 ` Christophe Lyon 2016-06-09 12:46 ` Jakub Jelinek 2016-06-15 8:45 ` Christophe Lyon 2016-06-21 13:10 ` Christophe Lyon 2016-06-21 13:13 ` Jakub Jelinek 2016-06-21 13:46 ` Christophe Lyon
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