From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 126440 invoked by alias); 12 Jan 2016 11:57:48 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 126428 invoked by uid 89); 12 Jan 2016 11:57:48 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy=mask_name, __m256i, v8df, sk:278dd38 X-HELO: mail-io0-f179.google.com Received: from mail-io0-f179.google.com (HELO mail-io0-f179.google.com) (209.85.223.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 12 Jan 2016 11:57:45 +0000 Received: by mail-io0-f179.google.com with SMTP id 77so349638249ioc.2 for ; Tue, 12 Jan 2016 03:57:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:date:to:cc:subject:message-id:mime-version :content-type:content-disposition:user-agent; bh=0qdcL/Z6Y+uHUpJI6Fbb6YEkLBtscIZz1GFzmk4HARM=; b=VGXp9iFlrj6+BXWQzAtW/EOdRa6BGmP4vSxf2sGpsMIQfwxJAcUiOc9qeQcm/RHENO 7CIugnuYVCQc1duMdzGadRlez+oBVrEjpZ8gZHzOuBcKJ0xuFQ2AMV29K7IN7iCxgE/3 YEMOBezHUqumaC+IfnNM6qVQ6uIjY3Vt3M84VCHi2MFAFGGnL6hm9aJqbBtZi+tAs9Hp Sdq1BQJ3ZuAungoUUhKI/183Ds+xPSn9btHk/dQZhsUS3xtsvMLGfn2faZ9TFNxFDcDq Jt+Ym3ZLgTMbSpnCuH+bMsCcsWeipW+Jdy06w3kZNuELmxacdEPV/Kg++Ueca333Ger0 /ywQ== X-Gm-Message-State: ALoCoQkn4pJCNUMLyHXPS0Bk0OMWCy/GJpJXl+P1HSq7dW5zFyB9M7+n26hpLT4I2YBYlSqsulyILHQgtpU1CrXoJlko1SsAcw== X-Received: by 10.107.43.138 with SMTP id r132mr132141131ior.7.1452599863527; Tue, 12 Jan 2016 03:57:43 -0800 (PST) Received: from msticlxl57.ims.intel.com ([192.198.151.45]) by smtp.gmail.com with ESMTPSA id s15sm11578788ioi.9.2016.01.12.03.57.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 12 Jan 2016 03:57:42 -0800 (PST) From: Alexander Fomin X-Google-Original-From: Alexander Fomin Date: Tue, 12 Jan 2016 11:57:00 -0000 To: kirill.yukhin@gmail.com Cc: gcc-patches@gcc.gnu.org Subject: [PATCH, i386, AVX512] PR target/69228: Restrict default masks for prefetch gathers/scatters instructions. Message-ID: <20160112115706.GA63858@msticlxl57.ims.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes X-SW-Source: 2016-01/txt/msg00697.txt.bz2 This patch addresses PR target/69228. Expanding non-mask builtins for prefetch gather/scatter insns results in using default mask. Although Intel ISA Extensions Programming Reference statement about EVEX.aaa field in prefetch gather/scatter insns encoding is a bit opaque, no default mask is allowed for that family. Bootstrapped and regtested on x86_64-linux-gnu. OK for trunk? Thanks, Alexander --- gcc/ PR target/69228 * config/i386/sse.md (define_expand "avx512pf_gatherpfsf"): Change first operand predicate from register_or_constm1_operand to register_operand. (define_expand "avx512pf_gatherpfdf"): Likewise. (define_expand "avx512pf_scatterpfsf"): Likewise. (define_expand "avx512pf_scatterpfdf"): Likewise. (define_insn "*avx512pf_gatherpfsf"): Remove. (define_insn "*avx512pf_gatherpfdf"): Likewise. (define_insn "*avx512pf_scatterpfsf"): Likewise. (define_insn "*avx512pf_scatterpfdf"): Likewise. * config/i386/i386.c (ix86_expand_builtin): Remove first operand comparison with constm1_rtx from vec_prefetch_gen part. gcc/testsuite PR target/69228 * gcc.target/i386/avx512pf-vscatterpf0dpd-1.c: Adjust. * gcc.target/i386/avx512pf-vscatterpf0dps-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf0qpd-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf0qps-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1dpd-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1dps-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1qpd-1.c: Likewise. * gcc.target/i386/avx512pf-vscatterpf1qps-1.c: Likewise. --- gcc/config/i386/i386.c | 5 +- gcc/config/i386/sse.md | 120 +-------------------- .../gcc.target/i386/avx512pf-vscatterpf0dpd-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf0dps-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf0qpd-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf0qps-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf1dpd-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf1dps-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf1qpd-1.c | 3 +- .../gcc.target/i386/avx512pf-vscatterpf1qps-1.c | 3 +- 10 files changed, 14 insertions(+), 135 deletions(-) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index aac0847..c37eb74 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -41821,13 +41821,12 @@ rdseed_step: op0 = fixup_modeless_constant (op0, mode0); - if (GET_MODE (op0) == mode0 - || (GET_MODE (op0) == VOIDmode && op0 != constm1_rtx)) + if (GET_MODE (op0) == mode0 || GET_MODE (op0) == VOIDmode) { if (!insn_data[icode].operand[0].predicate (op0, mode0)) op0 = copy_to_mode_reg (mode0, op0); } - else if (op0 != constm1_rtx) + else { op0 = copy_to_reg (op0); op0 = simplify_gen_subreg (mode0, op0, GET_MODE (op0), 0); diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 278dd38..b96be36 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -15674,7 +15674,7 @@ (define_expand "avx512pf_gatherpfsf" [(unspec - [(match_operand: 0 "register_or_constm1_operand") + [(match_operand: 0 "register_operand") (mem: (match_par_dup 5 [(match_operand 2 "vsib_address_operand") @@ -15716,37 +15716,10 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) -(define_insn "*avx512pf_gatherpfsf" - [(unspec - [(const_int -1) - (match_operator: 4 "vsib_mem_operator" - [(unspec:P - [(match_operand:P 1 "vsib_address_operand" "Tv") - (match_operand:VI48_512 0 "register_operand" "v") - (match_operand:SI 2 "const1248_operand" "n")] - UNSPEC_VSIBADDR)]) - (match_operand:SI 3 "const_2_to_3_operand" "n")] - UNSPEC_GATHER_PREFETCH)] - "TARGET_AVX512PF" -{ - switch (INTVAL (operands[3])) - { - case 3: - return "vgatherpf0ps\t{%4|%4}"; - case 2: - return "vgatherpf1ps\t{%4|%4}"; - default: - gcc_unreachable (); - } -} - [(set_attr "type" "sse") - (set_attr "prefix" "evex") - (set_attr "mode" "XI")]) - ;; Packed double variants (define_expand "avx512pf_gatherpfdf" [(unspec - [(match_operand: 0 "register_or_constm1_operand") + [(match_operand: 0 "register_operand") (mem:V8DF (match_par_dup 5 [(match_operand 2 "vsib_address_operand") @@ -15788,37 +15761,10 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) -(define_insn "*avx512pf_gatherpfdf" - [(unspec - [(const_int -1) - (match_operator:V8DF 4 "vsib_mem_operator" - [(unspec:P - [(match_operand:P 1 "vsib_address_operand" "Tv") - (match_operand:VI4_256_8_512 0 "register_operand" "v") - (match_operand:SI 2 "const1248_operand" "n")] - UNSPEC_VSIBADDR)]) - (match_operand:SI 3 "const_2_to_3_operand" "n")] - UNSPEC_GATHER_PREFETCH)] - "TARGET_AVX512PF" -{ - switch (INTVAL (operands[3])) - { - case 3: - return "vgatherpf0pd\t{%4|%4}"; - case 2: - return "vgatherpf1pd\t{%4|%4}"; - default: - gcc_unreachable (); - } -} - [(set_attr "type" "sse") - (set_attr "prefix" "evex") - (set_attr "mode" "XI")]) - ;; Packed float variants (define_expand "avx512pf_scatterpfsf" [(unspec - [(match_operand: 0 "register_or_constm1_operand") + [(match_operand: 0 "register_operand") (mem: (match_par_dup 5 [(match_operand 2 "vsib_address_operand") @@ -15862,39 +15808,10 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) -(define_insn "*avx512pf_scatterpfsf" - [(unspec - [(const_int -1) - (match_operator: 4 "vsib_mem_operator" - [(unspec:P - [(match_operand:P 1 "vsib_address_operand" "Tv") - (match_operand:VI48_512 0 "register_operand" "v") - (match_operand:SI 2 "const1248_operand" "n")] - UNSPEC_VSIBADDR)]) - (match_operand:SI 3 "const2367_operand" "n")] - UNSPEC_SCATTER_PREFETCH)] - "TARGET_AVX512PF" -{ - switch (INTVAL (operands[3])) - { - case 3: - case 7: - return "vscatterpf0ps\t{%4|%4}"; - case 2: - case 6: - return "vscatterpf1ps\t{%4|%4}"; - default: - gcc_unreachable (); - } -} - [(set_attr "type" "sse") - (set_attr "prefix" "evex") - (set_attr "mode" "XI")]) - ;; Packed double variants (define_expand "avx512pf_scatterpfdf" [(unspec - [(match_operand: 0 "register_or_constm1_operand") + [(match_operand: 0 "register_operand") (mem:V8DF (match_par_dup 5 [(match_operand 2 "vsib_address_operand") @@ -15938,35 +15855,6 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) -(define_insn "*avx512pf_scatterpfdf" - [(unspec - [(const_int -1) - (match_operator:V8DF 4 "vsib_mem_operator" - [(unspec:P - [(match_operand:P 1 "vsib_address_operand" "Tv") - (match_operand:VI4_256_8_512 0 "register_operand" "v") - (match_operand:SI 2 "const1248_operand" "n")] - UNSPEC_VSIBADDR)]) - (match_operand:SI 3 "const2367_operand" "n")] - UNSPEC_SCATTER_PREFETCH)] - "TARGET_AVX512PF" -{ - switch (INTVAL (operands[3])) - { - case 3: - case 7: - return "vscatterpf0pd\t{%4|%4}"; - case 2: - case 6: - return "vscatterpf1pd\t{%4|%4}"; - default: - gcc_unreachable (); - } -} - [(set_attr "type" "sse") - (set_attr "prefix" "evex") - (set_attr "mode" "XI")]) - (define_insn "avx512er_exp2" [(set (match_operand:VF_512 0 "register_operand" "=v") (unspec:VF_512 diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c index ace50de..5a153ea 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dpd-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf0dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include volatile __m256i idx; diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c index d648b2ee9..d1173a2 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0dps-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf0dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c index d32345c..67529e7 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qpd-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf0qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c index 44c908f..9ff580f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf0qps-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf0qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c index ff38338..73a029d 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dpd-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf1dpd\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c index 8ec3388..439bc853 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1dps-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf1dps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c index 2c4eb2a..3ae16cd 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qpd-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf1qpd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c index 34bcb65..35cd7d3 100644 --- a/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512pf-vscatterpf1qps-1.c @@ -1,7 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512pf -O2" } */ -/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vscatterpf1qps\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\]*\\)\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 2 } } */ #include -- 1.9.3