Re: [PATCH 2/4 v2][AArch64] Add support for FCCMP

[James Greenhalgh <james.greenhalgh@arm.com>]

On Thu, Jan 21, 2016 at 01:58:31PM -0600, Evandro Menezes wrote:
> Hi, James.
> 
> On 01/21/16 03:24, James Greenhalgh wrote:
> >On Wed, Jan 06, 2016 at 02:44:47PM -0600, Evandro Menezes wrote:
> >>On 01/06/2016 06:04 AM, Wilco Dijkstra wrote:
> >>>>Here's what I had in mind when I inquired about distinguishing FCMP from
> >>>>FCCMP.  As you can see in the patch, Exynos is the only target that
> >>>>cares about it, but I wonder if ThunderX or Xgene would too.
> >>>>
> >>>>What do you think?
> >>>The new attributes look fine (I've got a similar outstanding change), however
> >>>please don't add them to non-AArch64 cores. We only need it for thunderx.md,
> >>>cortex-a53.md, cortex-a57.md, xgene1.md and exynos-m1.md.
> >>         Add support for the FCCMP insn types
> >>
> >>         2016-01-04  Evandro Menezes  <e.menezes@samsung.com>
> >>
> >>         gcc/
> >>             * config/aarch64/aarch64.md (fccmp): Change insn type.
> >>             (fccmpe): Likewise.
> >>             * config/aarch64/thunderx.md (thunderx_fcmp): Add
> >>    "fccmp{s,d}" types.
> >>             * config/arm/cortex-a53.md (cortex_a53_fpalu): Likewise.
> >>             * config/arm/cortex-a57.md (cortex_a57_fp_cmp): Likewise.
> >>             * config/arm/xgene1.md (xgene1_fcmp): Likewise.
> >>             * config/arm/exynos-m1.md (exynos_m1_fp_ccmp): New insn
> >>    reservation.
> >>             * config/arm/types.md (fccmps): Add new insn type.
> >>             (fccmpd): Likewise.
> >>
> >>Got it.  Here's an updated patch.  Again, assuming that your
> >>original patch is in place.  Perhaps you can build on it.
> >If we don't have any targets which care about the fccmps/fccmpd split in
> >the code base, do we really need it? Can we just follow the example of
> >fcsel?
> 
> The Exynos M1 does care about the difference between FCMP and FCCMP,
> as can be seen in the patch.

> More explicitly:
> 
>    (define_insn_reservation "exynos_m1_fp_cmp" 4
>       (and (eq_attr "tune" "exynosm1")
>            (eq_attr "type" "fcmps, fcmpd"))
>       "em1_nmisc")
> 
>    (define_insn_reservation "exynos_m1_fp_ccmp" 7
>       (and (eq_attr "tune" "exynosm1")
>            (eq_attr "type" "fccmps, fccmpd"))
>       "em1_st, em1_nmisc")
> 

I think I was unclear. Your exynos-m1 model cares about splitting fcmp[s/d]
and fccmp, but it doesn't care about splitting fccmp in to fccmps/fccmpd. It
is the split to fccmps/fccmpd that I think is unneccesary at this time.

> >>diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md
> >>index 321ff89..daf7162 100644
> >>--- a/gcc/config/arm/types.md
> >>+++ b/gcc/config/arm/types.md
> >>@@ -70,6 +70,7 @@
> >>  ; f_rint[d,s]        double/single floating point rount to integral.
> >>  ; f_store[d,s]       double/single store to memory.  Used for VFP unit.
> >>  ; fadd[d,s]          double/single floating-point scalar addition.
> >>+; fccmp[d,s]         double/single floating-point conditional compare.
> >Can we follow the convention fcsel uses of calling out "From ARMv8-A:"
> >for this type?
> >
> 
> I'm not sure I follow.  Though I didn't refer to the ISA spec, I
> used the description from it for the *fccmp* type.
> 
> Please, advise.

Something like:

; fccmp    From ARMv8-A: floating point conditional compare.

Just to capture that this instruction is only available for cores implementing
ARMv8-A.

Thanks,
James