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* [PATCH] Fix PR70509 (wrong code with extract from a v64qi)
@ 2016-04-04 21:17 Zdenek Sojka
  2016-04-05 17:03 ` Jakub Jelinek
  0 siblings, 1 reply; 2+ messages in thread
From: Zdenek Sojka @ 2016-04-04 21:17 UTC (permalink / raw)
  To: gcc-patches; +Cc: jakub, glisse

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Hello,

as discussed in the PR, when forwprop propagates VEC_PERM_EXPR through BIT_FIELD_REF in simplify_bitfield_ref(), the new BIT_FIELD_REF has the index of the same type as the vector base type. This patch changes the index to bitsize_int().

Bootstrapped on x86_64-pc-linux-gnu, regression test shows the same result as without the patch.

I've test both with/out the second patch mentioned in PR70509#c6 ; it was pre-approved by Jakub in the PR. I haven't managed to generate a testcase for it though.

I was unable to run the testcase via "make check" since my CPU doesn't support the avx512bw instruction set; however I have tested a standalone testcase in an emulator, before integrating it to the testsuite.

Please replace the changelog entries with a better ones if needed.

Thanks,
Zdenek

gcc/Changelog:

2016-04-04  Zdenek Sojka  

    PR tree-optimization/70509
    * tree-ssa-forwprop.c (simplify_bitfield_ref): Use bitsize_int () instead of the vector base type for index.


gcc/testsuite/Changelog:

2016-04-04  Zdenek Sojka  

    PR tree-optimization/70509
    * gcc.target/i386/avx512bw-pr70509.c: New.
=

[-- Attachment #2: pr70509.patch --]
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Index: gcc/tree-ssa-forwprop.c
===================================================================
--- gcc/tree-ssa-forwprop.c	(revision 234705)
+++ gcc/tree-ssa-forwprop.c	(working copy)
@@ -1773,7 +1773,7 @@
 
   if (code == VEC_PERM_EXPR)
     {
-      tree p, m, index, tem;
+      tree p, m, tem;
       unsigned nelts;
       m = gimple_assign_rhs3 (def_stmt);
       if (TREE_CODE (m) != VECTOR_CST)
@@ -1790,9 +1790,8 @@
 	  p = gimple_assign_rhs2 (def_stmt);
 	  idx -= nelts;
 	}
-      index = build_int_cst (TREE_TYPE (TREE_TYPE (m)), idx * size);
       tem = build3 (BIT_FIELD_REF, TREE_TYPE (op),
-		    unshare_expr (p), op1, index);
+		    unshare_expr (p), op1, bitsize_int (idx * size));
       gimple_assign_set_rhs1 (stmt, tem);
       fold_stmt (gsi);
       update_stmt (gsi_stmt (*gsi));
Index: gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c
===================================================================
--- gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c	(revision 0)
+++ gcc/testsuite/gcc.target/i386/avx512bw-pr70509.c	(working copy)
@@ -0,0 +1,26 @@
+/* PR tree-optimization/70509 */
+/* { dg-do run } */
+/* { dg-options "-O1 -mavx512bw" } */
+/* { dg-require-effective-target avx512bw } */
+
+#define AVX512BW
+#include "avx512f-helper.h"
+
+typedef char V __attribute__ ((vector_size (64)));
+
+int __attribute__ ((noinline, noclone))
+foo (V u, V v)
+{
+  u /= v[0x20];
+  return u[0];
+}
+
+void
+TEST (void)
+{
+  int x = foo ((V) { 9 }, (V) { 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+				2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+				3 });
+  if (x != 3)
+    abort ();
+}

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] Fix PR70509 (wrong code with extract from a v64qi)
  2016-04-04 21:17 [PATCH] Fix PR70509 (wrong code with extract from a v64qi) Zdenek Sojka
@ 2016-04-05 17:03 ` Jakub Jelinek
  0 siblings, 0 replies; 2+ messages in thread
From: Jakub Jelinek @ 2016-04-05 17:03 UTC (permalink / raw)
  To: Zdenek Sojka; +Cc: gcc-patches, jakub, glisse

On Mon, Apr 04, 2016 at 11:16:48PM +0200, Zdenek Sojka wrote:
> gcc/Changelog:
> 
> 2016-04-04  Zdenek Sojka  
> 
>     PR tree-optimization/70509
>     * tree-ssa-forwprop.c (simplify_bitfield_ref): Use bitsize_int () instead of the vector base type for index.
> 
> 
> gcc/testsuite/Changelog:
> 
> 2016-04-04  Zdenek Sojka  
> 
>     PR tree-optimization/70509
>     * gcc.target/i386/avx512bw-pr70509.c: New.

I've tested this on x86_64-linux and i686-linux (including running
the testcase under sde64 emulation), and committed to trunk.
This has been small enough, but if you plan to provide more fixes
(beyond your very much appreciated bugreporting), we'll need a copyright
assignment (unless you already have it).

I've also committed following patch Marc mentioned in the PR, as obvious
after bootstrap/regtest on x86_64-linux and i686-linux, haven't managed
to create a testcase that would be miscompiled though, so it is for now
just a theoretical fix.

2016-04-05  Marc Glisse  <marc.glisse@inria.fr>
	    Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/70509
	* simplify-rtx.c (simplify_binary_operation_1) <case VEC_SELECT>:
	Shift HOST_WIDE_INT_1U instead of 1.

--- gcc/simplify-rtx.c.jj	2016-03-03 18:21:02.000000000 +0100
+++ gcc/simplify-rtx.c	2016-04-05 16:29:44.502306175 +0200
@@ -3665,7 +3665,7 @@ simplify_binary_operation_1 (enum rtx_co
 	      for (int i = 0; i < XVECLEN (trueop1, 0); i++)
 		{
 		  rtx j = XVECEXP (trueop1, 0, i);
-		  if (sel & (1 << UINTVAL (j)))
+		  if (sel & (HOST_WIDE_INT_1U << UINTVAL (j)))
 		    all_operand1 = false;
 		  else
 		    all_operand0 = false;


	Jakub

^ permalink raw reply	[flat|nested] 2+ messages in thread

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