From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 34596 invoked by alias); 28 Apr 2016 14:28:47 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 31468 invoked by uid 89); 28 Apr 2016 14:28:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=BAYES_00,FREEMAIL_FROM,RCVD_IN_DNSWL_LOW,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-io0-f173.google.com Received: from mail-io0-f173.google.com (HELO mail-io0-f173.google.com) (209.85.223.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 28 Apr 2016 14:28:37 +0000 Received: by mail-io0-f173.google.com with SMTP id d62so78589532iof.2 for ; Thu, 28 Apr 2016 07:28:36 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=XFw1aG7cdlSueBS7iZhPTXVh9B0mozuWAxY6FIfYTtg=; b=Z0ShIq60K3rxn2EV0cn8UCF9XRkGlYurZn7v1zZVCcv7fKbd1d6g47cMQO3FAdFYnY iD4lxNq74Uki3G18gF/g6xGAN4g+tOYjPu+KLTs8ATrLnN208ZnUypGTRsDVedFNd1nj ZgFKVkN8h2o17XVtFDqGOCh5/4HIM/gif8xhcyT+e6wDLKp68Ns2iH/zZrK9vchdzBwq RhANfwViIsgRm+6FJoIoAty616eGhJMwE1kwiqXZCcUsOqDtgblLIMnDp56BEGc0Mr1s HP+oh6BdbwTDPRrTZDtd9Vzgl2TAhGf/o76EsXxS8XogmTWg/JpfV+FUnV8ewYuUs5Uf HJUw== X-Gm-Message-State: AOPr4FWxBWrcjPT3vOs3BxoVaKOCgwz8CNvnZoYjT8UHxNUblnReUwovfpSLK9fy7kZU1w== X-Received: by 10.107.15.15 with SMTP id x15mr18700417ioi.139.1461853714947; Thu, 28 Apr 2016 07:28:34 -0700 (PDT) Received: from msticlxl57.ims.intel.com (irdmzpr02-ext.ir.intel.com. [192.198.151.37]) by smtp.gmail.com with ESMTPSA id su5sm17442607igc.21.2016.04.28.07.28.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Apr 2016 07:28:34 -0700 (PDT) Date: Thu, 28 Apr 2016 14:28:00 -0000 From: Kirill Yukhin To: Jakub Jelinek Cc: Uros Bizjak , gcc-patches@gcc.gnu.org Subject: Re: [PATCH] Improve AVX512F sse4_1_round* patterns Message-ID: <20160428142738.GC31772@msticlxl57.ims.intel.com> References: <20160427213433.GI26501@tucnak.zalov.cz> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160427213433.GI26501@tucnak.zalov.cz> User-Agent: Mutt/1.5.23 (2014-03-12) X-IsSubscribed: yes X-SW-Source: 2016-04/txt/msg01842.txt.bz2 Hi Jakub, On 27 Apr 23:34, Jakub Jelinek wrote: > Hi! > > While AVX512F doesn't contain EVEX encoded vround{ss,sd,ps,pd} instructions, > it contains vrndscale* which performs the same thing if bits [4:7] of the > immediate are zero. > > For _mm*_round_{ps,pd} we actually already emit vrndscale* for -mavx512f > instead of vround* unconditionally (because > _rndscale > instruction has the same RTL as _round > and the former, enabled for TARGET_AVX512F, comes first), for the scalar > cases (thus __builtin_round* or _mm*_round_s{s,d}) the patterns we have > don't allow extended registers and thus we end up with unnecessary moves > if the inputs and/or outputs are or could be most effectively allocated > in the xmm16+ registers. > > Fixed thusly, bootstrapped/regtested on x86_64-linux and i686-linux, ok for > trunk? Your patch is OK. > > 2016-04-27 Jakub Jelinek > > * config/i386/i386.md (sse4_1_round2): Add avx512f alternative. > * config/i386/sse.md (sse4_1_round): Likewise. > > * gcc.target/i386/avx-vround-1.c: New test. > * gcc.target/i386/avx-vround-2.c: New test. > * gcc.target/i386/avx512vl-vround-1.c: New test. > * gcc.target/i386/avx512vl-vround-2.c: New test. -- Thanks, K