From: Andrew Burgess <andrew.burgess@embecosm.com>
To: Joern Wolfgang Rennecke <gnu@amylaar.uk>
Cc: gcc-patches@gcc.gnu.org, noamca@mellanox.com,
Claudiu.Zissulescu@synopsys.com
Subject: Re: [PATCHv2 2/7] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns
Date: Fri, 29 Apr 2016 11:59:00 -0000 [thread overview]
Message-ID: <20160429115836.GH1592@embecosm.com> (raw)
In-Reply-To: <57224322.3000704@amylaar.uk>
* Joern Wolfgang Rennecke <gnu@amylaar.uk> [2016-04-28 18:06:42 +0100]:
> On 21/04/16 12:39, Andrew Burgess wrote:
> >
> > * config/arc/arc.md (*loadqi_update): Replace use of 'rI'
> > constraint with separate 'r' and 'Cm2' constraints.
> >
> Why don't you use simply rCm2 ?
You are absolutely correct. Thank you for pointing this out.
The much simpler version of this patch is below.
Thanks,
Andrew
---
gcc/arc: Replace rI constraint with rCm2 for ld and update insns
In the load*_update instructions the constraint 'rI' was being used,
which would accept either a register or a signed 12 bit constant. The
problem is that the 32-bit form of ld with update only takes a signed
9-bit immediate. As such, some ld instructions could be generated that
would, when assembled be 64-bit long, however, GCC believed them to be
32-bit long. This error in the length would cause problems during
branch shortening.
The store*_update have the same restrictions on immediate size, however,
the patterns for these instructions already only accept 9-bit
immediates, and so should be safe.
gcc/ChangeLog:
* config/arc/arc.md (*loadqi_update): Replace use of 'rI'
constraint with 'rCm2' constraints to limit possible immediate
size.
(*load_zeroextendqisi_update): Likewise.
(*load_signextendqisi_update): Likewise.
(*loadhi_update): Likewise.
(*load_zeroextendhisi_update): Likewise.
(*load_signextendhisi_update): Likewise.
(*loadsi_update): Likewise.
(*loadsf_update): Likewise.
---
gcc/ChangeLog.NPS400 | 12 ++++++++++++
gcc/config/arc/arc.md | 16 ++++++++--------
2 files changed, 20 insertions(+), 8 deletions(-)
create mode 100644 gcc/ChangeLog.NPS400
diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
index d1a9159..c61107f 100644
--- a/gcc/config/arc/arc.md
+++ b/gcc/config/arc/arc.md
@@ -1254,7 +1254,7 @@
[(set (match_operand:QI 3 "dest_reg_operand" "=r,r")
(match_operator:QI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
(set (match_operand:SI 0 "dest_reg_operand" "=r,r")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1266,7 +1266,7 @@
[(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
(zero_extend:SI (match_operator:QI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
(set (match_operand:SI 0 "dest_reg_operand" "=r,r")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1278,7 +1278,7 @@
[(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
(sign_extend:SI (match_operator:QI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
(set (match_operand:SI 0 "dest_reg_operand" "=r,r")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1304,7 +1304,7 @@
[(set (match_operand:HI 3 "dest_reg_operand" "=r,r")
(match_operator:HI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
(set (match_operand:SI 0 "dest_reg_operand" "=w,w")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1316,7 +1316,7 @@
[(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
(zero_extend:SI (match_operator:HI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
(set (match_operand:SI 0 "dest_reg_operand" "=r,r")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1329,7 +1329,7 @@
[(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
(sign_extend:SI (match_operator:HI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))])))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))])))
(set (match_operand:SI 0 "dest_reg_operand" "=w,w")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1354,7 +1354,7 @@
[(set (match_operand:SI 3 "dest_reg_operand" "=r,r")
(match_operator:SI 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
(set (match_operand:SI 0 "dest_reg_operand" "=w,w")
(plus:SI (match_dup 1) (match_dup 2)))]
""
@@ -1378,7 +1378,7 @@
[(set (match_operand:SF 3 "dest_reg_operand" "=r,r")
(match_operator:SF 4 "any_mem_operand"
[(plus:SI (match_operand:SI 1 "register_operand" "0,0")
- (match_operand:SI 2 "nonmemory_operand" "rI,Cal"))]))
+ (match_operand:SI 2 "nonmemory_operand" "rCm2,Cal"))]))
(set (match_operand:SI 0 "dest_reg_operand" "=w,w")
(plus:SI (match_dup 1) (match_dup 2)))]
""
--
2.6.4
next prev parent reply other threads:[~2016-04-29 11:59 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-04 13:25 [PATCH 00/10] ARC: Add support for NPS400 variant Andrew Burgess
2016-03-04 13:25 ` [PATCH 01/10] gcc: Add support for mellanox nps400 arc variant Andrew Burgess
2016-03-04 13:26 ` [PATCH 02/10] gcc/arc: Add -munaligned-access option for nps400 Andrew Burgess
2016-03-04 13:26 ` [PATCH 10/10] gcc/arc: Add __NPS400__ define for nps400 targets Andrew Burgess
2016-03-04 13:26 ` [PATCH 07/10] gcc/arc: Add nps400 bitops support Andrew Burgess
2016-03-04 13:26 ` [PATCH 04/10] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns Andrew Burgess
2016-03-04 13:26 ` [PATCH 09/10] gcc/arc: Add an nps400 specific testcase Andrew Burgess
2016-03-04 13:26 ` [PATCH 03/10] gcc/arc: generate jump tables in code section for nps400 Andrew Burgess
2016-03-04 13:26 ` [PATCH 08/10] gcc/arc: Mask integer 'L' operands to 32-bit Andrew Burgess
2016-03-04 13:26 ` [PATCH 05/10] gcc/arc: convert some constraints to define_constraint Andrew Burgess
2016-03-04 13:26 ` [PATCH 06/10] gcc/arc: Add support for nps400 cmem xld/xst instructions Andrew Burgess
2016-04-21 11:39 ` [PATCHv2 3/7] gcc/arc: convert some constraints to define_constraint Andrew Burgess
2016-04-28 17:16 ` Joern Wolfgang Rennecke
2016-04-21 11:39 ` [PATCHv2 0/7] ARC: Add support for nps400 variant Andrew Burgess
2016-04-28 15:31 ` Joern Wolfgang Rennecke
2016-04-28 16:55 ` Joern Wolfgang Rennecke
2016-04-29 9:04 ` Claudiu Zissulescu
2016-04-29 10:22 ` Andrew Burgess
2016-04-29 22:17 ` Andrew Burgess
2016-05-02 9:02 ` Claudiu Zissulescu
2016-05-03 10:56 ` Andrew Burgess
2016-05-12 11:30 ` Claudiu Zissulescu
2016-06-14 18:46 ` Joern Wolfgang Rennecke
2016-06-14 23:38 ` [PATCH 0/2] Arc fixes and genrecog warning fix Andrew Burgess
2016-06-14 23:38 ` [PATCH 1/2] gcc/arc: New peephole2 and little endian arc test fixes Andrew Burgess
2016-06-14 23:38 ` [PATCH 2/2] gcc/genrecog: Don't warn for missing mode on special predicates Andrew Burgess
2016-06-15 18:08 ` Richard Sandiford
2016-06-30 13:38 ` Andrew Burgess
2016-07-04 8:47 ` Richard Sandiford
2016-07-06 19:43 ` Andrew Burgess
2016-07-13 22:19 ` Jeff Law
2016-11-16 11:44 ` [PATCHv2 0/7] ARC: Add support for nps400 variant Claudiu Zissulescu
2016-04-21 11:39 ` [PATCHv2 2/7] gcc/arc: Replace rI constraint with r & Cm2 for ld and update insns Andrew Burgess
2016-04-28 17:07 ` Joern Wolfgang Rennecke
2016-04-29 11:59 ` Andrew Burgess [this message]
2016-04-29 12:09 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 1/7] gcc/arc: Add support for nps400 cpu type Andrew Burgess
2016-04-28 17:07 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 6/7] gcc/arc: Mask integer 'L' operands to 32-bit Andrew Burgess
2016-04-28 19:09 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 4/7] gcc/arc: Add support for nps400 cmem xld/xst instructions Andrew Burgess
2016-04-28 18:23 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 7/7] gcc/arc: Add an nps400 specific testcase Andrew Burgess
2016-04-28 19:14 ` Joern Wolfgang Rennecke
2016-04-21 11:40 ` [PATCHv2 5/7] gcc/arc: Add nps400 bitops support Andrew Burgess
2016-04-28 18:50 ` Joern Wolfgang Rennecke
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