From: Jakub Jelinek <jakub@redhat.com>
To: Uros Bizjak <ubizjak@gmail.com>, Kirill Yukhin <kirill.yukhin@gmail.com>
Cc: gcc-patches@gcc.gnu.org
Subject: [PATCH] Improve sse2_loadld
Date: Mon, 09 May 2016 16:53:00 -0000 [thread overview]
Message-ID: <20160509165254.GI28550@tucnak.redhat.com> (raw)
Hi!
I hope this pattern actually shouldn't be used for AVX512*, because
vpinsr should match instead, but just in case it doesn't, all the insns
involved are in AVX512F.
Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
2016-05-09 Jakub Jelinek <jakub@redhat.com>
* config/i386/sse.md (sse2_loadld): Use v instead of x
constraint in alternatives 0,1,4.
--- gcc/config/i386/sse.md.jj 2016-05-09 14:15:50.000000000 +0200
+++ gcc/config/i386/sse.md 2016-05-09 15:08:36.034622080 +0200
@@ -13013,11 +13013,11 @@ (define_expand "sse2_loadd"
"operands[2] = CONST0_RTX (V4SImode);")
(define_insn "sse2_loadld"
- [(set (match_operand:V4SI 0 "register_operand" "=x,Yi,x,x,x")
+ [(set (match_operand:V4SI 0 "register_operand" "=v,Yi,x,x,v")
(vec_merge:V4SI
(vec_duplicate:V4SI
- (match_operand:SI 2 "nonimmediate_operand" "m ,r ,m,x,x"))
- (match_operand:V4SI 1 "reg_or_0_operand" "C ,C ,C,0,x")
+ (match_operand:SI 2 "nonimmediate_operand" "m ,r ,m,x,v"))
+ (match_operand:V4SI 1 "reg_or_0_operand" "C ,C ,C,0,v")
(const_int 1)))]
"TARGET_SSE"
"@
@@ -13028,7 +13028,7 @@ (define_insn "sse2_loadld"
vmovss\t{%2, %1, %0|%0, %1, %2}"
[(set_attr "isa" "sse2,sse2,noavx,noavx,avx")
(set_attr "type" "ssemov")
- (set_attr "prefix" "maybe_vex,maybe_vex,orig,orig,vex")
+ (set_attr "prefix" "maybe_vex,maybe_vex,orig,orig,maybe_evex")
(set_attr "mode" "TI,TI,V4SF,SF,SF")])
;; QI and HI modes handled by pextr patterns.
Jakub
next reply other threads:[~2016-05-09 16:53 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-09 16:53 Jakub Jelinek [this message]
2016-05-12 7:30 ` Kirill Yukhin
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