Re: [PATCH], Add PowerPC ISA 3.0 MTVSRDD support

Re: [PATCH], Add PowerPC ISA 3.0 MTVSRDD support

[Segher Boessenkool]

On Tue, May 31, 2016 at 07:49:55PM -0400, Michael Meissner wrote:
> This patch adds support to issue the MTVSRDD on 64-bit ISA 3.0 systems when the
> compiler has a 64-bit value in a GPR, and it wants to create a vector that has
> the 64-bit value in both sides of the 128-bit value.

>  ;; V2DF/V2DI splat
>  (define_insn "vsx_splat_<mode>"
> -  [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wd,wd,wd,?<VSa>,?<VSa>,?<VSa>")
> +  [(set (match_operand:VSX_D 0 "vsx_register_operand" "=<VSa>,<VSa>,we")
>  	(vec_duplicate:VSX_D
> -	 (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,f,Z,<VSa>,<VSa>,Z")))]
> +	 (match_operand:<VS_scalar> 1 "splat_input_operand" "<VS_64reg>,Z,r")))]
>    "VECTOR_MEM_VSX_P (<MODE>mode)"
>    "@
>     xxpermdi %x0,%x1,%x1,0
> -   xxpermdi %x0,%x1,%x1,0
>     lxvdsx %x0,%y1
> -   xxpermdi %x0,%x1,%x1,0
> -   xxpermdi %x0,%x1,%x1,0
> -   lxvdsx %x0,%y1"
> -  [(set_attr "type" "vecperm,vecperm,vecload,vecperm,vecperm,vecload")])
> +   mtvsrdd %x0,%1,%1"
> +  [(set_attr "type" "vecperm,vecload,mftgpr")])

It should use "b" instead of "r" for the mtvsrdd case.

Okay for trunk with that change, after retesting.  Okay for 6 later, too.

Thanks,


Segher