Re: [Patch AArch64 2/2] Some more cleanup of ldp/stp generation

[James Greenhalgh <james.greenhalgh@arm.com>]

*ping* https://gcc.gnu.org/ml/gcc-patches/2016-05/msg01192.html

Thanks,
James

On Tue, May 17, 2016 at 10:22:31AM +0100, James Greenhalgh wrote:
> 
> This is another refactoring patch to clean up more of the ldp/stp handling
> code and avoid duplicating quite as much code.
> 
> Much like the other refactoring patch, this reduces the use of reg_1, reg_2,
> etc. leading to a cleaner implementation.
> 
> Bootstrapped on AArch64 with no issues.
> 
> OK?
> 
> Thanks,
> James
> 
> ---
> 2016-05-17  James Greenhalgh  <james.greenhalgh@arm.com>
> 
> 	* config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Refactor.
> 

> diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
> index 434c154..01bbe81 100644
> --- a/gcc/config/aarch64/aarch64.c
> +++ b/gcc/config/aarch64/aarch64.c
> @@ -13549,26 +13549,18 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
>  			     enum machine_mode mode, RTX_CODE code)
>  {
>    rtx base, offset, t1, t2;
> -  rtx mem_1, mem_2, mem_3, mem_4;
> +  rtx mem[4];
>    HOST_WIDE_INT off_val, abs_off, adj_off, new_off, stp_off_limit, msize;
>  
> -  if (load)
> -    {
> -      mem_1 = operands[1];
> -      mem_2 = operands[3];
> -      mem_3 = operands[5];
> -      mem_4 = operands[7];
> -    }
> -  else
> -    {
> -      mem_1 = operands[0];
> -      mem_2 = operands[2];
> -      mem_3 = operands[4];
> -      mem_4 = operands[6];
> -      gcc_assert (code == UNKNOWN);
> -    }
> +  unsigned op_offset = load ? 1 : 0;
> +
> +  for (int i = 0; i < 4; i++)
> +    mem[i] = operands[(2 * i) + op_offset];
>  
> -  extract_base_offset_in_addr (mem_1, &base, &offset);
> +  if (!load)
> +    gcc_assert (code == UNKNOWN);
> +
> +  extract_base_offset_in_addr (mem[0], &base, &offset);
>    gcc_assert (base != NULL_RTX && offset != NULL_RTX);
>  
>    /* Adjust offset thus it can fit in ldp/stp instruction.  */
> @@ -13597,59 +13589,32 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load,
>      }
>  
>    /* Create new memory references.  */
> -  mem_1 = change_address (mem_1, VOIDmode,
> -			  plus_constant (DImode, operands[8], new_off));
> +  mem[0] = change_address (mem[0], VOIDmode,
> +			  plus_constant (Pmode, operands[8], new_off));
>  
>    /* Check if the adjusted address is OK for ldp/stp.  */
> -  if (!aarch64_mem_pair_operand (mem_1, mode))
> +  if (!aarch64_mem_pair_operand (mem[0], mode))
>      return false;
>  
>    msize = GET_MODE_SIZE (mode);
> -  mem_2 = change_address (mem_2, VOIDmode,
> -			  plus_constant (DImode,
> -					 operands[8],
> -					 new_off + msize));
> -  mem_3 = change_address (mem_3, VOIDmode,
> -			  plus_constant (DImode,
> -					 operands[8],
> -					 new_off + msize * 2));
> -  mem_4 = change_address (mem_4, VOIDmode,
> -			  plus_constant (DImode,
> -					 operands[8],
> -					 new_off + msize * 3));
> -
> -  if (code == ZERO_EXTEND)
> -    {
> -      mem_1 = gen_rtx_ZERO_EXTEND (DImode, mem_1);
> -      mem_2 = gen_rtx_ZERO_EXTEND (DImode, mem_2);
> -      mem_3 = gen_rtx_ZERO_EXTEND (DImode, mem_3);
> -      mem_4 = gen_rtx_ZERO_EXTEND (DImode, mem_4);
> -    }
> -  else if (code == SIGN_EXTEND)
> -    {
> -      mem_1 = gen_rtx_SIGN_EXTEND (DImode, mem_1);
> -      mem_2 = gen_rtx_SIGN_EXTEND (DImode, mem_2);
> -      mem_3 = gen_rtx_SIGN_EXTEND (DImode, mem_3);
> -      mem_4 = gen_rtx_SIGN_EXTEND (DImode, mem_4);
> -    }
>  
> -  if (load)
> -    {
> -      operands[1] = mem_1;
> -      operands[3] = mem_2;
> -      operands[5] = mem_3;
> -      operands[7] = mem_4;
> -    }
> -  else
> -    {
> -      operands[0] = mem_1;
> -      operands[2] = mem_2;
> -      operands[4] = mem_3;
> -      operands[6] = mem_4;
> -    }
> +  for (int i = 1; i < 4; i++)
> +    mem[i] = change_address (mem[i], VOIDmode,
> +			     plus_constant (Pmode,
> +					    operands[8],
> +					    new_off + (msize * i)));
> +
> +  for (int i = 0; i < 4; i++)
> +    if (code == ZERO_EXTEND)
> +      mem[i] = gen_rtx_ZERO_EXTEND (Pmode, mem[i]);
> +    else if (code == SIGN_EXTEND)
> +      mem[i] = gen_rtx_SIGN_EXTEND (Pmode, mem[i]);
> +
> +  for (int i = 0; i < 4; i++)
> +    operands[(2 * i) + op_offset] = mem[i];
>  
>    /* Emit adjusting instruction.  */
> -  emit_insn (gen_rtx_SET (operands[8], plus_constant (DImode, base, adj_off)));
> +  emit_insn (gen_rtx_SET (operands[8], plus_constant (Pmode, base, adj_off)));
>    /* Emit ldp/stp instructions.  */
>    t1 = gen_rtx_SET (operands[0], operands[1]);
>    t2 = gen_rtx_SET (operands[2], operands[3]);