From: James Greenhalgh <james.greenhalgh@arm.com>
To: Wilco Dijkstra <Wilco.Dijkstra@arm.com>
Cc: "gcc-patches@gcc.gnu.org" <gcc-patches@gcc.gnu.org>, nd <nd@arm.com>
Subject: Re: [PATCH][AArch64] Improve aarch64_modes_tieable_p
Date: Tue, 14 Jun 2016 13:48:00 -0000 [thread overview]
Message-ID: <20160614134732.GA22140@arm.com> (raw)
In-Reply-To: <AM3PR08MB0088A7DE850BC3BF6579AA4B836F0@AM3PR08MB0088.eurprd08.prod.outlook.com>
On Fri, Apr 22, 2016 at 01:22:51PM +0000, Wilco Dijkstra wrote:
> Improve modes_tieable by returning true in more cases: allow scalar access
> within vectors without requiring an extra move. Removing these moves helps
> the register allocator in deciding whether to use integer or FP registers on
> operations that can be done on both. This saves about 100 instructions in the
> gcc.target/aarch64 tests.
>
> A typical example:
>
> orr v1.8b, v0.8b, v1.8b
> fmov x0, d0
> fmov x1, d1
> add x0, x1, x0
> ins v0.d[0], x0
> orr v0.8b, v1.8b, v0.8b
>
> after:
>
> orr v1.8b, v0.8b, v1.8b
> add d0, d1, d0
> orr v0.8b, v1.8b, v0.8b
>
> OK for trunk?
OK.
Thanks,
James
>
> ChangeLog:
> 2016-04-22 Wilco Dijkstra <wdijkstr@arm.com>
>
> * gcc/config/aarch64/aarch64.c (aarch64_modes_tieable_p):
> Allow scalar/single vector modes to be tieable.
>
prev parent reply other threads:[~2016-06-14 13:48 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-22 13:23 Wilco Dijkstra
2016-04-27 14:48 ` James Greenhalgh
2016-05-17 16:08 ` Wilco Dijkstra
2016-06-02 16:20 ` Wilco Dijkstra
2016-06-14 13:48 ` James Greenhalgh [this message]
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