From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 129957 invoked by alias); 29 Sep 2016 16:21:20 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 129915 invoked by uid 89); 29 Sep 2016 16:21:20 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-4.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=10pm X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 29 Sep 2016 16:21:19 +0000 Received: from int-mx09.intmail.prod.int.phx2.redhat.com (int-mx09.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C88B33D94A; Thu, 29 Sep 2016 16:21:17 +0000 (UTC) Received: from redhat.com (ovpn-204-20.brq.redhat.com [10.40.204.20]) by int-mx09.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u8TGLDnl006172 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Thu, 29 Sep 2016 12:21:15 -0400 Date: Thu, 29 Sep 2016 17:17:00 -0000 From: Marek Polacek To: Jakub Jelinek Cc: Florian Weimer , GCC Patches , Richard Sandiford Subject: Re: PATCH to add more FALLTHRU markers Message-ID: <20160929162113.GU3223@redhat.com> References: <20160927164726.GG3223@redhat.com> <87bmz9xj7w.fsf@mid.deneb.enyo.de> <20160927191847.GJ3223@redhat.com> <874m51xhtl.fsf@mid.deneb.enyo.de> <20160927195820.GE7282@tucnak.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160927195820.GE7282@tucnak.redhat.com> User-Agent: Mutt/1.7.0 (2016-08-17) X-SW-Source: 2016-09/txt/msg02267.txt.bz2 On Tue, Sep 27, 2016 at 09:58:20PM +0200, Jakub Jelinek wrote: > On Tue, Sep 27, 2016 at 09:29:10PM +0200, Florian Weimer wrote: > > Not sure if I read this code correctly, but if we fall through from > > V32HImode, and we have TARGET_SSE2 set, we execute this code: > > > > tmp = "p"; > > ssesuffix = TARGET_AVX512VL ? "q" : ""; > > > > And not gcc_unreachable (), as is probably intended. > > It really doesn't matter. > The instruction uses > (define_mode_iterator VI12_AVX_AVX512F > [ (V64QI "TARGET_AVX512F") (V32QI "TARGET_AVX") V16QI > (V32HI "TARGET_AVX512F") (V16HI "TARGET_AVX") V8HI]) > iterator (and, after all, ix86_hard_regno_mode_ok should ensure the same), > which means V64QI/V32HI will only show up for TARGET_AVX512F, V32QI/V16HI > only for TARGET_AVX (which implies TARGET_SSE2), and the slightly > nonsensical > gcc_assert (TARGET_SSE2 || TARGET_AVX512VL); > before the switch (the || TARGET_AVX512VL is pointless, because > TARGET_AVX512VL implies TARGET_SSE2 as well as TARGET_AVX2). > So, I'd go perhaps for (untested) following patch, first diff -up, followed > by diff -upb: Looks good, are you going to test/commit it? Or should I? Marek