From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 116271 invoked by alias); 27 Oct 2016 20:54:54 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 116249 invoked by uid 89); 27 Oct 2016 20:54:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.4 required=5.0 tests=AWL,BAYES_00,KAM_LAZY_DOMAIN_SECURITY,RCVD_IN_DNSWL_LOW autolearn=no version=3.3.2 spammy=2506r, 8994797, littleton, Littleton X-HELO: mx0a-001b2d01.pphosted.com Received: from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com) (148.163.156.1) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 27 Oct 2016 20:54:52 +0000 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id u9RKrowD094054 for ; Thu, 27 Oct 2016 16:54:50 -0400 Received: from e32.co.us.ibm.com (e32.co.us.ibm.com [32.97.110.150]) by mx0a-001b2d01.pphosted.com with ESMTP id 26bnjrwmxd-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 27 Oct 2016 16:54:50 -0400 Received: from localhost by e32.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 27 Oct 2016 14:54:49 -0600 Received: from d03dlp03.boulder.ibm.com (9.17.202.179) by e32.co.us.ibm.com (192.168.1.132) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Thu, 27 Oct 2016 14:54:46 -0600 Received: from b03cxnp07028.gho.boulder.ibm.com (b03cxnp07028.gho.boulder.ibm.com [9.17.130.15]) by d03dlp03.boulder.ibm.com (Postfix) with ESMTP id 72B8D19D8040; Thu, 27 Oct 2016 14:54:10 -0600 (MDT) Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp07028.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u9RKsj4H14352692; Thu, 27 Oct 2016 13:54:45 -0700 Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0D2AAC603E; Thu, 27 Oct 2016 14:54:44 -0600 (MDT) Received: from ibm-tiger.the-meissners.org (unknown [9.32.77.111]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP id EFC44C6037; Thu, 27 Oct 2016 14:54:43 -0600 (MDT) Received: by ibm-tiger.the-meissners.org (Postfix, from userid 500) id D958546D90; Thu, 27 Oct 2016 16:54:44 -0400 (EDT) Date: Thu, 27 Oct 2016 20:54:00 -0000 From: Michael Meissner To: Segher Boessenkool Cc: Michael Meissner , gcc-patches@gcc.gnu.org, David Edelsohn , Bill Schmidt Subject: Re: [PATCH], Allow SImode to go into VSX registers on PowerPC ISA 2.07 (power8) and above Mail-Followup-To: Michael Meissner , Segher Boessenkool , gcc-patches@gcc.gnu.org, David Edelsohn , Bill Schmidt References: <20161026225154.GA6588@ibm-tiger.the-meissners.org> <20161027195551.GA21233@gate.crashing.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20161027195551.GA21233@gate.crashing.org> User-Agent: Mutt/1.5.20 (2009-12-10) X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16102720-0004-0000-0000-000010B671C2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00005990; HX=3.00000240; KW=3.00000007; PH=3.00000004; SC=3.00000189; SDB=6.00773623; UDB=6.00371486; IPR=6.00550438; BA=6.00004837; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00013118; XFM=3.00000011; UTC=2016-10-27 20:54:47 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16102720-0005-0000-0000-00007A190CE9 Message-Id: <20161027205444.GA28248@ibm-tiger.the-meissners.org> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-10-27_12:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1609300000 definitions=main-1610270342 X-IsSubscribed: yes X-SW-Source: 2016-10/txt/msg02307.txt.bz2 On Thu, Oct 27, 2016 at 02:55:51PM -0500, Segher Boessenkool wrote: > On Wed, Oct 26, 2016 at 06:51:54PM -0400, Michael Meissner wrote: > > (zero_extendsi2): Reorder pattern, so RLDICL comes before > > the FPR and VSX loads, but before MTVSRWZ. Remove ??, ! from the > > constraints. Add MFVSRWZ and XXEXTRACTUW instructions to support > > small integers in vector registers. > > "but those before MTVSRWZ"? Or don't mention rldicl at all? > > > (extendsi2): Reorder pattern, so EXTSW comes before the FPR > > and VSX loads, but before MTVSRWA. Remove ??, ! from the > > constraints. Add VEXTSW2D support for small integers in vector > > registers. > > Similar here. I reworded it to say RLDICL/EXTS came after the GPR load before before the FPR/VSX loads. > > > @@ -3112,7 +3133,10 @@ rs6000_init_hard_regno_mode_ok (bool glo > > ww - Register class to do SF conversions in with VSX operations. > > wx - Float register if we can do 32-bit int stores. > > wy - Register class to do ISA 2.07 SF operations. > > - wz - Float register if we can do 32-bit unsigned int loads. */ > > + wz - Float register if we can do 32-bit unsigned int loads. > > + wI - VSX register if SImode is allowed in VSX registers. > > + wJ - VSX register if QImode/HImode are allowed in VSX registers. > > + wK - Altivec register if QImode/HImode are allowed in VSX registers. */ > > You don't mention wH here, is that an oversight? Yes, thanks for catching this. > > /* Add support for various direct moves available. In this function, we only > > look at cases where we don't need any extra registers, and one or more > > - simple move insns are issued. At present, 32-bit integers are not allowed > > + simple move insns are issued. Originally small integers are not allowed > > dot space space. Thanks. > > @@ -5019,7 +5023,10 @@ (define_insn_and_split "floatsi2_l > > operands[1] = rs6000_address_for_fpconvert (operands[1]); > > if (GET_CODE (operands[2]) == SCRATCH) > > operands[2] = gen_reg_rtx (DImode); > > - emit_insn (gen_lfiwax (operands[2], operands[1])); > > + if (TARGET_VSX_SMALL_INTEGER) > > + emit_insn (gen_extendsidi2 (operands[2], operands[1])); > > + else > > Trailing spaces here. Fixed. > > + (match_operand:SI 1 "input_operand" > > + "r, U, m, Z, Z, > > + r, wI, wH, I, L, > > + n, wIwH, O, wM, wB, > > Indent with tabs instead of spaces, like the other lines. Thanks. > Everything looks fine except for those nits, and I'm really happy there > is no benchmark degradation :-) > > Please install to trunk (if the -m32 and power7 runs work out fine). Submitted as subversion id 241631. -- Michael Meissner, IBM IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797