* [PATCH 0/3] use rtx_insn * more
@ 2016-10-28 19:04 tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 3/3] split up some variables to " tbsaunde+gcc
` (3 more replies)
0 siblings, 4 replies; 9+ messages in thread
From: tbsaunde+gcc @ 2016-10-28 19:04 UTC (permalink / raw)
To: gcc-patches
From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
HI,
This series changes various variables type from rtx to rtx_insn * so that the
remaining patches in this series
http://gcc.gnu.org/ml/gcc-patches/2016-10/msg01353.html can be applied.
patches bootstrapped and regtested on x86_64-linux-gnu, and run through config-list.mk, ok?
Thanks!
Trev
Trevor Saunders (3):
use rtx_insn * in various places where it is obvious
split up the trial variable in reorg.c:relax_delay_slots to use
rtx_insn * more
split up some variables to use rtx_insn * more
gcc/config/alpha/alpha.c | 117 ++++++++++++++++++++++---------------------
gcc/config/arc/arc.c | 3 +-
gcc/config/arm/arm.c | 9 ++--
gcc/config/bfin/bfin.c | 7 +--
gcc/config/c6x/c6x.c | 9 ++--
gcc/config/frv/frv.c | 2 +-
gcc/config/i386/i386.c | 3 +-
gcc/config/ia64/ia64.c | 4 +-
gcc/config/m32c/m32c.c | 4 +-
gcc/config/mips/mips.c | 61 +++++++++++-----------
gcc/config/mn10300/mn10300.c | 2 +-
gcc/config/rl78/rl78.c | 2 +-
gcc/config/s390/s390.c | 7 +--
gcc/config/sh/sh-mem.cc | 8 +--
gcc/config/sh/sh.md | 18 +++----
gcc/emit-rtl.c | 2 +-
gcc/except.c | 2 +-
gcc/final.c | 4 +-
gcc/jump.c | 4 +-
gcc/optabs.c | 5 +-
gcc/reload1.c | 9 ++--
gcc/reorg.c | 19 ++++---
22 files changed, 156 insertions(+), 145 deletions(-)
--
2.9.3.dirty
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 2/3] split up the trial variable in reorg.c:relax_delay_slots to use rtx_insn * more
2016-10-28 19:04 [PATCH 0/3] use rtx_insn * more tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 3/3] split up some variables to " tbsaunde+gcc
@ 2016-10-28 19:04 ` tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 1/3] use rtx_insn * in various places where it is obvious tbsaunde+gcc
2016-10-31 13:38 ` [PATCH 0/3] use rtx_insn * more Jeff Law
3 siblings, 0 replies; 9+ messages in thread
From: tbsaunde+gcc @ 2016-10-28 19:04 UTC (permalink / raw)
To: gcc-patches
From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
gcc/ChangeLog:
2016-10-27 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* reorg.c (relax_delay_slots): Split up the trial variable.
---
gcc/reorg.c | 19 +++++++++----------
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/gcc/reorg.c b/gcc/reorg.c
index 799d27b..da4d7c6 100644
--- a/gcc/reorg.c
+++ b/gcc/reorg.c
@@ -222,7 +222,7 @@ static void steal_delay_list_from_fallthrough (rtx_insn *, rtx, rtx_sequence *,
static void try_merge_delay_insns (rtx_insn *, rtx_insn *);
static rtx_insn *redundant_insn (rtx, rtx_insn *, const vec<rtx_insn *> &);
static int own_thread_p (rtx, rtx, int);
-static void update_block (rtx_insn *, rtx);
+static void update_block (rtx_insn *, rtx_insn *);
static int reorg_redirect_jump (rtx_jump_insn *, rtx);
static void update_reg_dead_notes (rtx_insn *, rtx_insn *);
static void fix_reg_dead_note (rtx_insn *, rtx);
@@ -1703,7 +1703,7 @@ own_thread_p (rtx thread, rtx label, int allow_fallthrough)
BARRIER in relax_delay_slots. */
static void
-update_block (rtx_insn *insn, rtx where)
+update_block (rtx_insn *insn, rtx_insn *where)
{
/* Ignore if this was in a delay slot and it came from the target of
a branch. */
@@ -3118,7 +3118,6 @@ relax_delay_slots (rtx_insn *first)
{
rtx_insn *insn, *next;
rtx_sequence *pat;
- rtx trial;
rtx_insn *delay_insn;
rtx target_label;
@@ -3271,10 +3270,10 @@ relax_delay_slots (rtx_insn *first)
for (i = 0; i < XVECLEN (pat, 0); i++)
INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
- trial = PREV_INSN (insn);
+ rtx_insn *prev = PREV_INSN (insn);
delete_related_insns (insn);
gcc_assert (GET_CODE (pat) == SEQUENCE);
- add_insn_after (delay_insn, trial, NULL);
+ add_insn_after (delay_insn, prev, NULL);
after = delay_insn;
for (i = 1; i < pat->len (); i++)
after = emit_copy_of_insn_after (pat->insn (i), after);
@@ -3295,9 +3294,9 @@ relax_delay_slots (rtx_insn *first)
/* If this jump goes to another unconditional jump, thread it, but
don't convert a jump into a RETURN here. */
- trial = skip_consecutive_labels (follow_jumps (target_label,
- delay_jump_insn,
- &crossing));
+ rtx trial = skip_consecutive_labels (follow_jumps (target_label,
+ delay_jump_insn,
+ &crossing));
if (ANY_RETURN_P (trial))
trial = find_end_label (trial);
@@ -3401,10 +3400,10 @@ relax_delay_slots (rtx_insn *first)
for (i = 0; i < XVECLEN (pat, 0); i++)
INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
- trial = PREV_INSN (insn);
+ rtx_insn *prev = PREV_INSN (insn);
delete_related_insns (insn);
gcc_assert (GET_CODE (pat) == SEQUENCE);
- add_insn_after (delay_jump_insn, trial, NULL);
+ add_insn_after (delay_jump_insn, prev, NULL);
after = delay_jump_insn;
for (i = 1; i < pat->len (); i++)
after = emit_copy_of_insn_after (pat->insn (i), after);
--
2.9.3.dirty
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 1/3] use rtx_insn * in various places where it is obvious
2016-10-28 19:04 [PATCH 0/3] use rtx_insn * more tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 3/3] split up some variables to " tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 2/3] split up the trial variable in reorg.c:relax_delay_slots " tbsaunde+gcc
@ 2016-10-28 19:04 ` tbsaunde+gcc
2016-10-31 13:38 ` [PATCH 0/3] use rtx_insn * more Jeff Law
3 siblings, 0 replies; 9+ messages in thread
From: tbsaunde+gcc @ 2016-10-28 19:04 UTC (permalink / raw)
To: gcc-patches
From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
gcc/ChangeLog:
2016-10-27 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/arc/arc.c (arc_emit_call_tls_get_addr): Make the type
of variables rtx_insn *.
* config/arm/arm.c (arm_call_tls_get_addr): Likewise.
(legitimize_tls_address): Likewise.
* config/bfin/bfin.c (hwloop_optimize): Likewise.
(bfin_gen_bundles): Likewise.
* config/c6x/c6x.c (reorg_split_calls): Likewise.
(c6x_reorg): Likewise.
* config/frv/frv.c (frv_reorder_packet): Likewise.
* config/i386/i386.c (ix86_split_idivmod): Likewise.
* config/ia64/ia64.c (ia64_expand_compare): Likewise.
* config/m32c/m32c.c (m32c_prepare_shift): Likewise.
* config/mn10300/mn10300.c: Likewise.
* config/rl78/rl78.c: Likewise.
* config/s390/s390.c (s390_fix_long_loop_prediction): Likewise.
* config/sh/sh-mem.cc (sh_expand_cmpstr): Likewise.
(sh_expand_cmpnstr): Likewise.
(sh_expand_strlen): Likewise.
(sh_expand_setmem): Likewise.
* config/sh/sh.md: Likewise.
* emit-rtl.c (emit_pattern_before): Likewise.
* except.c: Likewise.
* final.c: Likewise.
* jump.c: Likewise.
---
gcc/config/arc/arc.c | 3 +--
gcc/config/arm/arm.c | 9 +++++----
gcc/config/bfin/bfin.c | 7 ++++---
gcc/config/c6x/c6x.c | 9 ++++-----
gcc/config/frv/frv.c | 2 +-
gcc/config/i386/i386.c | 3 ++-
gcc/config/ia64/ia64.c | 4 ++--
gcc/config/m32c/m32c.c | 4 ++--
gcc/config/mn10300/mn10300.c | 2 +-
gcc/config/rl78/rl78.c | 2 +-
gcc/config/s390/s390.c | 7 ++++---
gcc/config/sh/sh-mem.cc | 8 ++++----
gcc/config/sh/sh.md | 18 +++++++++---------
gcc/emit-rtl.c | 2 +-
gcc/except.c | 2 +-
gcc/final.c | 4 ++--
gcc/jump.c | 4 ++--
17 files changed, 46 insertions(+), 44 deletions(-)
diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
index 21bba0c..8e8fff4 100644
--- a/gcc/config/arc/arc.c
+++ b/gcc/config/arc/arc.c
@@ -4829,7 +4829,6 @@ static rtx
arc_emit_call_tls_get_addr (rtx sym, int reloc, rtx eqv)
{
rtx r0 = gen_rtx_REG (Pmode, R0_REG);
- rtx insns;
rtx call_fusage = NULL_RTX;
start_sequence ();
@@ -4846,7 +4845,7 @@ arc_emit_call_tls_get_addr (rtx sym, int reloc, rtx eqv)
RTL_PURE_CALL_P (call_insn) = 1;
add_function_usage_to (call_insn, call_fusage);
- insns = get_insns ();
+ rtx_insn *insns = get_insns ();
end_sequence ();
rtx dest = gen_reg_rtx (Pmode);
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 022c1d7..6351987 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -7900,10 +7900,10 @@ load_tls_operand (rtx x, rtx reg)
return reg;
}
-static rtx
+static rtx_insn *
arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
{
- rtx insns, label, labelno, sum;
+ rtx label, labelno, sum;
gcc_assert (reloc != TLS_DESCSEQ);
start_sequence ();
@@ -7927,7 +7927,7 @@ arm_call_tls_get_addr (rtx x, rtx reg, rtx *valuep, int reloc)
LCT_PURE, /* LCT_CONST? */
Pmode, 1, reg, Pmode);
- insns = get_insns ();
+ rtx_insn *insns = get_insns ();
end_sequence ();
return insns;
@@ -7959,7 +7959,8 @@ arm_tls_descseq_addr (rtx x, rtx reg)
rtx
legitimize_tls_address (rtx x, rtx reg)
{
- rtx dest, tp, label, labelno, sum, insns, ret, eqv, addend;
+ rtx dest, tp, label, labelno, sum, ret, eqv, addend;
+ rtx_insn *insns;
unsigned int model = SYMBOL_REF_TLS_MODEL (x);
switch (model)
diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c
index 9b81868..957f1ae 100644
--- a/gcc/config/bfin/bfin.c
+++ b/gcc/config/bfin/bfin.c
@@ -3431,7 +3431,8 @@ hwloop_optimize (hwloop_info loop)
basic_block bb;
rtx_insn *insn, *last_insn;
rtx loop_init, start_label, end_label;
- rtx iter_reg, scratchreg, scratch_init, scratch_init_insn;
+ rtx iter_reg, scratchreg, scratch_init;
+ rtx_insn *scratch_init_insn;
rtx lc_reg, lt_reg, lb_reg;
rtx seq_end;
rtx_insn *seq;
@@ -3452,7 +3453,7 @@ hwloop_optimize (hwloop_info loop)
scratchreg = NULL_RTX;
scratch_init = iter_reg;
- scratch_init_insn = NULL_RTX;
+ scratch_init_insn = NULL;
if (!PREG_P (iter_reg) && loop->incoming_src)
{
basic_block bb_in = loop->incoming_src;
@@ -3976,7 +3977,7 @@ bfin_gen_bundles (void)
for (insn = BB_HEAD (bb);; insn = next)
{
int at_end;
- rtx delete_this = NULL_RTX;
+ rtx_insn *delete_this = NULL;
if (NONDEBUG_INSN_P (insn))
{
diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index f8c3d66..6cb9185 100644
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -4856,7 +4856,7 @@ find_last_same_clock (rtx_insn *insn)
the SEQUENCEs that represent execute packets. */
static void
-reorg_split_calls (rtx *call_labels)
+reorg_split_calls (rtx_insn **call_labels)
{
unsigned int reservation_mask = 0;
rtx_insn *insn = get_insns ();
@@ -4878,7 +4878,7 @@ reorg_split_calls (rtx *call_labels)
if (returning_call_p (insn))
{
- rtx label = gen_label_rtx ();
+ rtx_code_label *label = gen_label_rtx ();
rtx labelref = gen_rtx_LABEL_REF (Pmode, label);
rtx reg = gen_rtx_REG (SImode, RETURN_ADDR_REGNO);
@@ -5029,7 +5029,7 @@ reorg_split_calls (rtx *call_labels)
scheduling was run earlier. */
static void
-reorg_emit_nops (rtx *call_labels)
+reorg_emit_nops (rtx_insn **call_labels)
{
bool first;
rtx last_call;
@@ -5921,7 +5921,6 @@ static void
c6x_reorg (void)
{
basic_block bb;
- rtx *call_labels;
bool do_selsched = (c6x_flag_schedule_insns2 && flag_selective_scheduling2
&& !maybe_skip_selective_scheduling ());
@@ -5967,7 +5966,7 @@ c6x_reorg (void)
}
sched_no_dce = false;
- call_labels = XCNEWVEC (rtx, get_max_uid () + 1);
+ rtx_insn **call_labels = XCNEWVEC (rtx_insn *, get_max_uid () + 1);
reorg_split_calls (call_labels);
diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c
index 352bcff..581f383 100644
--- a/gcc/config/frv/frv.c
+++ b/gcc/config/frv/frv.c
@@ -7594,7 +7594,7 @@ static void
frv_reorder_packet (void)
{
unsigned int cursor[NUM_GROUPS];
- rtx insns[ARRAY_SIZE (frv_unit_groups)];
+ rtx_insn *insns[ARRAY_SIZE (frv_unit_groups)];
unsigned int unit, to, from;
enum frv_insn_group group;
struct frv_packet_group *packet_group;
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index f70eb43..5bb6efa 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -20376,7 +20376,8 @@ ix86_split_idivmod (machine_mode mode, rtx operands[],
bool signed_p)
{
rtx_code_label *end_label, *qimode_label;
- rtx insn, div, mod;
+ rtx div, mod;
+ rtx_insn *insn;
rtx scratch, tmp0, tmp1, tmp2;
rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx);
rtx (*gen_zero_extend) (rtx, rtx);
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 31a2267..8557157 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -1803,7 +1803,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
};
int magic;
enum rtx_code ncode;
- rtx ret, insns;
+ rtx ret;
gcc_assert (cmptf_libfunc && GET_MODE (*op1) == TFmode);
switch (code)
@@ -1842,7 +1842,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1)
emit_insn (gen_rtx_SET (cmp, gen_rtx_fmt_ee (ncode, BImode,
ret, const0_rtx)));
- insns = get_insns ();
+ rtx_insn *insns = get_insns ();
end_sequence ();
emit_libcall_block (insns, cmp, cmp,
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 7d64c49..5483c49 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -3779,13 +3779,13 @@ m32c_prepare_shift (rtx * operands, int scale, int shift_code)
undefined to skip one of the comparisons. */
rtx count;
- rtx label, tempvar;
+ rtx tempvar;
rtx_insn *insn;
emit_move_insn (operands[0], operands[1]);
count = temp;
- label = gen_label_rtx ();
+ rtx_code_label *label = gen_label_rtx ();
LABEL_NUSES (label) ++;
tempvar = gen_reg_rtx (mode);
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index dbbc4db..e61bf40 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -3163,7 +3163,7 @@ mn10300_bundle_liw (void)
Insert a SETLB insn just before LABEL. */
static void
-mn10300_insert_setlb_lcc (rtx label, rtx branch)
+mn10300_insert_setlb_lcc (rtx_insn *label, rtx branch)
{
rtx lcc, comparison, cmp_reg;
diff --git a/gcc/config/rl78/rl78.c b/gcc/config/rl78/rl78.c
index 08ab899..fd72a58 100644
--- a/gcc/config/rl78/rl78.c
+++ b/gcc/config/rl78/rl78.c
@@ -2949,7 +2949,7 @@ move_to_acc (int opno, rtx before)
}
static void
-force_into_acc (rtx src, rtx before)
+force_into_acc (rtx src, rtx_insn *before)
{
machine_mode mode = GET_MODE (src);
rtx move;
diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index f69b470..0b1232c 100644
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -4840,7 +4840,8 @@ s390_emit_tls_call_insn (rtx result_reg, rtx tls_call)
static rtx
legitimize_tls_address (rtx addr, rtx reg)
{
- rtx new_rtx, tls_call, temp, base, r2, insn;
+ rtx new_rtx, tls_call, temp, base, r2;
+ rtx_insn *insn;
if (GET_CODE (addr) == SYMBOL_REF)
switch (tls_symbolic_operand (addr))
@@ -13280,7 +13281,7 @@ static bool
s390_fix_long_loop_prediction (rtx_insn *insn)
{
rtx set = single_set (insn);
- rtx code_label, label_ref, new_label;
+ rtx code_label, label_ref;
rtx_insn *uncond_jump;
rtx_insn *cur_insn;
rtx tmp;
@@ -13317,7 +13318,7 @@ s390_fix_long_loop_prediction (rtx_insn *insn)
if (!cur_insn || JUMP_P (cur_insn) || LABEL_P (cur_insn))
return false;
- new_label = gen_label_rtx ();
+ rtx_code_label *new_label = gen_label_rtx ();
uncond_jump = emit_jump_insn_after (
gen_rtx_SET (pc_rtx,
gen_rtx_LABEL_REF (VOIDmode, code_label)),
diff --git a/gcc/config/sh/sh-mem.cc b/gcc/config/sh/sh-mem.cc
index 1773f1d..b965aed 100644
--- a/gcc/config/sh/sh-mem.cc
+++ b/gcc/config/sh/sh-mem.cc
@@ -204,7 +204,7 @@ sh_expand_cmpstr (rtx *operands)
rtx tmp2 = gen_reg_rtx (SImode);
rtx tmp3 = gen_reg_rtx (SImode);
- rtx jump;
+ rtx_insn *jump;
rtx_code_label *L_return = gen_label_rtx ();
rtx_code_label *L_loop_byte = gen_label_rtx ();
rtx_code_label *L_end_loop_byte = gen_label_rtx ();
@@ -342,7 +342,7 @@ sh_expand_cmpnstr (rtx *operands)
rtx tmp1 = gen_reg_rtx (SImode);
rtx tmp2 = gen_reg_rtx (SImode);
- rtx jump;
+ rtx_insn *jump;
rtx_code_label *L_return = gen_label_rtx ();
rtx_code_label *L_loop_byte = gen_label_rtx ();
rtx_code_label *L_end_loop_byte = gen_label_rtx ();
@@ -583,7 +583,7 @@ sh_expand_strlen (rtx *operands)
rtx_code_label *L_return = gen_label_rtx ();
rtx_code_label *L_loop_byte = gen_label_rtx ();
- rtx jump;
+ rtx_insn *jump;
rtx_code_label *L_loop_long = gen_label_rtx ();
rtx_code_label *L_end_loop_long = gen_label_rtx ();
@@ -669,7 +669,7 @@ sh_expand_setmem (rtx *operands)
rtx_code_label *L_loop_byte = gen_label_rtx ();
rtx_code_label *L_loop_word = gen_label_rtx ();
rtx_code_label *L_return = gen_label_rtx ();
- rtx jump;
+ rtx_insn *jump;
rtx dest = copy_rtx (operands[0]);
rtx dest_addr = copy_addr_to_reg (XEXP (dest, 0));
rtx val = force_reg (SImode, operands[2]);
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index dcb31eb..4328eab 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -3043,7 +3043,7 @@
"&& 1"
[(const_int 0)]
{
- rtx prev_set_t_insn = NULL_RTX;
+ rtx_insn *prev_set_t_insn = NULL;
if (!arith_reg_operand (operands[3], SImode))
{
@@ -3104,7 +3104,7 @@
&& ! reg_referenced_p (get_t_reg_rtx (),
PATTERN (prev_set_t_insn))))
{
- prev_set_t_insn = NULL_RTX;
+ prev_set_t_insn = NULL;
tmp_t_reg = gen_reg_rtx (SImode);
emit_insn (gen_move_insn (tmp_t_reg, get_t_reg_rtx ()));
}
@@ -3173,7 +3173,7 @@
if (INTVAL (operands[2]) > 1)
{
const rtx shift_count = GEN_INT (INTVAL (operands[2]) - 1);
- rtx prev_set_t_insn = NULL_RTX;
+ rtx_insn *prev_set_t_insn = NULL;
rtx tmp_t_reg = NULL_RTX;
/* If we're going to emit a shift sequence that clobbers the T_REG,
@@ -3204,7 +3204,7 @@
&& ! reg_referenced_p (get_t_reg_rtx (),
PATTERN (prev_set_t_insn))))
{
- prev_set_t_insn = NULL_RTX;
+ prev_set_t_insn = NULL;
tmp_t_reg = gen_reg_rtx (SImode);
emit_insn (gen_move_insn (tmp_t_reg, get_t_reg_rtx ()));
}
@@ -4517,7 +4517,7 @@
"TARGET_SH1 && ! TARGET_ZDCBRANCH"
[(const_int 0)]
{
- rtx skip_neg_label = gen_label_rtx ();
+ rtx_code_label *skip_neg_label = gen_label_rtx ();
emit_move_insn (operands[0], operands[1]);
@@ -4544,7 +4544,7 @@
"&& can_create_pseudo_p ()"
[(const_int 0)]
{
- rtx skip_neg_label = gen_label_rtx ();
+ rtx_code_label *skip_neg_label = gen_label_rtx ();
emit_move_insn (operands[0], operands[1]);
@@ -7455,7 +7455,7 @@
[(match_operand 0 "" "") (match_operand 1 "" "")]
""
{
- rtx gotoffsym, insn;
+ rtx gotoffsym;
rtx t = (!can_create_pseudo_p ()
? operands[0]
: gen_reg_rtx (GET_MODE (operands[0])));
@@ -7466,7 +7466,7 @@
gotoffsym = gen_sym2GOTOFF (operands[1]);
PUT_MODE (gotoffsym, Pmode);
emit_move_insn (t, gotoffsym);
- insn = emit_move_insn (operands[0], gen_rtx_PLUS (Pmode, t, picreg));
+ rtx_insn *insn = emit_move_insn (operands[0], gen_rtx_PLUS (Pmode, t, picreg));
set_unique_reg_note (insn, REG_EQUAL, operands[1]);
@@ -8824,7 +8824,7 @@
"&& 1"
[(const_int 0)]
{
- rtx skip_label = gen_label_rtx ();
+ rtx_code_label *skip_label = gen_label_rtx ();
emit_move_insn (operands[0], operands[1]);
rtx cmp_val = operands[2];
diff --git a/gcc/emit-rtl.c b/gcc/emit-rtl.c
index 8afcfbe..a8516eb 100644
--- a/gcc/emit-rtl.c
+++ b/gcc/emit-rtl.c
@@ -4813,7 +4813,7 @@ emit_pattern_before (rtx pattern, rtx uncast_before, bool skip_debug_insns,
insnp, make_raw);
else
return emit_pattern_before_noloc (pattern, before,
- insnp ? before : NULL_RTX,
+ insnp ? before : NULL_RTX,
NULL, make_raw);
}
diff --git a/gcc/except.c b/gcc/except.c
index f0a1be0..e811b56 100644
--- a/gcc/except.c
+++ b/gcc/except.c
@@ -909,7 +909,7 @@ assign_filter_values (void)
first instruction of some existing BB and return the newly
produced block. */
static basic_block
-emit_to_new_bb_before (rtx_insn *seq, rtx insn)
+emit_to_new_bb_before (rtx_insn *seq, rtx_insn *insn)
{
rtx_insn *last;
basic_block bb;
diff --git a/gcc/final.c b/gcc/final.c
index 36ef755..e463d3f 100644
--- a/gcc/final.c
+++ b/gcc/final.c
@@ -214,7 +214,7 @@ static void leaf_renumber_regs (rtx_insn *);
static int alter_cond (rtx);
#endif
#ifndef ADDR_VEC_ALIGN
-static int final_addr_vec_align (rtx);
+static int final_addr_vec_align (rtx_insn *);
#endif
static int align_fuzz (rtx, rtx, int, unsigned);
static void collect_fn_hard_reg_usage (void);
@@ -513,7 +513,7 @@ default_jump_align_max_skip (rtx_insn *insn ATTRIBUTE_UNUSED)
#ifndef ADDR_VEC_ALIGN
static int
-final_addr_vec_align (rtx addr_vec)
+final_addr_vec_align (rtx_insn *addr_vec)
{
int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
diff --git a/gcc/jump.c b/gcc/jump.c
index fafef05..b682813 100644
--- a/gcc/jump.c
+++ b/gcc/jump.c
@@ -62,7 +62,7 @@ static void init_label_info (rtx_insn *);
static void mark_all_labels (rtx_insn *);
static void mark_jump_label_1 (rtx, rtx_insn *, bool, bool);
static void mark_jump_label_asm (rtx, rtx_insn *);
-static void redirect_exp_1 (rtx *, rtx, rtx, rtx);
+static void redirect_exp_1 (rtx *, rtx, rtx, rtx_insn *);
static int invert_exp_1 (rtx, rtx_insn *);
\f
/* Worker for rebuild_jump_labels and rebuild_jump_labels_chain. */
@@ -1457,7 +1457,7 @@ redirect_target (rtx x)
NLABEL as a return. Accrue modifications into the change group. */
static void
-redirect_exp_1 (rtx *loc, rtx olabel, rtx nlabel, rtx insn)
+redirect_exp_1 (rtx *loc, rtx olabel, rtx nlabel, rtx_insn *insn)
{
rtx x = *loc;
RTX_CODE code = GET_CODE (x);
--
2.9.3.dirty
^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH 3/3] split up some variables to use rtx_insn * more
2016-10-28 19:04 [PATCH 0/3] use rtx_insn * more tbsaunde+gcc
@ 2016-10-28 19:04 ` tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 2/3] split up the trial variable in reorg.c:relax_delay_slots " tbsaunde+gcc
` (2 subsequent siblings)
3 siblings, 0 replies; 9+ messages in thread
From: tbsaunde+gcc @ 2016-10-28 19:04 UTC (permalink / raw)
To: gcc-patches
From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
Note to readers, a -b diff is below the whitespace sensitive one and should be
much easier to read.
gcc/ChangeLog:
2016-10-27 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* config/alpha/alpha.c (alpha_legitimize_address_1): Split up
variables so some can be rtx_insn *.
(alpha_emit_xfloating_libcall): Likewise.
* config/mips/mips.c (mips_call_tls_get_addr): Likewise.
(mips_legitimize_tls_address): Likewise.
* optabs.c (expand_binop): Likewise.
* reload1.c (gen_reload): Likewise.
---
gcc/config/alpha/alpha.c | 117 ++++++++++++++++++++++++-----------------------
gcc/config/mips/mips.c | 61 ++++++++++++------------
gcc/optabs.c | 5 +-
gcc/reload1.c | 9 ++--
4 files changed, 101 insertions(+), 91 deletions(-)
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 7f53967..6d390ae 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1017,7 +1017,8 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
&& GET_MODE_SIZE (mode) <= UNITS_PER_WORD
&& symbolic_operand (x, Pmode))
{
- rtx r0, r16, eqv, tga, tp, insn, dest, seq;
+ rtx r0, r16, eqv, tga, tp, dest, seq;
+ rtx_insn *insn;
switch (tls_symbolic_operand_type (x))
{
@@ -1025,66 +1026,70 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
break;
case TLS_MODEL_GLOBAL_DYNAMIC:
- start_sequence ();
+ {
+ start_sequence ();
- r0 = gen_rtx_REG (Pmode, 0);
- r16 = gen_rtx_REG (Pmode, 16);
- tga = get_tls_get_addr ();
- dest = gen_reg_rtx (Pmode);
- seq = GEN_INT (alpha_next_sequence_number++);
+ r0 = gen_rtx_REG (Pmode, 0);
+ r16 = gen_rtx_REG (Pmode, 16);
+ tga = get_tls_get_addr ();
+ dest = gen_reg_rtx (Pmode);
+ seq = GEN_INT (alpha_next_sequence_number++);
- emit_insn (gen_movdi_er_tlsgd (r16, pic_offset_table_rtx, x, seq));
- insn = gen_call_value_osf_tlsgd (r0, tga, seq);
- insn = emit_call_insn (insn);
- RTL_CONST_CALL_P (insn) = 1;
- use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
+ emit_insn (gen_movdi_er_tlsgd (r16, pic_offset_table_rtx, x, seq));
+ rtx val = gen_call_value_osf_tlsgd (r0, tga, seq);
+ insn = emit_call_insn (val);
+ RTL_CONST_CALL_P (insn) = 1;
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
- insn = get_insns ();
- end_sequence ();
+ insn = get_insns ();
+ end_sequence ();
- emit_libcall_block (insn, dest, r0, x);
- return dest;
+ emit_libcall_block (insn, dest, r0, x);
+ return dest;
+ }
case TLS_MODEL_LOCAL_DYNAMIC:
- start_sequence ();
+ {
+ start_sequence ();
- r0 = gen_rtx_REG (Pmode, 0);
- r16 = gen_rtx_REG (Pmode, 16);
- tga = get_tls_get_addr ();
- scratch = gen_reg_rtx (Pmode);
- seq = GEN_INT (alpha_next_sequence_number++);
+ r0 = gen_rtx_REG (Pmode, 0);
+ r16 = gen_rtx_REG (Pmode, 16);
+ tga = get_tls_get_addr ();
+ scratch = gen_reg_rtx (Pmode);
+ seq = GEN_INT (alpha_next_sequence_number++);
- emit_insn (gen_movdi_er_tlsldm (r16, pic_offset_table_rtx, seq));
- insn = gen_call_value_osf_tlsldm (r0, tga, seq);
- insn = emit_call_insn (insn);
- RTL_CONST_CALL_P (insn) = 1;
- use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
+ emit_insn (gen_movdi_er_tlsldm (r16, pic_offset_table_rtx, seq));
+ rtx val = gen_call_value_osf_tlsldm (r0, tga, seq);
+ insn = emit_call_insn (val);
+ RTL_CONST_CALL_P (insn) = 1;
+ use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
- insn = get_insns ();
- end_sequence ();
+ insn = get_insns ();
+ end_sequence ();
- eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
- UNSPEC_TLSLDM_CALL);
- emit_libcall_block (insn, scratch, r0, eqv);
+ eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
+ UNSPEC_TLSLDM_CALL);
+ emit_libcall_block (insn, scratch, r0, eqv);
- eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), UNSPEC_DTPREL);
- eqv = gen_rtx_CONST (Pmode, eqv);
+ eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), UNSPEC_DTPREL);
+ eqv = gen_rtx_CONST (Pmode, eqv);
- if (alpha_tls_size == 64)
- {
- dest = gen_reg_rtx (Pmode);
- emit_insn (gen_rtx_SET (dest, eqv));
- emit_insn (gen_adddi3 (dest, dest, scratch));
- return dest;
- }
- if (alpha_tls_size == 32)
- {
- insn = gen_rtx_HIGH (Pmode, eqv);
- insn = gen_rtx_PLUS (Pmode, scratch, insn);
- scratch = gen_reg_rtx (Pmode);
- emit_insn (gen_rtx_SET (scratch, insn));
- }
- return gen_rtx_LO_SUM (Pmode, scratch, eqv);
+ if (alpha_tls_size == 64)
+ {
+ dest = gen_reg_rtx (Pmode);
+ emit_insn (gen_rtx_SET (dest, eqv));
+ emit_insn (gen_adddi3 (dest, dest, scratch));
+ return dest;
+ }
+ if (alpha_tls_size == 32)
+ {
+ rtx temp = gen_rtx_HIGH (Pmode, eqv);
+ temp = gen_rtx_PLUS (Pmode, scratch, temp);
+ scratch = gen_reg_rtx (Pmode);
+ emit_insn (gen_rtx_SET (scratch, temp));
+ }
+ return gen_rtx_LO_SUM (Pmode, scratch, eqv);
+ }
case TLS_MODEL_INITIAL_EXEC:
eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), UNSPEC_TPREL);
@@ -1106,10 +1111,10 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
emit_insn (gen_get_thread_pointerdi (tp));
if (alpha_tls_size == 32)
{
- insn = gen_rtx_HIGH (Pmode, eqv);
- insn = gen_rtx_PLUS (Pmode, tp, insn);
+ rtx temp = gen_rtx_HIGH (Pmode, eqv);
+ temp = gen_rtx_PLUS (Pmode, tp, temp);
tp = gen_reg_rtx (Pmode);
- emit_insn (gen_rtx_SET (tp, insn));
+ emit_insn (gen_rtx_SET (tp, temp));
}
return gen_rtx_LO_SUM (Pmode, tp, eqv);
@@ -3059,7 +3064,7 @@ static void
alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
int noperands, rtx equiv)
{
- rtx usage = NULL_RTX, tmp, reg;
+ rtx usage = NULL_RTX, reg;
int regno = 16, i;
start_sequence ();
@@ -3109,9 +3114,9 @@ alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
gcc_unreachable ();
}
- tmp = gen_rtx_MEM (QImode, func);
- tmp = emit_call_insn (gen_call_value (reg, tmp, const0_rtx,
- const0_rtx, const0_rtx));
+ rtx mem = gen_rtx_MEM (QImode, func);
+ rtx_insn *tmp = emit_call_insn (gen_call_value (reg, mem, const0_rtx,
+ const0_rtx, const0_rtx));
CALL_INSN_FUNCTION_USAGE (tmp) = usage;
RTL_CONST_CALL_P (tmp) = 1;
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index ebec68e..99adb74 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3396,10 +3396,11 @@ static GTY(()) rtx mips_tls_symbol;
(either global dynamic or local dynamic). V0 is an RTX for the
return value location. */
-static rtx
+static rtx_insn *
mips_call_tls_get_addr (rtx sym, enum mips_symbol_type type, rtx v0)
{
- rtx insn, loc, a0;
+ rtx loc, a0;
+ rtx_insn *insn;
a0 = gen_rtx_REG (Pmode, GP_ARG_FIRST);
@@ -3455,7 +3456,7 @@ mips_get_tp (void)
static rtx
mips_legitimize_tls_address (rtx loc)
{
- rtx dest, insn, v0, tp, tmp1, tmp2, eqv, offset;
+ rtx dest, v0, tp, tmp1, tmp2, eqv, offset;
enum tls_model model;
model = SYMBOL_REF_TLS_MODEL (loc);
@@ -3468,33 +3469,37 @@ mips_legitimize_tls_address (rtx loc)
switch (model)
{
case TLS_MODEL_GLOBAL_DYNAMIC:
- v0 = gen_rtx_REG (Pmode, GP_RETURN);
- insn = mips_call_tls_get_addr (loc, SYMBOL_TLSGD, v0);
- dest = gen_reg_rtx (Pmode);
- emit_libcall_block (insn, dest, v0, loc);
- break;
+ {
+ v0 = gen_rtx_REG (Pmode, GP_RETURN);
+ rtx_insn *insn = mips_call_tls_get_addr (loc, SYMBOL_TLSGD, v0);
+ dest = gen_reg_rtx (Pmode);
+ emit_libcall_block (insn, dest, v0, loc);
+ break;
+ }
case TLS_MODEL_LOCAL_DYNAMIC:
- v0 = gen_rtx_REG (Pmode, GP_RETURN);
- insn = mips_call_tls_get_addr (loc, SYMBOL_TLSLDM, v0);
- tmp1 = gen_reg_rtx (Pmode);
-
- /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
- share the LDM result with other LD model accesses. */
- eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
- UNSPEC_TLS_LDM);
- emit_libcall_block (insn, tmp1, v0, eqv);
-
- offset = mips_unspec_address (loc, SYMBOL_DTPREL);
- if (mips_split_p[SYMBOL_DTPREL])
- {
- tmp2 = mips_unspec_offset_high (NULL, tmp1, loc, SYMBOL_DTPREL);
- dest = gen_rtx_LO_SUM (Pmode, tmp2, offset);
- }
- else
- dest = expand_binop (Pmode, add_optab, tmp1, offset,
- 0, 0, OPTAB_DIRECT);
- break;
+ {
+ v0 = gen_rtx_REG (Pmode, GP_RETURN);
+ rtx_insn *insn = mips_call_tls_get_addr (loc, SYMBOL_TLSLDM, v0);
+ tmp1 = gen_reg_rtx (Pmode);
+
+ /* Attach a unique REG_EQUIV, to allow the RTL optimizers to
+ share the LDM result with other LD model accesses. */
+ eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx),
+ UNSPEC_TLS_LDM);
+ emit_libcall_block (insn, tmp1, v0, eqv);
+
+ offset = mips_unspec_address (loc, SYMBOL_DTPREL);
+ if (mips_split_p[SYMBOL_DTPREL])
+ {
+ tmp2 = mips_unspec_offset_high (NULL, tmp1, loc, SYMBOL_DTPREL);
+ dest = gen_rtx_LO_SUM (Pmode, tmp2, offset);
+ }
+ else
+ dest = expand_binop (Pmode, add_optab, tmp1, offset,
+ 0, 0, OPTAB_DIRECT);
+ break;
+ }
case TLS_MODEL_INITIAL_EXEC:
tp = mips_get_tp ();
diff --git a/gcc/optabs.c b/gcc/optabs.c
index a4d7a5e..7a1f025 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -1712,8 +1712,9 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
{
if (optab_handler (mov_optab, mode) != CODE_FOR_nothing)
{
- temp = emit_move_insn (target ? target : product, product);
- set_dst_reg_note (temp,
+ rtx_insn *move = emit_move_insn (target ? target : product,
+ product);
+ set_dst_reg_note (move,
REG_EQUAL,
gen_rtx_fmt_ee (MULT, mode,
copy_rtx (op0),
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 4b9c7c7..876f7ef 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -8703,7 +8703,6 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
#endif
else if (REG_P (out) && UNARY_P (in))
{
- rtx insn;
rtx op1;
rtx out_moded;
rtx_insn *set;
@@ -8728,13 +8727,13 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
gen_reload (out_moded, op1, opnum, type);
- insn = gen_rtx_SET (out, gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in),
- out_moded));
- insn = emit_insn_if_valid_for_reload (insn);
+ rtx temp = gen_rtx_SET (out, gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in),
+ out_moded));
+ rtx_insn *insn = emit_insn_if_valid_for_reload (temp);
if (insn)
{
set_unique_reg_note (insn, REG_EQUIV, in);
- return as_a <rtx_insn *> (insn);
+ return insn;
}
fatal_insn ("failure trying to reload:", set);
--
2.9.3.dirty
diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c
index 7f53967..6d390ae 100644
--- a/gcc/config/alpha/alpha.c
+++ b/gcc/config/alpha/alpha.c
@@ -1017,7 +1017,8 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
&& GET_MODE_SIZE (mode) <= UNITS_PER_WORD
&& symbolic_operand (x, Pmode))
{
- rtx r0, r16, eqv, tga, tp, insn, dest, seq;
+ rtx r0, r16, eqv, tga, tp, dest, seq;
+ rtx_insn *insn;
switch (tls_symbolic_operand_type (x))
{
@@ -1025,6 +1026,7 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
break;
case TLS_MODEL_GLOBAL_DYNAMIC:
+ {
start_sequence ();
r0 = gen_rtx_REG (Pmode, 0);
@@ -1034,8 +1036,8 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
seq = GEN_INT (alpha_next_sequence_number++);
emit_insn (gen_movdi_er_tlsgd (r16, pic_offset_table_rtx, x, seq));
- insn = gen_call_value_osf_tlsgd (r0, tga, seq);
- insn = emit_call_insn (insn);
+ rtx val = gen_call_value_osf_tlsgd (r0, tga, seq);
+ insn = emit_call_insn (val);
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
@@ -1044,8 +1046,10 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
emit_libcall_block (insn, dest, r0, x);
return dest;
+ }
case TLS_MODEL_LOCAL_DYNAMIC:
+ {
start_sequence ();
r0 = gen_rtx_REG (Pmode, 0);
@@ -1055,8 +1059,8 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
seq = GEN_INT (alpha_next_sequence_number++);
emit_insn (gen_movdi_er_tlsldm (r16, pic_offset_table_rtx, seq));
- insn = gen_call_value_osf_tlsldm (r0, tga, seq);
- insn = emit_call_insn (insn);
+ rtx val = gen_call_value_osf_tlsldm (r0, tga, seq);
+ insn = emit_call_insn (val);
RTL_CONST_CALL_P (insn) = 1;
use_reg (&CALL_INSN_FUNCTION_USAGE (insn), r16);
@@ -1079,12 +1083,13 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
}
if (alpha_tls_size == 32)
{
- insn = gen_rtx_HIGH (Pmode, eqv);
- insn = gen_rtx_PLUS (Pmode, scratch, insn);
+ rtx temp = gen_rtx_HIGH (Pmode, eqv);
+ temp = gen_rtx_PLUS (Pmode, scratch, temp);
scratch = gen_reg_rtx (Pmode);
- emit_insn (gen_rtx_SET (scratch, insn));
+ emit_insn (gen_rtx_SET (scratch, temp));
}
return gen_rtx_LO_SUM (Pmode, scratch, eqv);
+ }
case TLS_MODEL_INITIAL_EXEC:
eqv = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, x), UNSPEC_TPREL);
@@ -1106,10 +1111,10 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode)
emit_insn (gen_get_thread_pointerdi (tp));
if (alpha_tls_size == 32)
{
- insn = gen_rtx_HIGH (Pmode, eqv);
- insn = gen_rtx_PLUS (Pmode, tp, insn);
+ rtx temp = gen_rtx_HIGH (Pmode, eqv);
+ temp = gen_rtx_PLUS (Pmode, tp, temp);
tp = gen_reg_rtx (Pmode);
- emit_insn (gen_rtx_SET (tp, insn));
+ emit_insn (gen_rtx_SET (tp, temp));
}
return gen_rtx_LO_SUM (Pmode, tp, eqv);
@@ -3059,7 +3064,7 @@ static void
alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
int noperands, rtx equiv)
{
- rtx usage = NULL_RTX, tmp, reg;
+ rtx usage = NULL_RTX, reg;
int regno = 16, i;
start_sequence ();
@@ -3109,8 +3114,8 @@ alpha_emit_xfloating_libcall (rtx func, rtx target, rtx operands[],
gcc_unreachable ();
}
- tmp = gen_rtx_MEM (QImode, func);
- tmp = emit_call_insn (gen_call_value (reg, tmp, const0_rtx,
+ rtx mem = gen_rtx_MEM (QImode, func);
+ rtx_insn *tmp = emit_call_insn (gen_call_value (reg, mem, const0_rtx,
const0_rtx, const0_rtx));
CALL_INSN_FUNCTION_USAGE (tmp) = usage;
RTL_CONST_CALL_P (tmp) = 1;
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index ebec68e..99adb74 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3396,10 +3396,11 @@ static GTY(()) rtx mips_tls_symbol;
(either global dynamic or local dynamic). V0 is an RTX for the
return value location. */
-static rtx
+static rtx_insn *
mips_call_tls_get_addr (rtx sym, enum mips_symbol_type type, rtx v0)
{
- rtx insn, loc, a0;
+ rtx loc, a0;
+ rtx_insn *insn;
a0 = gen_rtx_REG (Pmode, GP_ARG_FIRST);
@@ -3455,7 +3456,7 @@ mips_get_tp (void)
static rtx
mips_legitimize_tls_address (rtx loc)
{
- rtx dest, insn, v0, tp, tmp1, tmp2, eqv, offset;
+ rtx dest, v0, tp, tmp1, tmp2, eqv, offset;
enum tls_model model;
model = SYMBOL_REF_TLS_MODEL (loc);
@@ -3468,15 +3469,18 @@ mips_legitimize_tls_address (rtx loc)
switch (model)
{
case TLS_MODEL_GLOBAL_DYNAMIC:
+ {
v0 = gen_rtx_REG (Pmode, GP_RETURN);
- insn = mips_call_tls_get_addr (loc, SYMBOL_TLSGD, v0);
+ rtx_insn *insn = mips_call_tls_get_addr (loc, SYMBOL_TLSGD, v0);
dest = gen_reg_rtx (Pmode);
emit_libcall_block (insn, dest, v0, loc);
break;
+ }
case TLS_MODEL_LOCAL_DYNAMIC:
+ {
v0 = gen_rtx_REG (Pmode, GP_RETURN);
- insn = mips_call_tls_get_addr (loc, SYMBOL_TLSLDM, v0);
+ rtx_insn *insn = mips_call_tls_get_addr (loc, SYMBOL_TLSLDM, v0);
tmp1 = gen_reg_rtx (Pmode);
/* Attach a unique REG_EQUIV, to allow the RTL optimizers to
@@ -3495,6 +3499,7 @@ mips_legitimize_tls_address (rtx loc)
dest = expand_binop (Pmode, add_optab, tmp1, offset,
0, 0, OPTAB_DIRECT);
break;
+ }
case TLS_MODEL_INITIAL_EXEC:
tp = mips_get_tp ();
diff --git a/gcc/optabs.c b/gcc/optabs.c
index a4d7a5e..7a1f025 100644
--- a/gcc/optabs.c
+++ b/gcc/optabs.c
@@ -1712,8 +1712,9 @@ expand_binop (machine_mode mode, optab binoptab, rtx op0, rtx op1,
{
if (optab_handler (mov_optab, mode) != CODE_FOR_nothing)
{
- temp = emit_move_insn (target ? target : product, product);
- set_dst_reg_note (temp,
+ rtx_insn *move = emit_move_insn (target ? target : product,
+ product);
+ set_dst_reg_note (move,
REG_EQUAL,
gen_rtx_fmt_ee (MULT, mode,
copy_rtx (op0),
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 4b9c7c7..876f7ef 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -8703,7 +8703,6 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
#endif
else if (REG_P (out) && UNARY_P (in))
{
- rtx insn;
rtx op1;
rtx out_moded;
rtx_insn *set;
@@ -8728,13 +8727,13 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
gen_reload (out_moded, op1, opnum, type);
- insn = gen_rtx_SET (out, gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in),
+ rtx temp = gen_rtx_SET (out, gen_rtx_fmt_e (GET_CODE (in), GET_MODE (in),
out_moded));
- insn = emit_insn_if_valid_for_reload (insn);
+ rtx_insn *insn = emit_insn_if_valid_for_reload (temp);
if (insn)
{
set_unique_reg_note (insn, REG_EQUIV, in);
- return as_a <rtx_insn *> (insn);
+ return insn;
}
fatal_insn ("failure trying to reload:", set);
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] use rtx_insn * more
2016-10-28 19:04 [PATCH 0/3] use rtx_insn * more tbsaunde+gcc
` (2 preceding siblings ...)
2016-10-28 19:04 ` [PATCH 1/3] use rtx_insn * in various places where it is obvious tbsaunde+gcc
@ 2016-10-31 13:38 ` Jeff Law
2016-11-02 3:56 ` Trevor Saunders
3 siblings, 1 reply; 9+ messages in thread
From: Jeff Law @ 2016-10-31 13:38 UTC (permalink / raw)
To: tbsaunde+gcc, gcc-patches
On 10/28/2016 01:13 PM, tbsaunde+gcc@tbsaunde.org wrote:
> From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
>
> HI,
>
> This series changes various variables type from rtx to rtx_insn * so that the
> remaining patches in this series
> http://gcc.gnu.org/ml/gcc-patches/2016-10/msg01353.html can be applied.
>
> patches bootstrapped and regtested on x86_64-linux-gnu, and run through config-list.mk, ok?
>
> Thanks!
>
> Trev
>
> Trevor Saunders (3):
> use rtx_insn * in various places where it is obvious
> split up the trial variable in reorg.c:relax_delay_slots to use
> rtx_insn * more
> split up some variables to use rtx_insn * more
All 3 patches in this series are fine.
Thanks,
Jeff
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] use rtx_insn * more
2016-10-31 13:38 ` [PATCH 0/3] use rtx_insn * more Jeff Law
@ 2016-11-02 3:56 ` Trevor Saunders
2016-11-02 14:55 ` David Malcolm
0 siblings, 1 reply; 9+ messages in thread
From: Trevor Saunders @ 2016-11-02 3:56 UTC (permalink / raw)
To: Jeff Law; +Cc: tbsaunde+gcc, gcc-patches
On Mon, Oct 31, 2016 at 07:37:54AM -0600, Jeff Law wrote:
> On 10/28/2016 01:13 PM, tbsaunde+gcc@tbsaunde.org wrote:
> > From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
> >
> > HI,
> >
> > This series changes various variables type from rtx to rtx_insn * so that the
> > remaining patches in this series
> > http://gcc.gnu.org/ml/gcc-patches/2016-10/msg01353.html can be applied.
> >
> > patches bootstrapped and regtested on x86_64-linux-gnu, and run through config-list.mk, ok?
> >
> > Thanks!
> >
> > Trev
> >
> > Trevor Saunders (3):
> > use rtx_insn * in various places where it is obvious
> > split up the trial variable in reorg.c:relax_delay_slots to use
> > rtx_insn * more
> > split up some variables to use rtx_insn * more
> All 3 patches in this series are fine.
Thanks for the reviews.
Can I trouble you to look at http://gcc.gnu.org/ml/gcc-patches/2016-10/
now that it is tested on aarch64?
Trev
>
> Thanks,
> Jeff
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] use rtx_insn * more
2016-11-02 3:56 ` Trevor Saunders
@ 2016-11-02 14:55 ` David Malcolm
2016-11-02 16:35 ` Bernd Schmidt
0 siblings, 1 reply; 9+ messages in thread
From: David Malcolm @ 2016-11-02 14:55 UTC (permalink / raw)
To: Trevor Saunders, Jeff Law; +Cc: tbsaunde+gcc, gcc-patches
On Wed, 2016-11-02 at 00:05 -0400, Trevor Saunders wrote:
> On Mon, Oct 31, 2016 at 07:37:54AM -0600, Jeff Law wrote:
> > On 10/28/2016 01:13 PM, tbsaunde+gcc@tbsaunde.org wrote:
> > > From: Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
> > >
> > > HI,
> > >
> > > This series changes various variables type from rtx to rtx_insn *
> > > so that the
> > > remaining patches in this series
> > > http://gcc.gnu.org/ml/gcc-patches/2016-10/msg01353.html can be
> > > applied.
> > >
> > > patches bootstrapped and regtested on x86_64-linux-gnu, and run
> > > through config-list.mk, ok?
> > >
> > > Thanks!
> > >
> > > Trev
> > >
> > > Trevor Saunders (3):
> > > use rtx_insn * in various places where it is obvious
> > > split up the trial variable in reorg.c:relax_delay_slots to use
> > > rtx_insn * more
> > > split up some variables to use rtx_insn * more
> > All 3 patches in this series are fine.
>
> Thanks for the reviews.
>
> Can I trouble you to look at
> http://gcc.gnu.org/ml/gcc-patches/2016-10/
> now that it is tested on aarch64?
I think you're missing the full URL here; the above URL is the index
for all of October.
Did you mean this patch:
https://gcc.gnu.org/ml/gcc-patches/2016-10/msg01358.html
?
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] use rtx_insn * more
2016-11-02 14:55 ` David Malcolm
@ 2016-11-02 16:35 ` Bernd Schmidt
2016-11-02 18:07 ` Trevor Saunders
0 siblings, 1 reply; 9+ messages in thread
From: Bernd Schmidt @ 2016-11-02 16:35 UTC (permalink / raw)
To: David Malcolm, Trevor Saunders, Jeff Law; +Cc: tbsaunde+gcc, gcc-patches
On 11/02/2016 03:55 PM, David Malcolm wrote:
> Did you mean this patch:
> https://gcc.gnu.org/ml/gcc-patches/2016-10/msg01358.html
That one is ok after the test, sorry for not being more clear.
Bernd
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH 0/3] use rtx_insn * more
2016-11-02 16:35 ` Bernd Schmidt
@ 2016-11-02 18:07 ` Trevor Saunders
0 siblings, 0 replies; 9+ messages in thread
From: Trevor Saunders @ 2016-11-02 18:07 UTC (permalink / raw)
To: Bernd Schmidt; +Cc: David Malcolm, Jeff Law, tbsaunde+gcc, gcc-patches
On Wed, Nov 02, 2016 at 05:35:40PM +0100, Bernd Schmidt wrote:
> On 11/02/2016 03:55 PM, David Malcolm wrote:
>
> > Did you mean this patch:
> > https://gcc.gnu.org/ml/gcc-patches/2016-10/msg01358.html
>
> That one is ok after the test, sorry for not being more clear.
ah, no worries :) and sorry about the wrong link.
Trev
>
>
> Bernd
>
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2016-11-02 18:07 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
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2016-10-28 19:04 [PATCH 0/3] use rtx_insn * more tbsaunde+gcc
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2016-10-28 19:04 ` [PATCH 2/3] split up the trial variable in reorg.c:relax_delay_slots " tbsaunde+gcc
2016-10-28 19:04 ` [PATCH 1/3] use rtx_insn * in various places where it is obvious tbsaunde+gcc
2016-10-31 13:38 ` [PATCH 0/3] use rtx_insn * more Jeff Law
2016-11-02 3:56 ` Trevor Saunders
2016-11-02 14:55 ` David Malcolm
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