From: Segher Boessenkool <segher@kernel.crashing.org>
To: Peter Bergner <bergner@vnet.ibm.com>
Cc: GCC Patches <gcc-patches@gcc.gnu.org>,
David Edelsohn <dje.gcc@gmail.com>,
Joseph Myers <joseph@codesourcery.com>
Subject: Re: [PATCH, rs6000] Fix PR78458, LRA ICE building libgcc for powerpc-linux-gnuspe e500v2
Date: Wed, 23 Nov 2016 18:33:00 -0000 [thread overview]
Message-ID: <20161123183317.GC18403@gate.crashing.org> (raw)
In-Reply-To: <cba86d60-f597-177c-bf6b-8fab076b06ca@vnet.ibm.com>
On Wed, Nov 23, 2016 at 12:13:23PM -0600, Peter Bergner wrote:
> --- gcc/config/rs6000/rs6000.h (revision 241976)
> +++ gcc/config/rs6000/rs6000.h (working copy)
> @@ -1279,9 +1279,11 @@ enum data_align { align_abi, align_opt,
> enough space to account for vectors in FP regs. However, TFmode/TDmode
> should not use VSX instructions to do a caller save. */
> #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
> - (TARGET_VSX \
> - && ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \
> - && FP_REGNO_P (REGNO) \
> + (NREGS <= rs6000_hard_regno_nregs[MODE][REGNO] \
> + ? MODE \
Please put parens around NREGS and that last MODE.
> --- gcc/testsuite/gcc.target/powerpc/pr78458.c (revision 0)
> +++ gcc/testsuite/gcc.target/powerpc/pr78458.c (working copy)
> @@ -0,0 +1,15 @@
> +/* { dg-do compile } */
> +/* { dg-options "-mcpu=8548 -mspe -mabi=spe -mlra" } */
> +/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } { "*" } { "" } } */
You don't need the default arguments, FWIW.
Okay for trunk. Thanks!
Segher
next prev parent reply other threads:[~2016-11-23 18:33 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-23 18:13 Peter Bergner
2016-11-23 18:33 ` Segher Boessenkool [this message]
2016-11-24 2:22 ` Peter Bergner
2016-11-23 18:44 ` Joseph Myers
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