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(217.140.96.140) by AM1FFO11FD021.mail.protection.outlook.com (10.174.64.210) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA_P384) id 15.1.734.4 via Frontend Transport; Thu, 8 Dec 2016 10:03:32 +0000 X-IncomingTopHeaderMarker: OriginalChecksum:;UpperCasedChecksum:;SizeAsReceived:1044;Count:15 Received: from arm.com (10.1.2.79) by mail.arm.com (10.1.106.66) with Microsoft SMTP Server id 14.3.294.0; Thu, 8 Dec 2016 10:03:24 +0000 Date: Thu, 08 Dec 2016 10:03:00 -0000 From: James Greenhalgh To: Wilco Dijkstra CC: Richard Earnshaw , GCC Patches , nd , Subject: Re: [PATCH][AArch64] Improve TI mode address offsets Message-ID: <20161208100323.GA9204@arm.com> References: <5ba4a624-d159-c66d-ac16-d6c60f68b2bf@foss.arm.com> <20161206170024.GB29782@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20161206170024.GB29782@arm.com> User-Agent: Mutt/1.5.21 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1;HE1PR08MB0442;3:V86QjUYV5WDau+H28SlDKHufvz0ZhMY6joxcn7R4TWsd6I2yTRC+8JSPZC6FUdDR8tidliXawkzFLHPxTO3G8wgttyMjGBGAW6Z8tVsregaf2oDnHEpabgajrP8IkN5UJDSeoSCU6onZdbBecKcalNTo45Y9gQwI/yOO7PUiGjrxjutSpD/w4gcZ+EGjPN4jL1A9bxzjRBVg5y7BBxuYtSBlSxyyzJegtfY4gAJtDnEwuHZaw0aP3WDxsucw9EgOgmjGLONE+tol4Ztrg65732XqQnLXmLPu06qq3lMVZfy6kFw/1bZ/EzjGUafnaV+SFpnnSwZpbajEj7170SC0+SIuQgkeBbbPiOxA/277/74xiR45bkfE/YJ7emcxmq6yUfD75mVhGvIEbKz7HqoHNg==;25:T62PdpJR1lhx8lt6vH2D8BjyaCMq23jo7V0I4N8KXSxASg3UNdyEoSGRSSh+D4vDJ7z84MPyqOrvwOw0MXH8M/ywJUrbZiArRmjmL0VYOUNkLdCSgyaeGlAPN7ta1HlIys7hhBECIJrGBM4s9E1NTkTtZdYgc815+CI20vhjguYPeq8T5T5NrNfDlKq7VwlG41ypWT67vfjwAbvC2rsyeh23lz4cuHlkbG2gFP7gDwF1XHu9xgeYLv6pkdpCw25RPMRRCh/XgAtRA2Yz0vYPFeKNU0mUSZt1pYXWhBxI/vxAmXhVQIT5xFiA+uHldjXJteFdwtjj3ov5nnXk8BW2HWERI/cQLugwBHaXAw8pV+Ct5T1bis9IKr3LsC5xPJVVfiWVKAfKLWTjKUNofbD2hE+FptZagT3d48ws26OakM656nhUkbG4FVCQoCCbn+pJqs1UbbPovdNxVJi4DxM5Vg== X-Microsoft-Exchange-Diagnostics: 1;HE1PR08MB0442;31:E9bu198Cyl71xJK5OCkOZTJCPDl4GpmKc00v3V3JzdveYk+YE+d9pOAkW252SMAsyMmri4Lg9Q+bxZuvP45iZEsCI5eNyNtYm1Lb6vf0LOh3Xs26S6GuoOUa7ry9XKln5bL4bgRjS4Eh6H7/QOmKyEiTt43DUIKXcZGIJiH2WB7AOVVTMWAgXd9MA+O9O4Kvl+J1tu1japqoQrwzeRxmL5+G6y24nPOG3Ilg9MCiHz5PWH5B7PsBUUnN5fRpbe1gWyQmd3vnJaxQUCWew/+xrn7RBUxCJ3NLJVz1/3T/vKE=;20:WmoMLbpushyRvUguJ2uIXB0rbdyBa41WEVeAM5p9xRFJ39zsR5E5beKLmVgVwlxARkBShanewMbJFoMwk3O8/eLt4/tiKKPXqgTAbfStoNpZ1cvkV6RQdyQqEYu0yMLwU/5nsWHt/wKP1tKqfSU41TK2lfLKdjj2Lvt6zgDIuIyL5VjsNyNyrdcOnWbeX16PNJpn/1GTAdb799zdKkIYLZVY6JfSBjeO0288PedI/ZHAWp+E1gNwKC0YfW3hNjbA NoDisclaimer: True X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(22074186197030)(183786458502308); X-Exchange-Antispam-Report-CFA-Test: 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1;HE1PR08MB0442;4:c58/ASp0t7lv1vwBXohqRIQN1Q+Kha3LWi86B8mhdkH2BcdanCfpSFdt6DYqD8MimSB3NGp0Jg2VAbKPdYQmo7RLEcweSFCqDlD3E8JPXSVr/lLSXpb6xuUWnKx2pAm/5USPUqz6Kv+DZ53Aofxn1iG/XxrNVerTBSaYIfSYEi9PnEorF+pwfLD6GP/XkFKm9/djzudVWi/aVVletD0WjanxH4F5ySddFBp9npyRYKp6R+75yQeq06EJiS6RHI0E/RmoV8Cdi+8/D22/esWMxTyUgmj2OAOofRlcHR7rdWbCug3XxBFAKsbShIUrmlsU5uDsatHQQ91rVbfh5F/+LBSbhFF8e2d3Mzwz6a5xXonSB41mZ2o+rmrgCyPs0or0iBsZJmmEmhQXKwfDs545hi8YR0lnvC56TcGWeEpo3E9NW2bRDgrHr72y51Yhqpz5K13EmV1Eu5kpdj+FYygv+yt1YhPhuWbZZk8Itc5n/8YKmej5L7nmAkcx4QulA8NaVFH7idX5PmZip21hDcKou7Yw/nQxsHosJW9tyHUisBOocdCAplMJ76y/a9iNVlcTOgIj8Ndg1wg6Q8141me/OSiATo3pU7rVHMZkPRlwzf+GnMSLd4st98WCplEA9GwG+fUoPMcSZ+u6TQwtabX2UQYxp/SqNwNeD+390r8osHY4BfNAoFe9mgZ2kR9krqvfxDJcuJdjXgpEm0Lf277juAW8c7ekFDVW2USWcRSx2Y955eOLrTMDNU70Jo33Kno2ecCQd3Rq9b1CCeF2jkFbNA== X-Forefront-PRVS: 0150F3F97D X-Microsoft-Exchange-Diagnostics: =?iso-8859-1?Q?1;HE1PR08MB0442;23:B6y7dP8tf6f9/RiS3uEqZNQ9Nv8il5Aadddbey7?= =?iso-8859-1?Q?6xoH92Zm1/oc1lrkE08ssj7c6DRRu5dS8tn9dqPQK/MbjYQlT+0ozseBNr?= =?iso-8859-1?Q?sTqjq9nruLvdHJnJZejxnm2AWnET66QZvdurtynmIZ6yHG9+vdrOEefAqM?= =?iso-8859-1?Q?hGz6Dyqdr8Ie1Kz75T1mUPqaWYXxJ6P0Bih1H8qpvf+Otxik594/ZDdTQt?= =?iso-8859-1?Q?T601yLJkll4ppmJHH4ipeOXDuMWh1RI6vn8waTMxLMeBI3WTV6I9WJfy2S?= =?iso-8859-1?Q?YgwF3Uxzi0JcJFdtDACYOOcac/dWWLAqiLDgqnsM8+e8W0xjZq5IevyQGh?= =?iso-8859-1?Q?DwTIjjuMpUKTQzi0Qp3i1O/MA0VQqJE6A9kv72j5ZKNrhdPTUVO+mMlriB?= =?iso-8859-1?Q?vSO9idosiuoPDAhx/Yt4audrPZIvGKNJHv2Q6qVMMu6/wq7332+/wAV3x2?= =?iso-8859-1?Q?Uz3UIo3EU4Cl8YwkdGoVNMOS6fpBTbhhVCo+9F5yIDuQB0KwlNx3fafiNz?= =?iso-8859-1?Q?58f0cDR00o+9zdCnRce1dw1r4v4XGVga3/RrPL8358E+RKXo6mLfvFFiRW?= =?iso-8859-1?Q?bfsC+T7+05O+8CQb2E/4H/no/rMItrZddXAzZpwIcdxpDnbG8T5CWIZ6hU?= =?iso-8859-1?Q?kdyQDYI+XEit2jRPlUco46aCY17//OME3oIeK5ppMHKiXDc9TUtZKfc5+/?= =?iso-8859-1?Q?LX/qUrgIKCBL9Rl3VzcJtOtVCu2ZWtHru9rh3qLa5hiyRBndGa9dJEl6iS?= =?iso-8859-1?Q?jas2LNHQHtq2g5VV9XwAClybMauaDrHkoGYeL4gp/s5CMXgcE3dtplY+uZ?= =?iso-8859-1?Q?RCIIqQVWXDI4rC/1XPUcur0qNKE1WlnWjU6SdAM811bMWbJr9Y6J0Yru+P?= =?iso-8859-1?Q?pwuCNDsjbm+eiDLrMeNTJNhUWol98xketUoNbQW0nBlDbTtiX/Xern+Qaz?= =?iso-8859-1?Q?H3J14TTm84/bhUcwpYgVG/7pG/vdbipsovZn5efR+EYDNNdwJkpPMEMtJA?= =?iso-8859-1?Q?Jb9YPJ+9dbdhmyvksEb0Xrc7EiXd1za8dC+wbGVDm+xAe/DQJ0kste52vQ?= =?iso-8859-1?Q?fBb9cjdRxENmahEcNI56+ha4mup5kuBdHdL0U4MLuzEUWwMXypVo7xwTHp?= =?iso-8859-1?Q?3dn1020oip/Ewg/FKHAwZX6keoZneQC0ba1sdF18vCq4JyAz6wIdtP+7wI?= =?iso-8859-1?Q?yNtcg7FV55dL7jRmBgjYPnj1gMZCUxtZcLUzT24yjmUyInyUcc8mRhvoGF?= =?iso-8859-1?Q?TKK89eg9oJAzptpMGn8TqFhBl+MsuEj+j5c1bzg=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1;HE1PR08MB0442;6:6nsMnUiST0lvGbOaIh3N+mh5VKZ5b12T54jwzb1RqHmVI/qy2ubVZ4MrCZAxb0vp6Bf7pqt153HwPLYkXwXQblHMTPOYjZVA6cuqsU+78NkJlRg4neAznNQrvzWpYSXfVvNloj9QV+AyRICPmJ2sGI3F2e/qgiUX+LQfrQrH/Kt5sR42kDgRMFGvASmbJEqgcGR5b/RtLrXozxqXYLnM8+6j+weLKKm09USqXamzMIoruQAOsFGN7N3XAMciExoVIutRKtbBY3o3wYbUwz27Y+aO5J1MUP7z/w3PvfxYt8MlGm/sL1+y3yYUU6gv9Y+frPPveaJkpLmf0ZcwvDHAPXTA9mmC6A/zVJUvdom0OUAdQEQ/oUjGABGRrKJSZB23Fm/uHC0Oba8hGOw96yesxcrsc7whfEMyvgSbwgi/LBiLQidyZUM46pZkflL65ANXtZDjKZsnZYtP45LIc28ecQ==;5:JvOqYY4vwpM6GtgiyI41GVsy49w6wCcrXegv9axTEOZcDwysfOLepvFb1gjOvbVZgYg2dijJOZ5ZNPW1f90+l3/1IuBGQYCGgBQDPVbLEzd+YdPr8jFKEceefplMNgsrpY+Ebg8fjpAW1DCWglrKLhDrfY2IDLgxVfLh/F1Hmds=;24:6BY4hLi5BQyMxjvKJLQ4lir4is74AyoK1LzyDBX4jOCxB3yUonjJKzsxQEvqWA8V5PyiB0JY/cal+2rrI93+EzqSZUGITUKJzK7UANGcBWg= SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 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Tue, Dec 06, 2016 at 05:00:25PM +0000, James Greenhalgh wrote: > On Fri, Nov 11, 2016 at 01:14:15PM +0000, Wilco Dijkstra wrote: > > Richard Earnshaw wrote: > > > > > Has this patch been truncated?  The last line above looks to be part-way > > > through a hunk. > > > > Oops sorry, it seems the last few lines are missing. Here is the full version: > > OK. This patch has caused around 250 new failures when using the tiny memory model or when using -mfix-cortex-a53-843419 (causing a bootstrap failure with --enable-fix-cortex-a53-843419 ) See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78733 for more details. Thanks, James > > > > diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c > > index 3045e6d6447d5c1860feb51708eeb2a21d2caca9..45f44e96ba9e9d3c8c41d977aa509fa13398a8fd 100644 > > --- a/gcc/config/aarch64/aarch64.c > > +++ b/gcc/config/aarch64/aarch64.c > > @@ -4066,7 +4066,8 @@ aarch64_classify_address (struct aarch64_address_info *info, > > instruction memory accesses. */ > > if (mode == TImode || mode == TFmode) > > return (aarch64_offset_7bit_signed_scaled_p (DImode, offset) > > - && offset_9bit_signed_unscaled_p (mode, offset)); > > + && (offset_9bit_signed_unscaled_p (mode, offset) > > + || offset_12bit_unsigned_scaled_p (mode, offset))); > > > > /* A 7bit offset check because OImode will emit a ldp/stp > > instruction (only big endian will get here). > > @@ -4270,18 +4271,19 @@ aarch64_legitimate_address_p (machine_mode mode, rtx x, > > /* Split an out-of-range address displacement into a base and offset. > > Use 4KB range for 1- and 2-byte accesses and a 16KB range otherwise > > to increase opportunities for sharing the base address of different sizes. > > - For TI/TFmode and unaligned accesses use a 256-byte range. */ > > + For unaligned accesses and TI/TF mode use the signed 9-bit range. */ > > static bool > > aarch64_legitimize_address_displacement (rtx *disp, rtx *off, machine_mode mode) > > { > > - HOST_WIDE_INT mask = GET_MODE_SIZE (mode) < 4 ? 0xfff : 0x3fff; > > + HOST_WIDE_INT offset = INTVAL (*disp); > > + HOST_WIDE_INT base = offset & ~(GET_MODE_SIZE (mode) < 4 ? 0xfff : 0x3ffc); > > > > - if (mode == TImode || mode == TFmode || > > - (INTVAL (*disp) & (GET_MODE_SIZE (mode) - 1)) != 0) > > - mask = 0xff; > > + if (mode == TImode || mode == TFmode > > + || (offset & (GET_MODE_SIZE (mode) - 1)) != 0) > > + base = (offset + 0x100) & ~0x1ff; > > > > - *off = GEN_INT (INTVAL (*disp) & ~mask); > > - *disp = GEN_INT (INTVAL (*disp) & mask); > > + *off = GEN_INT (base); > > + *disp = GEN_INT (offset - base); > > return true; > > } > > > > @@ -5148,12 +5150,10 @@ aarch64_legitimize_address (rtx x, rtx /* orig_x */, machine_mode mode) > > x = gen_rtx_PLUS (Pmode, base, offset_rtx); > > } > > > > - /* Does it look like we'll need a load/store-pair operation? */ > > + /* Does it look like we'll need a 16-byte load/store-pair operation? */ > > HOST_WIDE_INT base_offset; > > - if (GET_MODE_SIZE (mode) > 16 > > - || mode == TImode) > > - base_offset = ((offset + 64 * GET_MODE_SIZE (mode)) > > - & ~((128 * GET_MODE_SIZE (mode)) - 1)); > > + if (GET_MODE_SIZE (mode) > 16) > > + base_offset = (offset + 0x400) & ~0x7f0; > > /* For offsets aren't a multiple of the access size, the limit is > > -256...255. */ > > else if (offset & (GET_MODE_SIZE (mode) - 1)) > > @@ -5167,6 +5167,8 @@ aarch64_legitimize_address (rtx x, rtx /* orig_x */, machine_mode mode) > > /* Small negative offsets are supported. */ > > else if (IN_RANGE (offset, -256, 0)) > > base_offset = 0; > > + else if (mode == TImode || mode == TFmode) > > + base_offset = (offset + 0x100) & ~0x1ff; > > /* Use 12-bit offset by access size. */ > > else > > base_offset = offset & (~0xfff * GET_MODE_SIZE (mode)); > > diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md > > index 24b7288976dd0452f41475e40f02750fc56a2a20..62eda569f9b642ac569a61718d7debf7eae1b59e 100644 > > --- a/gcc/config/aarch64/aarch64.md > > +++ b/gcc/config/aarch64/aarch64.md > > @@ -1094,9 +1094,9 @@ > > > > (define_insn "*movti_aarch64" > > [(set (match_operand:TI 0 > > - "nonimmediate_operand" "=r, *w,r ,*w,r ,Ump,Ump,*w,m") > > + "nonimmediate_operand" "=r, *w,r ,*w,r,m,m,*w,m") > > (match_operand:TI 1 > > - "aarch64_movti_operand" " rn,r ,*w,*w,Ump,r ,Z , m,*w"))] > > + "aarch64_movti_operand" " rn,r ,*w,*w,m,r,Z, m,*w"))] > > "(register_operand (operands[0], TImode) > > || aarch64_reg_or_zero (operands[1], TImode))" > > "@ > > @@ -1211,9 +1211,9 @@ > > > > (define_insn "*movtf_aarch64" > > [(set (match_operand:TF 0 > > - "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r ,Ump,Ump") > > + "nonimmediate_operand" "=w,?&r,w ,?r,w,?w,w,m,?r,m ,m") > > (match_operand:TF 1 > > - "general_operand" " w,?r, ?r,w ,Y,Y ,m,w,Ump,?r ,Y"))] > > + "general_operand" " w,?r, ?r,w ,Y,Y ,m,w,m ,?r,Y"))] > > "TARGET_FLOAT && (register_operand (operands[0], TFmode) > > || aarch64_reg_or_fp_zero (operands[1], TFmode))" > > "@ > >