* [PATCH, rs6000] Fold vector subtract built-ins in GIMPLE
@ 2016-12-19 17:01 Will Schmidt
2016-12-19 17:50 ` Segher Boessenkool
0 siblings, 1 reply; 2+ messages in thread
From: Will Schmidt @ 2016-12-19 17:01 UTC (permalink / raw)
To: GCC Patches; +Cc: Bill Schmidt, David Edelsohn, Segher Boessenkool
Hi,
This patch implements folding of the vector subtract built-ins. This
follows the form used by Bill in his previous "Fold vector addition
built-ins in GIMPLE" patch. :-)
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Is this ok for trunk?
Thanks,
-Will
[gcc]
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling for
early expansion of vector subtract builtins.
[gcc/testsuite]
2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/fold-vec-sub-char.c: New.
* gcc.target/powerpc/fold-vec-sub-float.c: New.
* gcc.target/powerpc/fold-vec-sub-floatdouble.c: New.
* gcc.target/powerpc/fold-vec-sub-int.c: New.
* gcc.target/powerpc/fold-vec-sub-int128.c: New.
* gcc.target/powerpc/fold-vec-sub-longlong.c: New.
* gcc.target/powerpc/fold-vec-sub-short.c: New.
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f0c1354..0ab8de3 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -16492,6 +16492,24 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
gsi_replace (gsi, g, true);
return true;
}
+ /* Flavors of vec_sub. We deliberately don't expand
+ P8V_BUILTIN_VSUBUQM. */
+ case ALTIVEC_BUILTIN_VSUBUBM:
+ case ALTIVEC_BUILTIN_VSUBUHM:
+ case ALTIVEC_BUILTIN_VSUBUWM:
+ case P8V_BUILTIN_VSUBUDM:
+ case ALTIVEC_BUILTIN_VSUBFP:
+ case VSX_BUILTIN_XVSUBDP:
+ {
+ arg0 = gimple_call_arg (stmt, 0);
+ arg1 = gimple_call_arg (stmt, 1);
+ lhs = gimple_call_lhs (stmt);
+ gimple *g = gimple_build_assign (lhs, MINUS_EXPR, arg0, arg1);
+ gimple_set_location (g, gimple_location (stmt));
+ gsi_replace (gsi, g, true);
+ return true;
+ }
+
default:
break;
}
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-char.c
new file mode 100644
index 0000000..5063bd8
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-char.c
@@ -0,0 +1,46 @@
+/* Verify that overloaded built-ins for vec_sub with char
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec" } */
+
+#include <altivec.h>
+
+vector signed char
+test1 (vector bool char x, vector signed char y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed char
+test2 (vector signed char x, vector bool char y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed char
+test3 (vector signed char x, vector signed char y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned char
+test4 (vector bool char x, vector unsigned char y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned char
+test5 (vector unsigned char x, vector bool char y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned char
+test6 (vector unsigned char x, vector unsigned char y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vsububm" 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-float.c
new file mode 100644
index 0000000..8a29def
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-float.c
@@ -0,0 +1,17 @@
+/* Verify that overloaded built-ins for vec_sub with float
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -mno-vsx" } */
+
+#include <altivec.h>
+
+vector float
+test1 (vector float x, vector float y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vsubfp" 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
new file mode 100644
index 0000000..c29acc9
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
@@ -0,0 +1,23 @@
+/* Verify that overloaded built-ins for vec_sub with float and
+ double inputs for VSX produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-maltivec -mvsx" } */
+
+#include <altivec.h>
+
+vector float
+test1 (vector float x, vector float y)
+{
+ return vec_sub (x, y);
+}
+
+vector double
+test2 (vector double x, vector double y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "xvsubsp" 1 } } */
+/* { dg-final { scan-assembler-times "xvsubdp" 1 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-int.c
new file mode 100644
index 0000000..1fac1dc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-int.c
@@ -0,0 +1,47 @@
+/* Verify that overloaded built-ins for vec_sub with int
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec" } */
+
+#include <altivec.h>
+
+vector signed int
+test1 (vector bool int x, vector signed int y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed int
+test2 (vector signed int x, vector bool int y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed int
+test3 (vector signed int x, vector signed int y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned int
+test4 (vector bool int x, vector unsigned int y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned int
+test5 (vector unsigned int x, vector bool int y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned int
+test6 (vector unsigned int x, vector unsigned int y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vsubuwm" 6 } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-int128.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-int128.c
new file mode 100644
index 0000000..13caa9e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-int128.c
@@ -0,0 +1,24 @@
+/* Verify that overloaded built-ins for vec_sub with __int128
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-require-effective-target int128 } */
+/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
+
+#include "altivec.h"
+
+vector signed __int128
+test1 (vector signed __int128 x, vector signed __int128 y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned __int128
+test2 (vector unsigned __int128 x, vector unsigned __int128 y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vsubuqm" 2 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-longlong.c
new file mode 100644
index 0000000..889fba4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-longlong.c
@@ -0,0 +1,47 @@
+/* Verify that overloaded built-ins for vec_sub with long long
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+
+#include <altivec.h>
+
+vector signed long long
+test1 (vector bool long long x, vector signed long long y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed long long
+test2 (vector signed long long x, vector bool long long y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed long long
+test3 (vector signed long long x, vector signed long long y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned long long
+test4 (vector bool long long x, vector unsigned long long y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned long long
+test5 (vector unsigned long long x, vector bool long long y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned long long
+test6 (vector unsigned long long x, vector unsigned long long y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vsubudm" 6 } } */
+
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-short.c
new file mode 100644
index 0000000..67052a2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-short.c
@@ -0,0 +1,47 @@
+/* Verify that overloaded built-ins for vec_sub with short
+ inputs produce the right results. */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec" } */
+
+#include <altivec.h>
+
+vector signed short
+test1 (vector bool short x, vector signed short y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed short
+test2 (vector signed short x, vector bool short y)
+{
+ return vec_sub (x, y);
+}
+
+vector signed short
+test3 (vector signed short x, vector signed short y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned short
+test4 (vector bool short x, vector unsigned short y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned short
+test5 (vector unsigned short x, vector bool short y)
+{
+ return vec_sub (x, y);
+}
+
+vector unsigned short
+test6 (vector unsigned short x, vector unsigned short y)
+{
+ return vec_sub (x, y);
+}
+
+/* { dg-final { scan-assembler-times "vsubuhm" 6 } } */
+
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH, rs6000] Fold vector subtract built-ins in GIMPLE
2016-12-19 17:01 [PATCH, rs6000] Fold vector subtract built-ins in GIMPLE Will Schmidt
@ 2016-12-19 17:50 ` Segher Boessenkool
0 siblings, 0 replies; 2+ messages in thread
From: Segher Boessenkool @ 2016-12-19 17:50 UTC (permalink / raw)
To: Will Schmidt; +Cc: GCC Patches, Bill Schmidt, David Edelsohn
Hi, uh, Will,
On Mon, Dec 19, 2016 at 11:01:08AM -0600, Will Schmidt wrote:
> This patch implements folding of the vector subtract built-ins. This
> follows the form used by Bill in his previous "Fold vector addition
> built-ins in GIMPLE" patch. :-)
>
> Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
> regressions. Is this ok for trunk?
This looks fine. Yes, okay for trunk. Thanks,
Segher
> 2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
>
> * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling for
> early expansion of vector subtract builtins.
>
> [gcc/testsuite]
>
> 2016-12-19 Will Schmidt <will_schmidt@vnet.ibm.com>
>
> * gcc.target/powerpc/fold-vec-sub-char.c: New.
> * gcc.target/powerpc/fold-vec-sub-float.c: New.
> * gcc.target/powerpc/fold-vec-sub-floatdouble.c: New.
> * gcc.target/powerpc/fold-vec-sub-int.c: New.
> * gcc.target/powerpc/fold-vec-sub-int128.c: New.
> * gcc.target/powerpc/fold-vec-sub-longlong.c: New.
> * gcc.target/powerpc/fold-vec-sub-short.c: New.
^ permalink raw reply [flat|nested] 2+ messages in thread
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