From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 77381 invoked by alias); 30 Mar 2017 20:38:44 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 77366 invoked by uid 89); 30 Mar 2017 20:38:44 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.9 required=5.0 tests=BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 30 Mar 2017 20:38:42 +0000 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A6A5480503 for ; Thu, 30 Mar 2017 20:38:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com A6A5480503 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=jakub@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com A6A5480503 Received: from tucnak.zalov.cz (ovpn-116-72.ams2.redhat.com [10.36.116.72]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 4CD5078C17; Thu, 30 Mar 2017 20:38:42 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id v2UKceWK031781; Thu, 30 Mar 2017 22:38:40 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id v2UKcdNj031780; Thu, 30 Mar 2017 22:38:39 +0200 Date: Thu, 30 Mar 2017 21:33:00 -0000 From: Jakub Jelinek To: Jeff Law , Bernd Schmidt Cc: gcc-patches@gcc.gnu.org Subject: [PATCH] Fix expansion ICE on stores into parts of hard registers (PR middle-end/80173) Message-ID: <20170330203839.GP17461@tucnak> Reply-To: Jakub Jelinek MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.7.1 (2016-10-04) X-IsSubscribed: yes X-SW-Source: 2017-03/txt/msg01538.txt.bz2 Hi! On some arches like x86_64 we allow some aggregates in named register variables. If those registers are wider than word, store_bit_field_1 was assuming it must be multiple registers and attempted to pick a word sized subregister of it, which is fine for pseudos, but if the destination is a hard register, sometimes such subreg will fail. If it is a hard register and we know that its mode means a single register (otherwise we wouldn't allow creating a named register variable for it), then that subreg is certainly counter-productive, we just want to store into the whole register. Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk? 2017-03-30 Jakub Jelinek PR middle-end/80173 * expmed.c (store_bit_field_1): Don't attempt to create a word subreg out of hard registers wider than word if they have HARD_REGNO_NREGS of 1 for their mode. * gcc.target/i386/pr80173.c: New test. --- gcc/expmed.c.jj 2017-01-01 12:45:39.000000000 +0100 +++ gcc/expmed.c 2017-03-30 14:51:01.814449691 +0200 @@ -965,8 +965,14 @@ store_bit_field_1 (rtx str_rtx, unsigned } /* If OP0 is a multi-word register, narrow it to the affected word. - If the region spans two words, defer to store_split_bit_field. */ - if (!MEM_P (op0) && GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD) + If the region spans two words, defer to store_split_bit_field. + Don't do this if op0 is a single hard register wider than word + such as a float or vector register. */ + if (!MEM_P (op0) + && GET_MODE_SIZE (GET_MODE (op0)) > UNITS_PER_WORD + && (!REG_P (op0) + || !HARD_REGISTER_P (op0) + || HARD_REGNO_NREGS (REGNO (op0), GET_MODE (op0)) != 1)) { if (bitnum % BITS_PER_WORD + bitsize > BITS_PER_WORD) { --- gcc/testsuite/gcc.target/i386/pr80173.c.jj 2017-03-30 15:05:49.600889474 +0200 +++ gcc/testsuite/gcc.target/i386/pr80173.c 2017-03-30 15:05:33.000000000 +0200 @@ -0,0 +1,22 @@ +/* PR middle-end/80173 */ +/* { dg-do compile { target lp64 } } */ +/* { dg-options "-O2 -ffixed-xmm7" } */ + +typedef int V __attribute__ ((vector_size (2 * sizeof (int)))); + +struct U { V a; V b; }; + +int +foo (int i) +{ + register struct U u asm ("xmm7") = {{-1, 0}, {-1, 0}}; + return u.b[i]; +} + +int +bar (int i) +{ + register struct U u asm ("xmm7"); + u = (struct U) {{-1, 0}, {-1, 0}}; + return u.b[i]; +} Jakub