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From: Jakub Jelinek <jakub@redhat.com>
To: Uros Bizjak <ubizjak@gmail.com>
Cc: gcc-patches@gcc.gnu.org
Subject: [PATCH] Don't error about x86 return value in SSE reg (or x86 reg) or argument in SSE reg too early (PR target/80298)
Date: Tue, 04 Apr 2017 19:24:00 -0000	[thread overview]
Message-ID: <20170404192447.GL17461@tucnak> (raw)

Hi!

aggregate_value_p is called often very early during compilation, e.g.
from allocate_function or during gimplification of a call with lhs.
The problem with that is e.g. that on x86_64 -m64 -mno-sse we can't
include <x86intrin.h>, because the always_inline inline functions
in mmx and 3dnow intrinsic headers return __m64 or take __m64 as arguments
and that in the 64-bit ABI is in SSE register.

The following patch makes sure we diagnose this only later (e.g. when
expanding a function to RTL or when expanding calls to other functions),
which means we don't diagnose e.g. inline functions that got successfully
inlined (because then there is really no function return in SSE or x87
reg) or e.g. for builtin calls if they are emitted inline rather than
as a library call (again, I think that is desirable).
I had to tweak a few tests because the reported line changed slightly,
and in the last test add -fno-builtin-fminl, because otherwise fminl
is expanded inline and again there is no call left with the problem.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2017-04-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/80298
	* config/i386/i386.c (construct_container): Postpone errors about
	return values or arguments in SSE or x87 registers with those
	disabled until inlining is done.

	* gcc.target/i386/pr80298-1.c: New test.
	* gcc.target/i386/pr80298-2.c: New test.
	* gcc.target/i386/pr57655.c: Adjust expected diagnostic line.
	* gcc.target/i386/pr59794-6.c: Likewise.
	* gcc.target/i386/pr70738-1.c: Likewise.  Add -Wno-psabi to
	dg-options.
	* gcc.target/i386/pr68473-1.c: Add -fno-builtin-fminl to dg-options.

--- gcc/config/i386/i386.c.jj	2017-04-04 19:51:33.661684106 +0200
+++ gcc/config/i386/i386.c	2017-04-04 20:45:42.573366752 +0200
@@ -9330,7 +9330,12 @@ construct_container (machine_mode mode,
      some less clueful developer tries to use floating-point anyway.  */
   if (needed_sseregs && !TARGET_SSE)
     {
-      if (in_return)
+      /* Don't diagnose anything until after inlining, we might have
+	 functions with such arguments that are just always inlined
+	 and don't really need SSE returns or arguments.  */
+      if (symtab->state < IPA_SSA_AFTER_INLINING)
+        ;
+      else if (in_return)
 	{
 	  if (!issued_sse_ret_error)
 	    {
@@ -9354,7 +9359,11 @@ construct_container (machine_mode mode,
 	  || regclass[i] == X86_64_X87UP_CLASS
 	  || regclass[i] == X86_64_COMPLEX_X87_CLASS)
 	{
-	  if (!issued_x87_ret_error)
+	  /* Don't diagnose anything until after inlining, we might have
+	     functions with such arguments that are just always inlined
+	     and don't really need x87 returns.  */
+	  if (symtab->state >= IPA_SSA_AFTER_INLINING
+	      && !issued_x87_ret_error)
 	    {
 	      error ("x87 register return with x87 disabled");
 	      issued_x87_ret_error = true;
--- gcc/testsuite/gcc.target/i386/pr80298-1.c.jj	2017-04-04 20:45:42.574366739 +0200
+++ gcc/testsuite/gcc.target/i386/pr80298-1.c	2017-04-04 20:45:42.574366739 +0200
@@ -0,0 +1,7 @@
+/* PR target/80298 */
+/* { dg-do compile } */
+/* { dg-options "-mno-sse -mmmx" } */
+
+#include <x86intrin.h>
+
+int i;
--- gcc/testsuite/gcc.target/i386/pr80298-2.c.jj	2017-04-04 20:45:42.574366739 +0200
+++ gcc/testsuite/gcc.target/i386/pr80298-2.c	2017-04-04 20:45:42.574366739 +0200
@@ -0,0 +1,7 @@
+/* PR target/80298 */
+/* { dg-do compile } */
+/* { dg-options "-mno-sse -mmmx -O2" } */
+
+#include <x86intrin.h>
+
+int i;
--- gcc/testsuite/gcc.target/i386/pr57655.c.jj	2016-05-22 12:20:31.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/pr57655.c	2017-04-04 20:48:31.867154730 +0200
@@ -1,7 +1,7 @@
 /* { dg-do compile } */
 /* { dg-options "-mavx -mvzeroupper -mno-fp-ret-in-387" }
 
-/* { dg-error "x87 register return with x87 disabled" "" { target { ! ia32 } } 8 } */
+/* { dg-error "x87 register return with x87 disabled" "" { target { ! ia32 } } 7 } */
 
 long double
 foo (long double x)
--- gcc/testsuite/gcc.target/i386/pr59794-6.c.jj	2014-01-15 08:11:25.000000000 +0100
+++ gcc/testsuite/gcc.target/i386/pr59794-6.c	2017-04-04 20:49:21.820502031 +0200
@@ -8,7 +8,7 @@ typedef int __v4si __attribute__ ((__vec
 extern __v4si x;
 
 __v4si
-foo (void)
-{ /* { dg-error "SSE register return with SSE disabled" } */
+foo (void) /* { dg-error "SSE register return with SSE disabled" } */
+{
   return x;
 }
--- gcc/testsuite/gcc.target/i386/pr70738-1.c.jj	2016-05-26 10:37:56.000000000 +0200
+++ gcc/testsuite/gcc.target/i386/pr70738-1.c	2017-04-04 20:54:32.750439367 +0200
@@ -1,9 +1,9 @@
 /* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-msse2 -mgeneral-regs-only" } */
+/* { dg-options "-msse2 -mgeneral-regs-only -Wno-psabi" } */
 
 typedef int int32x2_t __attribute__ ((__vector_size__ ((8))));
 
-int32x2_t test (int32x2_t a, int32x2_t b)
-{ /* { dg-error "SSE register return with SSE disabled" } */
+int32x2_t test (int32x2_t a, int32x2_t b) /* { dg-error "SSE register return with SSE disabled" } */
+{
   return a + b;
 }
--- gcc/testsuite/gcc.target/i386/pr68473-1.c.jj	2015-12-31 01:11:11.000000000 +0100
+++ gcc/testsuite/gcc.target/i386/pr68473-1.c	2017-04-04 21:08:26.668514992 +0200
@@ -1,5 +1,5 @@
 /* { dg-do compile { target { ! ia32 } } } */
-/* { dg-options "-fdiagnostics-show-caret -mno-fp-ret-in-387" } */
+/* { dg-options "-fdiagnostics-show-caret -mno-fp-ret-in-387 -fno-builtin-fminl" } */
 
 extern long double fminl (long double __x, long double __y);
 

	Jakub

             reply	other threads:[~2017-04-04 19:24 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-04 19:24 Jakub Jelinek [this message]
2017-04-05  7:42 ` Uros Bizjak
2017-04-05  8:00   ` Jakub Jelinek
2017-04-05  8:12     ` Uros Bizjak
2017-04-05  8:20       ` Jakub Jelinek
2017-04-05  8:26         ` Uros Bizjak
2017-04-05  8:29           ` Jakub Jelinek
2017-04-05 15:37             ` Uros Bizjak
2017-04-06 18:37               ` Uros Bizjak

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