From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 102708 invoked by alias); 6 Apr 2017 08:48:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 101698 invoked by uid 89); 6 Apr 2017 08:48:29 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Apr 2017 08:48:28 +0000 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7E2C580F98; Thu, 6 Apr 2017 08:48:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 7E2C580F98 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=jakub@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 7E2C580F98 Received: from tucnak.zalov.cz (ovpn-116-72.ams2.redhat.com [10.36.116.72]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 23FB485F9A; Thu, 6 Apr 2017 08:48:27 +0000 (UTC) Received: from tucnak.zalov.cz (localhost [127.0.0.1]) by tucnak.zalov.cz (8.15.2/8.15.2) with ESMTP id v368mPv3019716; Thu, 6 Apr 2017 10:48:26 +0200 Received: (from jakub@localhost) by tucnak.zalov.cz (8.15.2/8.15.2/Submit) id v368mPYs019715; Thu, 6 Apr 2017 10:48:25 +0200 Date: Thu, 06 Apr 2017 08:48:00 -0000 From: Jakub Jelinek To: Uros Bizjak Cc: Kirill Yukhin , "gcc-patches@gcc.gnu.org" Subject: Re: [PATCH] Fix MMX/SSE/AVX* shifts by non-immediate scalar (PR target/80286) Message-ID: <20170406084824.GC17461@tucnak> Reply-To: Jakub Jelinek References: <20170403203437.GF17461@tucnak> <20170404120039.GG17461@tucnak> <20170404150905.GI17461@tucnak> <20170406084007.GB17461@tucnak> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170406084007.GB17461@tucnak> User-Agent: Mutt/1.7.1 (2016-10-04) X-IsSubscribed: yes X-SW-Source: 2017-04/txt/msg00270.txt.bz2 On Thu, Apr 06, 2017 at 10:40:07AM +0200, Jakub Jelinek wrote: > On Thu, Apr 06, 2017 at 09:33:58AM +0200, Uros Bizjak wrote: > > Newly introduced alternatives (x/x) and (v/v) are valid also for > > 32-bit targets, so we have to adjust insn constraint of > > *vec_extractv4si_0_zext and enable alternatives accordingly. After the > > That is true. But if we provide just the x/x and v/v alternatives in > *vec_extractv4si_0_zext, then it will be forced to always do the zero > extraction on the SSE registers in 32-bit mode. Is that what we want? Also, I think we can do the zero extension even without SSE4.1, if we have a spare SSE register (or before reload), we can use pxor into that scratch reg and punpck* it, if we don't, we can construct a V4SI constaint in memory with { -1, 0, 0, 0 } or so and and with that. Jakub