From: Prakhar Bahuguna <prakhar.bahuguna@arm.com>
To: <gcc-patches@gcc.gnu.org>
Cc: <nd@arm.com>, <Richard.Earnshaw@arm.com>,
<Ramana.Radhakrishnan@arm.com>, <Kyrylo.Tkachov@arm.com>
Subject: Re: [PATCH, GCC/ARM, Stage 1] Rename FPSCR builtins to correct names
Date: Mon, 10 Apr 2017 12:26:00 -0000 [thread overview]
Message-ID: <20170410122603.ftliynfjcrcrbc7n@e107464-lin.cambridge.arm.com> (raw)
In-Reply-To: <20170322104630.z7g7nk6sv2xdzhad@e107464-lin.cambridge.arm.com>
On 22/03/2017 10:46:30, Prakhar Bahuguna wrote:
> The GCC documentation in section 6.60.8 ARM Floating Point Status and Control
> Intrinsics states that the FPSCR register can be read and written to using the
> intrinsics __builtin_arm_get_fpscr and __builtin_arm_set_fpscr. However, these
> are misnamed within GCC itself and these intrinsic names are not recognised.
> This patch corrects the intrinsic names to match the documentation, and adds
> tests to verify these intrinsics generate the correct instructions.
>
> Testing done: Ran regression tests on arm-none-eabi for Cortex-M4.
>
> 2017-03-09 Prakhar Bahuguna <prakhar.bahuguna@arm.com>
>
> gcc/ChangeLog:
>
> * gcc/config/arm/arm-builtins.c (arm_init_builtins): Rename
> __builtin_arm_ldfscr to __builtin_arm_get_fpscr, and rename
> __builtin_arm_stfscr to __builtin_arm_set_fpscr.
> * gcc/testsuite/gcc.target/arm/fpscr.c: New file.
>
> Okay for stage 1?
>
> --
>
> Prakhar Bahuguna
Bumping, could I get a review for this please?
Thanks,
--
Prakhar Bahuguna
next prev parent reply other threads:[~2017-04-10 12:26 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-22 10:46 Prakhar Bahuguna
2017-04-10 12:26 ` Prakhar Bahuguna [this message]
2017-04-10 14:01 ` Kyrill Tkachov
2017-06-20 13:49 ` [arm-embedded] " Thomas Preudhomme
2017-06-23 15:49 ` Thomas Preudhomme
2017-06-23 15:54 ` Kyrill Tkachov
2017-06-23 19:10 ` Christophe Lyon
2017-06-26 11:20 ` Thomas Preudhomme
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