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* [PATCH] S/390: PR79895: Fix TImode constant handling
@ 2017-04-24 17:23 Andreas Krebbel
  2017-04-24 17:27 ` [PATCH] S/390: PR80464: Split MEM->GPR vector moves Andreas Krebbel
  0 siblings, 1 reply; 2+ messages in thread
From: Andreas Krebbel @ 2017-04-24 17:23 UTC (permalink / raw)
  To: gcc-patches

The P constraint letter is supposed to match every constant which is
acceptable during reload.  However, constraints do not appear to be
able to handle const_wide_int yet.  It works with predicates so the
alternative is modelled with a new predicate now.

Bootstrapped and regression tested on s390x.

Bye,

-Andreas-

gcc/ChangeLog:

2017-04-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/predicates.md (reload_const_wide_int_operand): New
	predicate.
	* config/s390/s390.md ("movti"): Remove d/P alternative.
	("movti_bigconst"): New pattern definition.

gcc/testsuite/ChangeLog:

2017-04-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gcc.target/s390/pr79895.c: New test.
---
 gcc/config/s390/predicates.md           |  5 +++++
 gcc/config/s390/s390.md                 | 13 +++++++++++--
 gcc/testsuite/gcc.target/s390/pr79895.c |  9 +++++++++
 3 files changed, 25 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/s390/pr79895.c

diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md
index 0c82efc..34a7ea2 100644
--- a/gcc/config/s390/predicates.md
+++ b/gcc/config/s390/predicates.md
@@ -199,6 +199,11 @@
       (and (match_code "const_int")
 	   (match_test "INTVAL (op) <= 32767 && INTVAL (op) >= -32768"))))
 
+(define_predicate "reload_const_wide_int_operand"
+  (and (match_code "const_wide_int")
+       (match_test "legitimate_reload_constant_p (op)")))
+
+
 ;; operators --------------------------------------------------------------
 
 ;; Return nonzero if OP is a valid comparison operator
diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 59f189c..36e2a40 100644
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1479,11 +1479,20 @@
 ; movti instruction pattern(s).
 ;
 
+
+; Separate out the register pair alternative since constraints (P) are
+; not able to deal with const_wide_int's.  But predicates do.
+(define_insn "*movti_bigconst"
+  [(set (match_operand:TI 0 "register_operand"              "=d")
+        (match_operand:TI 1 "reload_const_wide_int_operand" ""))]
+  "TARGET_ZARCH"
+  "#")
+
 ; FIXME: More constants are possible by enabling jxx, jyy constraints
 ; for TImode (use double-int for the calculations)
 (define_insn "movti"
-  [(set (match_operand:TI 0 "nonimmediate_operand" "=d,S,v,  v,  v,v,d,v,R,  d,o")
-        (match_operand:TI 1 "general_operand"      " S,d,v,j00,jm1,d,v,R,v,dPT,d"))]
+  [(set (match_operand:TI 0 "nonimmediate_operand" "=d,S,v,  v,  v,v,d,v,R, d,o")
+        (match_operand:TI 1 "general_operand"      " S,d,v,j00,jm1,d,v,R,v,dT,d"))]
   "TARGET_ZARCH"
   "@
    lmg\t%0,%N0,%S1
diff --git a/gcc/testsuite/gcc.target/s390/pr79895.c b/gcc/testsuite/gcc.target/s390/pr79895.c
new file mode 100644
index 0000000..02374e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/s390/pr79895.c
@@ -0,0 +1,9 @@
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O1 -mno-lra" } */
+
+unsigned __int128 g;
+void
+foo ()
+{
+  g = (unsigned __int128)1 << 127;
+}
-- 
2.9.1

^ permalink raw reply	[flat|nested] 2+ messages in thread

* [PATCH] S/390: PR80464: Split MEM->GPR vector moves
  2017-04-24 17:23 [PATCH] S/390: PR79895: Fix TImode constant handling Andreas Krebbel
@ 2017-04-24 17:27 ` Andreas Krebbel
  0 siblings, 0 replies; 2+ messages in thread
From: Andreas Krebbel @ 2017-04-24 17:27 UTC (permalink / raw)
  To: gcc-patches

We do this already for TImode values but it was missing for vector
modes.

Bootstrapped and regression tested on s390x.

Bye,

-Andreas-

gcc/ChangeLog:

2017-04-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* config/s390/vector.md: Split MEM->GPR vector moves for
	non-s_operand addresses.

gcc/testsuite/ChangeLog:

2017-04-24  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>

	* gfortran.fortran-torture/compile/pr80464.f90: New test.
---
 gcc/config/s390/vector.md                          | 19 +++++++++++
 .../gfortran.fortran-torture/compile/pr80464.f90   | 39 ++++++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 gcc/testsuite/gfortran.fortran-torture/compile/pr80464.f90

diff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md
index 7535b9d..2952893 100644
--- a/gcc/config/s390/vector.md
+++ b/gcc/config/s390/vector.md
@@ -248,6 +248,25 @@
   operands[5] = operand_subword (operands[1], 0, 0, <MODE>mode);
 })
 
+; This is the vector equivalent to the TImode splitter in s390.md.  It
+; is required if both target GPRs occur in the source address operand.
+
+; For non-s_operands at least one of the target GPRs does not conflict
+; with the address operand and one of the splitters above will take
+; over.
+(define_split
+  [(set (match_operand:V_128 0 "register_operand" "")
+        (match_operand:V_128 1 "memory_operand" ""))]
+  "TARGET_ZARCH && reload_completed
+   && !VECTOR_REG_P (operands[0])
+   && !s_operand (operands[1], VOIDmode)"
+  [(set (match_dup 0) (match_dup 1))]
+{
+  rtx addr = operand_subword (operands[0], 1, 0, <MODE>mode);
+  addr = gen_lowpart (Pmode, addr);
+  s390_load_address (addr, XEXP (operands[1], 0));
+  operands[1] = replace_equiv_address (operands[1], addr);
+})
 
 ; Moves for smaller vector modes.
 
diff --git a/gcc/testsuite/gfortran.fortran-torture/compile/pr80464.f90 b/gcc/testsuite/gfortran.fortran-torture/compile/pr80464.f90
new file mode 100644
index 0000000..d3a3943
--- /dev/null
+++ b/gcc/testsuite/gfortran.fortran-torture/compile/pr80464.f90
@@ -0,0 +1,39 @@
+subroutine bla(a,bar,lb,ne,nt,v,b)
+  character*8 lb
+  integer bar(20),foo(8,5)
+  real*8 a(3,*),x(3,8),v(0:3,*)
+  if(lb(4:4).eq.'3') then
+     n=8
+  elseif(lb(4:5).eq.'10') then
+     n=10
+     ns=6
+     m=4
+  endif
+  call blub(id)
+  do
+     if(id.eq.0) exit
+     if(lb(4:4).eq.'6') then
+        m=1
+     endif
+     if((n.eq.20).or.(n.eq.8)) then
+        if(b.eq.0) then
+           do i=1,ns
+              do j=1,3
+                 x(j,i)=a(j,bar(foo(i,ig)))
+              enddo
+           enddo
+        else
+           do i=1,ns
+              do j=1,3
+                 x(j,i)=a(j,bar(foo(i,ig)))+v(j,bar(foo(i,ig)))
+              enddo
+           enddo
+        endif
+     endif
+     do i=1,m
+        if(lb(4:5).eq.'1E') then
+           call blab(x)
+        endif
+     enddo
+  enddo
+end subroutine bla
-- 
2.9.1

^ permalink raw reply	[flat|nested] 2+ messages in thread

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