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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Eric Botcazou <ebotcazou@adacore.com>
Cc: gcc-patches@gcc.gnu.org
Subject: Re: [rs6000] Fix ICE with -fstack-limit-register and large frames
Date: Fri, 26 May 2017 13:25:00 -0000	[thread overview]
Message-ID: <20170526131836.GE19687@gate.crashing.org> (raw)
In-Reply-To: <1944532.Kj3BqOocuy@polaris>

Hi!

[ please cc: me and David on rs6000 patches ]

On Wed, May 24, 2017 at 09:51:46AM +0200, Eric Botcazou wrote:
> this fixes an internal error with -fstack-limit-register and large frames:
> 
> eric@polaris:~/build/gcc/powerpc-linux> gcc/xgcc -Bgcc -S stack-limit-1.c -
> fstack-limit-register=r2
> stack-limit-1.c: In function 'foo':
> stack-limit-1.c:9:1: error: insn does not satisfy its constraints:
>  }
>  ^
> (insn 21 20 22 (set (reg:SI 0 0)
>         (plus:SI (reg:SI 0 0)
>             (const_int 3968 [0xf80]))) "stack-limit-1.c":5 70 {*addsi3}
>      (nil))

Yeah, that instruction does not exist.

> Index: config/rs6000/rs6000.c
> ===================================================================
> --- config/rs6000/rs6000.c	(revision 248140)
> +++ config/rs6000/rs6000.c	(working copy)
> @@ -28372,7 +28372,21 @@ rs6000_emit_allocate_stack (HOST_WIDE_IN
>  	  && REGNO (stack_limit_rtx) > 1
>  	  && REGNO (stack_limit_rtx) <= 31)
>  	{
> -	  emit_insn (gen_add3_insn (tmp_reg, stack_limit_rtx, GEN_INT (size)));
> +	  rtx cst = GEN_INT (size);
> +
> +	  /* The add expander doesn't correctly handle r0.  */

Could you make the expander handle it, instead?  It's as simple as (after
the double-reg thing) add "if operands[1] is reg 0, force_reg operands[2]".
I'll do it if you prefer.

[ the patch is broken here ]

> /* { dg-do compile } */
> /* { dg-options "-fstack-limit-register=r2" } */

Please use a different register, r2 already has different functions in
most ABIs.  It *probably* will compile anyway, but :-)


Segher

  reply	other threads:[~2017-05-26 13:19 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-24  7:53 Eric Botcazou
2017-05-26 13:25 ` Segher Boessenkool [this message]
2017-06-02  8:27   ` Eric Botcazou
2017-06-02 16:25     ` Segher Boessenkool
2017-06-03 10:34       ` Eric Botcazou
2017-06-03 19:56         ` Segher Boessenkool

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