From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 71256 invoked by alias); 26 May 2017 13:19:05 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 71242 invoked by uid 89); 26 May 2017 13:19:03 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-11.0 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=46AM, 46am X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 26 May 2017 13:19:02 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id v4QDIkX1016824; Fri, 26 May 2017 08:18:47 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id v4QDIgHK016818; Fri, 26 May 2017 08:18:42 -0500 Date: Fri, 26 May 2017 13:25:00 -0000 From: Segher Boessenkool To: Eric Botcazou Cc: gcc-patches@gcc.gnu.org Subject: Re: [rs6000] Fix ICE with -fstack-limit-register and large frames Message-ID: <20170526131836.GE19687@gate.crashing.org> References: <1944532.Kj3BqOocuy@polaris> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1944532.Kj3BqOocuy@polaris> User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2017-05/txt/msg02046.txt.bz2 Hi! [ please cc: me and David on rs6000 patches ] On Wed, May 24, 2017 at 09:51:46AM +0200, Eric Botcazou wrote: > this fixes an internal error with -fstack-limit-register and large frames: > > eric@polaris:~/build/gcc/powerpc-linux> gcc/xgcc -Bgcc -S stack-limit-1.c - > fstack-limit-register=r2 > stack-limit-1.c: In function 'foo': > stack-limit-1.c:9:1: error: insn does not satisfy its constraints: > } > ^ > (insn 21 20 22 (set (reg:SI 0 0) > (plus:SI (reg:SI 0 0) > (const_int 3968 [0xf80]))) "stack-limit-1.c":5 70 {*addsi3} > (nil)) Yeah, that instruction does not exist. > Index: config/rs6000/rs6000.c > =================================================================== > --- config/rs6000/rs6000.c (revision 248140) > +++ config/rs6000/rs6000.c (working copy) > @@ -28372,7 +28372,21 @@ rs6000_emit_allocate_stack (HOST_WIDE_IN > && REGNO (stack_limit_rtx) > 1 > && REGNO (stack_limit_rtx) <= 31) > { > - emit_insn (gen_add3_insn (tmp_reg, stack_limit_rtx, GEN_INT (size))); > + rtx cst = GEN_INT (size); > + > + /* The add expander doesn't correctly handle r0. */ Could you make the expander handle it, instead? It's as simple as (after the double-reg thing) add "if operands[1] is reg 0, force_reg operands[2]". I'll do it if you prefer. [ the patch is broken here ] > /* { dg-do compile } */ > /* { dg-options "-fstack-limit-register=r2" } */ Please use a different register, r2 already has different functions in most ABIs. It *probably* will compile anyway, but :-) Segher