Re: [PATCH 3/7] [ARC] Allow r30 to be used by the reg-alloc.

[Andrew Burgess <andrew.burgess@embecosm.com>]

* Claudiu Zissulescu <Claudiu.Zissulescu@synopsys.com> [2017-05-19 12:30:58 +0200]:

> gcc/
> 2016-12-12  Claudiu Zissulescu  <claziss@synopsys.com>
> 
> 	* config/arc/arc.c (arc_conditional_register_usage): Allow r30 to
> 	be used by the reg-alloc.

Looks good, thanks,

Andrew


> ---
>  gcc/config/arc/arc.c | 9 ++++++++-
>  gcc/config/arc/arc.h | 3 ++-
>  2 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c
> index fd4bf2c..ff86f6c 100644
> --- a/gcc/config/arc/arc.c
> +++ b/gcc/config/arc/arc.c
> @@ -1551,7 +1551,14 @@ arc_conditional_register_usage (void)
>        /* For ARCv2 the core register set is changed.  */
>        strcpy (rname29, "ilink");
>        strcpy (rname30, "r30");
> -      fixed_regs[30] = call_used_regs[30] = 1;
> +      call_used_regs[30] = 1;
> +      fixed_regs[30] = 0;
> +
> +      arc_regno_reg_class[30] = WRITABLE_CORE_REGS;
> +      SET_HARD_REG_BIT (reg_class_contents[WRITABLE_CORE_REGS], 30);
> +      SET_HARD_REG_BIT (reg_class_contents[CHEAP_CORE_REGS], 30);
> +      SET_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], 30);
> +      SET_HARD_REG_BIT (reg_class_contents[MPY_WRITABLE_CORE_REGS], 30);
>     }
>  
>    if (TARGET_MUL64_SET)
> diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h
> index 0a4c745..fbc1195 100644
> --- a/gcc/config/arc/arc.h
> +++ b/gcc/config/arc/arc.h
> @@ -641,7 +641,8 @@ extern enum reg_class arc_regno_reg_class[];
>    ((REGNO) < 29 || ((REGNO) == ARG_POINTER_REGNUM) || ((REGNO) == 63)	\
>     || ((unsigned) reg_renumber[REGNO] < 29)				\
>     || ((unsigned) (REGNO) == (unsigned) arc_tp_regno)			\
> -   || (fixed_regs[REGNO] == 0 && IN_RANGE (REGNO, 32, 59)))
> +   || (fixed_regs[REGNO] == 0 && IN_RANGE (REGNO, 32, 59))		\
> +   || ((REGNO) == 30 && fixed_regs[REGNO] == 0))
>  
>  #define REGNO_OK_FOR_INDEX_P(REGNO) REGNO_OK_FOR_BASE_P(REGNO)
>  
> -- 
> 1.9.1
>