From: Prakhar Bahuguna <prakhar.bahuguna@arm.com>
To: "Richard Earnshaw (lists)" <Richard.Earnshaw@arm.com>
Cc: gcc-patches@gcc.gnu.org, nd@arm.com,
Ramana.Radhakrishnan@arm.com, Kyrylo.Tkachov@foss.arm.com
Subject: Re: [PATCH, ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macro
Date: Fri, 16 Jun 2017 13:25:00 -0000 [thread overview]
Message-ID: <20170616132546.nu6cmcwyzytxvrio@e107464-lin.cambridge.arm.com> (raw)
In-Reply-To: <7d924fde-aaa9-3489-fc4a-7bedc74cd28c@arm.com>
[-- Attachment #1: Type: text/plain, Size: 60 bytes --]
Patch updated with code style fixes.
--
Prakhar Bahuguna
[-- Attachment #2: 0001-Implement-__ARM_FEATURE_COPROC-coprocessor-intrinsic.patch --]
[-- Type: text/plain, Size: 10562 bytes --]
From f1d76a6309a1fe16711b800507938eaa4f78852e Mon Sep 17 00:00:00 2001
From: Prakhar Bahuguna <prakhar.bahuguna@arm.com>
Date: Tue, 2 May 2017 13:43:40 +0100
Subject: [PATCH] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature
macro
---
gcc/config/arm/arm-c.c | 17 +++++++++++++++++
gcc/testsuite/gcc.target/arm/acle/cdp.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/cdp2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/ldc.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/ldc2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/ldc2l.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/ldcl.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mcr.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mcr2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mcrr.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mcrr2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mrc.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mrc2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mrrc.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/mrrc2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/stc.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/stc2.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/stc2l.c | 3 +++
gcc/testsuite/gcc.target/arm/acle/stcl.c | 3 +++
19 files changed, 71 insertions(+)
diff --git a/gcc/config/arm/arm-c.c b/gcc/config/arm/arm-c.c
index 3abe7d1f1f5..d8b17ffdccc 100644
--- a/gcc/config/arm/arm-c.c
+++ b/gcc/config/arm/arm-c.c
@@ -200,6 +200,23 @@ arm_cpu_builtins (struct cpp_reader* pfile)
def_or_undef_macro (pfile, "__ARM_FEATURE_IDIV", TARGET_IDIV);
def_or_undef_macro (pfile, "__ARM_ASM_SYNTAX_UNIFIED__", inline_asm_unified);
+
+ if ((!TARGET_THUMB || TARGET_THUMB2) && arm_arch4
+ && !(arm_arch8 && arm_arch_notm))
+ {
+ int coproc_level = 0x1;
+
+ if (arm_arch5)
+ coproc_level |= 0x2;
+ if (arm_arch5e)
+ coproc_level |= 0x4;
+ if (arm_arch6)
+ coproc_level |= 0x8;
+
+ builtin_define_with_int_value ("__ARM_FEATURE_COPROC", coproc_level);
+ }
+ else
+ cpp_undef (pfile, "__ARM_FEATURE_COPROC");
}
void
diff --git a/gcc/testsuite/gcc.target/arm/acle/cdp.c b/gcc/testsuite/gcc.target/arm/acle/cdp.c
index 28b218e7cfc..cebd8c4024e 100644
--- a/gcc/testsuite/gcc.target/arm/acle/cdp.c
+++ b/gcc/testsuite/gcc.target/arm/acle/cdp.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
void test_cdp (void)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/cdp2.c b/gcc/testsuite/gcc.target/arm/acle/cdp2.c
index 00bcd502b56..945d435d2fb 100644
--- a/gcc/testsuite/gcc.target/arm/acle/cdp2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/cdp2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
void test_cdp2 (void)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc.c b/gcc/testsuite/gcc.target/arm/acle/ldc.c
index f45f25d8c97..cd57343208f 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldc.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldc.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc2.c b/gcc/testsuite/gcc.target/arm/acle/ldc2.c
index 433bf8a1204..d7691e30d76 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldc2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldc2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldc2l.c b/gcc/testsuite/gcc.target/arm/acle/ldc2l.c
index 88c8aa44765..9ee63afa055 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldc2l.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldc2l.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/ldcl.c b/gcc/testsuite/gcc.target/arm/acle/ldcl.c
index 72a97f1d7b7..a6bfd9011dc 100644
--- a/gcc/testsuite/gcc.target/arm/acle/ldcl.c
+++ b/gcc/testsuite/gcc.target/arm/acle/ldcl.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/mcr.c b/gcc/testsuite/gcc.target/arm/acle/mcr.c
index 93f977a2bdb..7095dcbc3ad 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mcr.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mcr.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
void test_mcr (uint32_t a)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mcr2.c b/gcc/testsuite/gcc.target/arm/acle/mcr2.c
index 5b60d10ff25..2a4b0ce4559 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mcr2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mcr2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
void test_mcr2 (uint32_t a)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mcrr.c b/gcc/testsuite/gcc.target/arm/acle/mcrr.c
index dcc223c713d..bcfbe1a4855 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mcrr.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mcrr.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc3_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x4) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
void test_mcrr (uint64_t a)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mcrr2.c b/gcc/testsuite/gcc.target/arm/acle/mcrr2.c
index 10f2014d447..afd07e67f21 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mcrr2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mcrr2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc4_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x8) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
void test_mcrr2 (uint64_t a)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mrc.c b/gcc/testsuite/gcc.target/arm/acle/mrc.c
index 34ca6a1638c..809b6c9c265 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mrc.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mrc.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
uint32_t test_mrc (void)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mrc2.c b/gcc/testsuite/gcc.target/arm/acle/mrc2.c
index 3b72a402224..4c06ea39b37 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mrc2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mrc2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
uint32_t test_mrc2 (void)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mrrc.c b/gcc/testsuite/gcc.target/arm/acle/mrrc.c
index 28c3b8ea6b5..802de083d5c 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mrrc.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mrrc.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc3_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x4) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
uint64_t test_mrrc (void)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/mrrc2.c b/gcc/testsuite/gcc.target/arm/acle/mrrc2.c
index 5b7aab06222..adf39563e29 100644
--- a/gcc/testsuite/gcc.target/arm/acle/mrrc2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/mrrc2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc4_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x8) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
uint64_t test_mrrc2 (void)
{
diff --git a/gcc/testsuite/gcc.target/arm/acle/stc.c b/gcc/testsuite/gcc.target/arm/acle/stc.c
index 7c6e04fe0fe..2714f65787e 100644
--- a/gcc/testsuite/gcc.target/arm/acle/stc.c
+++ b/gcc/testsuite/gcc.target/arm/acle/stc.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/stc2.c b/gcc/testsuite/gcc.target/arm/acle/stc2.c
index 1578f7b1136..0a84652e0f0 100644
--- a/gcc/testsuite/gcc.target/arm/acle/stc2.c
+++ b/gcc/testsuite/gcc.target/arm/acle/stc2.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/stc2l.c b/gcc/testsuite/gcc.target/arm/acle/stc2l.c
index 7adbd60d48a..2453d04ad72 100644
--- a/gcc/testsuite/gcc.target/arm/acle/stc2l.c
+++ b/gcc/testsuite/gcc.target/arm/acle/stc2l.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc2_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x2) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
diff --git a/gcc/testsuite/gcc.target/arm/acle/stcl.c b/gcc/testsuite/gcc.target/arm/acle/stcl.c
index 2fd5edd02d7..affdaa27982 100644
--- a/gcc/testsuite/gcc.target/arm/acle/stcl.c
+++ b/gcc/testsuite/gcc.target/arm/acle/stcl.c
@@ -5,6 +5,9 @@
/* { dg-require-effective-target arm_coproc1_ok } */
#include "arm_acle.h"
+#if (__ARM_FEATURE_COPROC & 0x1) == 0
+ #error "__ARM_FEATURE_COPROC does not have correct feature bits set"
+#endif
extern void * p;
--
2.13.0
prev parent reply other threads:[~2017-06-16 13:25 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-14 9:35 Prakhar Bahuguna
2017-06-15 16:23 ` Richard Earnshaw (lists)
2017-06-16 7:48 ` Prakhar Bahuguna
2017-06-16 14:37 ` Richard Earnshaw (lists)
2017-06-16 14:56 ` Prakhar Bahuguna
2017-06-19 9:32 ` Richard Earnshaw (lists)
2017-06-21 16:54 ` Christophe Lyon
2017-06-21 16:58 ` Christophe Lyon
2017-06-26 7:34 ` Christophe Lyon
2017-06-26 14:09 ` Thomas Preudhomme
2017-06-26 14:16 ` Christophe Lyon
2017-06-26 16:01 ` Thomas Preudhomme
2017-06-28 11:33 ` Thomas Preudhomme
2017-06-20 13:17 ` [arm-embedded] " Thomas Preudhomme
2017-06-16 13:25 ` Prakhar Bahuguna [this message]
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