From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 65636 invoked by alias); 19 Jun 2017 23:16:41 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 65627 invoked by uid 89); 19 Jun 2017 23:16:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL,BAYES_00,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy= X-HELO: gate.crashing.org Received: from gate.crashing.org (HELO gate.crashing.org) (63.228.1.57) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 19 Jun 2017 23:16:40 +0000 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id v5JNGfpw029104; Mon, 19 Jun 2017 18:16:42 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id v5JNGfq4029103; Mon, 19 Jun 2017 18:16:41 -0500 Date: Mon, 19 Jun 2017 23:16:00 -0000 From: Segher Boessenkool To: Michael Meissner , GCC Patches , David Edelsohn , Bill Schmidt Subject: Re: [PATCH, rev 2] PR target/79799, Add vec_insert of V4SFmode on PowerPC ISA 3.0 (power9) Message-ID: <20170619231641.GP16550@gate.crashing.org> References: <20170615000158.GA11033@ibm-tiger.the-meissners.org> <20170615233938.GA15195@ibm-tiger.the-meissners.org> <20170616021027.GA2916@ibm-tiger.the-meissners.org> <20170616195246.GH16550@gate.crashing.org> <20170616202658.GA2150@ibm-tiger.the-meissners.org> <20170616213047.GJ16550@gate.crashing.org> <20170616215534.GA24208@ibm-tiger.the-meissners.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170616215534.GA24208@ibm-tiger.the-meissners.org> User-Agent: Mutt/1.4.2.3i X-IsSubscribed: yes X-SW-Source: 2017-06/txt/msg01388.txt.bz2 On Fri, Jun 16, 2017 at 05:55:35PM -0400, Michael Meissner wrote: > Here is the latest patch that restricts the optimization to 64-bit (due to > needing VSX small integers). I've done a full bootstrap/make check on a little > endian power8 system, and a build without bootstrap and make check on a little > endian power9 system. Neither the power8 nor the power9 systems had any > regressions. I'm also running a test on a big endian power7 system for > completeness. > > Assuming the power7 test finishes without any regressions, can I check this > patch into the trunk and later the GCC 7 branch. > > The main change was to restrict the optimization to 64-bit PowerPC that have > VSX small integer support turned on (default for 64-bit). I did shorten the > one line in the testsuite that you mentioned. Okay for both. Thanks! Segher > 2017-06-16 Michael Meissner > > PR target/79799 > * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support > for doing vector set of SFmode on ISA 3.0. > * config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise. > (vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF > element. > (vsx_insert_extract_v4sf_p9): Add an optimization for inserting a > SFmode value into a V4SF variable that was extracted from another > V4SF variable without converting the element to double precision > and back to single precision vector format. > (vsx_insert_extract_v4sf_p9_2): Likewise. > > [gcc/testsuite] > 2017-06-16 Michael Meissner > > PR target/79799 > * gcc.target/powerpc/pr79799-1.c: New test. > * gcc.target/powerpc/pr79799-2.c: Likewise. > * gcc.target/powerpc/pr79799-3.c: Likewise. > * gcc.target/powerpc/pr79799-4.c: Likewise. > * gcc.target/powerpc/pr79799-5.c: Likewise.