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Date: Thu, 22 Jun 2017 15:23:00 -0000
From: Segher Boessenkool <segher@kernel.crashing.org>
To: Carl Love <cel@us.ibm.com>
Cc: gcc-patches@gcc.gnu.org, David Edelsohn <dje.gcc@gmail.com>,        Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Subject: Re: [PATCH v2, rs6000] Add vec_reve support
Message-ID: <20170622152332.GD16550@gate.crashing.org>
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Hi Carl,

On Wed, Jun 21, 2017 at 02:23:06PM -0700, Carl Love wrote:
> +;; Vector reverse elements
> +(define_expand "altivec_vreve<mode>2"
> +  [(set (match_operand:VEC_A 0 "register_operand" "=v")
> +	(unspec:VEC_A [(match_operand:VEC_A 1 "register_operand" "v")]
> +		      UNSPEC_VREVEV))]

The constraints on an expand are never used; it's less confusing if you
remove them.

> +  for (j = num_elements - 1; j >= 0; j--)
> +    for (i = 0; i < size; i++)
> +      RTVEC_ELT (v, i + j * size)
> +	=  gen_rtx_CONST_INT (QImode,
> +			      size * num_elements - j * size + i - size);

Maybe

+      RTVEC_ELT (v, i + j * size)
+	=  gen_rtx_CONST_INT (QImode, i + (num_elements - j - 1) * size);

(so it is clearer this is reverting the elements)?  Oh, and you can make
the "j" loop run forward now.

You can assume the compiler will strength-reduce the loop and everything;
write your code so it is easily readable, everything boring, everything
the same as always.  This makes unusual things stand out more, too, which
is a very good thing :-)

> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/builtins-3-vec_reve-runnable.c
> @@ -0,0 +1,394 @@
> +/* { dg-do run { target { powerpc*-*-linux* } } } */
> +/* { dg-require-effective-target vsx_hw } */
> +/* { dg-options "-O2 -mvsx -mcpu=power8" } */
> +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */

This will make it run on power7 as well...  That won't work.  I think
you're previous patch had something similar (and that is in fact failing
on power7).  Please investigate.  (Maybe it wants p8vector_hw instead?)


Segher