From: Segher Boessenkool <segher@kernel.crashing.org>
To: Michael Meissner <meissner@linux.vnet.ibm.com>,
GCC Patches <gcc-patches@gcc.gnu.org>,
David Edelsohn <dje.gcc@gmail.com>,
Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Subject: Re: [PATCH], PR target/80510, Optimize 32-bit offsettable memory references on power7/power8
Date: Fri, 23 Jun 2017 17:19:00 -0000 [thread overview]
Message-ID: <20170623171846.GN16550@gate.crashing.org> (raw)
In-Reply-To: <20170622225452.GA7801@ibm-tiger.the-meissners.org>
On Thu, Jun 22, 2017 at 06:54:52PM -0400, Michael Meissner wrote:
> This patch implements the necessary move and peephole support for 32-bit ISA
> 2.05/2.06 (power7/power8) targets, so that the compiler can optimize:
>
> load FPR, <offsettable memory> move FPR, ALTIVEC
> move ALTIVEC, FPR store FPR, <offsettable memory>
>
> into:
>
> ADDI GPR, <offsettable address> ADDI GPR, <offsettable address>
> load ALTIVEC, GPR store ALTIVEC, GPR
> Can I install this into the trunk and after a burn in period, install it on the
> GCC 7 and GCC 6 branches (the previous patch for 64-bit is already installed on
> both branches)? If desired, I can make sure it gets into 6.4, or I can wait to
> install the patch until after 6.4 ships.
Okay for trunk; okay for 7. Also okay for 6, if you are confident it will
not cause problems. Thanks,
Segher
prev parent reply other threads:[~2017-06-23 17:19 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-22 22:55 Michael Meissner
2017-06-23 17:19 ` Segher Boessenkool [this message]
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