* [PATCH], PR target/81348: Fix compiler segfault on -mcpu=power9 code
@ 2017-07-07 13:20 Michael Meissner
2017-07-07 15:40 ` Segher Boessenkool
0 siblings, 1 reply; 2+ messages in thread
From: Michael Meissner @ 2017-07-07 13:20 UTC (permalink / raw)
To: GCC Patches, Segher Boessenkool, David Edelsohn, Bill Schmidt
[-- Attachment #1: Type: text/plain, Size: 798 bytes --]
This patch fixes a typo where the wrong operand was used (a memory was used
where a register was intended), and the compiler segfaulted.
I did the bootstrap and make check with no regression on a little endian power8
system. Can I install this in the trunk and the gcc 7.x branch (it isn't an
issue on the gcc 6.x branch)?
[gcc]
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81348
* config/rs6000/rs6000.md (HI sign_extend splitter): Use the
correct operand in doing the split.
[gcc/testsuite]
2017-07-07 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/81348
* gcc.target/powerpc/pr81348.c: New test.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meissner@linux.vnet.ibm.com, phone: +1 (978) 899-4797
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Index: gcc/config/rs6000/rs6000.md
===================================================================
--- gcc/config/rs6000/rs6000.md (revision 250043)
+++ gcc/config/rs6000/rs6000.md (working copy)
@@ -940,7 +940,7 @@ (define_split
(set (match_dup 0)
(sign_extend:EXTHI (match_dup 2)))]
{
- operands[2] = gen_rtx_REG (HImode, REGNO (operands[1]));
+ operands[2] = gen_rtx_REG (HImode, REGNO (operands[0]));
})
(define_insn_and_split "*extendhi<mode>2_dot"
Index: gcc/testsuite/gcc.target/powerpc/pr81348.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr81348.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr81348.c (working copy)
@@ -0,0 +1,24 @@
+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-mcpu=power9 -Og" } */
+
+/* PR target/81348: Compiler died in doing short->float conversion due to using
+ the wrong register in a define_split. */
+
+int a;
+short b;
+float ***c;
+
+void d(void)
+{
+ int e = 3;
+
+ if (a)
+ e = b;
+
+ ***c = e;
+}
+
+/* { dg-final { scan-assembler {\mlxsihzx\M} } } */
+/* { dg-final { scan-assembler {\mvextsh2d\M} } } */
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH], PR target/81348: Fix compiler segfault on -mcpu=power9 code
2017-07-07 13:20 [PATCH], PR target/81348: Fix compiler segfault on -mcpu=power9 code Michael Meissner
@ 2017-07-07 15:40 ` Segher Boessenkool
0 siblings, 0 replies; 2+ messages in thread
From: Segher Boessenkool @ 2017-07-07 15:40 UTC (permalink / raw)
To: Michael Meissner, GCC Patches, David Edelsohn, Bill Schmidt
On Fri, Jul 07, 2017 at 09:19:56AM -0400, Michael Meissner wrote:
> This patch fixes a typo where the wrong operand was used (a memory was used
> where a register was intended), and the compiler segfaulted.
>
> I did the bootstrap and make check with no regression on a little endian power8
> system. Can I install this in the trunk and the gcc 7.x branch (it isn't an
> issue on the gcc 6.x branch)?
Yes please. Thanks,
Segher
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