From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 82252 invoked by alias); 13 Jul 2017 11:38:26 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 80623 invoked by uid 89); 13 Jul 2017 11:38:25 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.7 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wr0-f170.google.com Received: from mail-wr0-f170.google.com (HELO mail-wr0-f170.google.com) (209.85.128.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 13 Jul 2017 11:38:23 +0000 Received: by mail-wr0-f170.google.com with SMTP id k67so51493691wrc.2 for ; Thu, 13 Jul 2017 04:38:23 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=6nJNLulSnp1MoEg+KrXRmaNuDz4GoK8cSDmY90inFFo=; b=rCbn9BXbZIukhU14ZmUvCCimM2rIGPq9KI9Yd9POXcGq1Gf6xNUpfd/u5xOC+VBkcK qjZzn50BFHZMp2kqDrTj5CtHaprC/pCpv1UiiP53DMVQ20B05BNekhpJHkqK+kKLBqvd neQiTHePrIE1JZoAWQ5Ph04MOozdsvIeytDmrlGzMoLfVfRD6+PT8ELJCDlXD0BoAhum iSHRlF1NBEz43E0Bli2pxqrvI0h9mEqzGPwkvoYaV8saP/+1DK/pWZxMtxGF6d2GkqkB 6nb1O7JMawcIMM/esdJuZZA1IagygRCvBx4dsnp7qXmT4sMwyn+1NcyR2rbCYJEcQL/p 95FQ== X-Gm-Message-State: AIVw111OKZuDlQNrMTwm1p78TpzJHrl+yrv1LIiU3MvSdkUBu92VUEVq /ixQHpwDetFT6bU05jA= X-Received: by 10.223.134.207 with SMTP id 15mr1382012wry.127.1499945901859; Thu, 13 Jul 2017 04:38:21 -0700 (PDT) Received: from localhost (host86-150-45-83.range86-150.btcentralplus.com. [86.150.45.83]) by smtp.gmail.com with ESMTPSA id n205sm3880713wmf.21.2017.07.13.04.38.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jul 2017 04:38:20 -0700 (PDT) Date: Thu, 13 Jul 2017 11:38:00 -0000 From: Andrew Burgess To: Claudiu Zissulescu Cc: gcc-patches@gcc.gnu.org, Francois.Bedard@synopsys.com Subject: Re: [PATCH 4/7] [ARC] [LRA] Avoid emitting COND_EXEC during expand. Message-ID: <20170713113819.GD27353@embecosm.com> References: <1496324097-21221-1-git-send-email-claziss@synopsys.com> <1496324097-21221-5-git-send-email-claziss@synopsys.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1496324097-21221-5-git-send-email-claziss@synopsys.com> X-Editor: GNU Emacs [ http://www.gnu.org/software/emacs ] User-Agent: Mutt/1.6.1 (2016-04-27) X-IsSubscribed: yes X-SW-Source: 2017-07/txt/msg00728.txt.bz2 * Claudiu Zissulescu [2017-06-01 15:34:54 +0200]: > Emmitting COND_EXEC rtxes during expand does not always work. > > gcc/ > 2017-01-10 Claudiu Zissulescu > > * config/arc/arc.md (clzsi2): Expand to an arc_clzsi2 instruction > that also clobbers the CC register. The old expand code is moved > to ... > (*arc_clzsi2): ... here. > (ctzsi2): Expand to an arc_ctzsi2 instruction that also clobbers > the CC register. The old expand code is moved to ... > (arc_ctzsi2): ... here. This seems fine, your description "....does not always work." is a bit of a tease :) it would be nice to know _why_ it doesn't work, or at least a description of what problem you're seeing. Also we seem to be missing a test, would it be possible to find one? If not then I guess we live without, but we should note that in the commit message. Thanks, Andrew > --- > gcc/config/arc/arc.md | 41 ++++++++++++++++++++++++++++++++++------- > 1 file changed, 34 insertions(+), 7 deletions(-) > > diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md > index 39bcc26..928feb1 100644 > --- a/gcc/config/arc/arc.md > +++ b/gcc/config/arc/arc.md > @@ -4533,9 +4533,21 @@ > (set_attr "type" "two_cycle_core,two_cycle_core")]) > > (define_expand "clzsi2" > - [(set (match_operand:SI 0 "dest_reg_operand" "") > - (clz:SI (match_operand:SI 1 "register_operand" "")))] > + [(parallel > + [(set (match_operand:SI 0 "register_operand" "") > + (clz:SI (match_operand:SI 1 "register_operand" ""))) > + (clobber (match_dup 2))])] > + "TARGET_NORM" > + "operands[2] = gen_rtx_REG (CC_ZNmode, CC_REG);") > + > +(define_insn_and_split "*arc_clzsi2" > + [(set (match_operand:SI 0 "register_operand" "=r") > + (clz:SI (match_operand:SI 1 "register_operand" "r"))) > + (clobber (reg:CC_ZN CC_REG))] > "TARGET_NORM" > + "#" > + "reload_completed" > + [(const_int 0)] > { > emit_insn (gen_norm_f (operands[0], operands[1])); > emit_insn > @@ -4552,9 +4564,23 @@ > }) > > (define_expand "ctzsi2" > - [(set (match_operand:SI 0 "register_operand" "") > - (ctz:SI (match_operand:SI 1 "register_operand" "")))] > + [(match_operand:SI 0 "register_operand" "") > + (match_operand:SI 1 "register_operand" "")] > "TARGET_NORM" > + " > + emit_insn (gen_arc_ctzsi2 (operands[0], operands[1])); > + DONE; > +") > + > +(define_insn_and_split "arc_ctzsi2" > + [(set (match_operand:SI 0 "register_operand" "=r") > + (ctz:SI (match_operand:SI 1 "register_operand" "r"))) > + (clobber (reg:CC_ZN CC_REG)) > + (clobber (match_scratch:SI 2 "=&r"))] > + "TARGET_NORM" > + "#" > + "reload_completed" > + [(const_int 0)] > { > rtx temp = operands[0]; > > @@ -4562,10 +4588,10 @@ > || (REGNO (temp) < FIRST_PSEUDO_REGISTER > && !TEST_HARD_REG_BIT (reg_class_contents[GENERAL_REGS], > REGNO (temp)))) > - temp = gen_reg_rtx (SImode); > + temp = operands[2]; > emit_insn (gen_addsi3 (temp, operands[1], constm1_rtx)); > emit_insn (gen_bic_f_zn (temp, temp, operands[1])); > - emit_insn (gen_clrsbsi2 (temp, temp)); > + emit_insn (gen_clrsbsi2 (operands[0], temp)); > emit_insn > (gen_rtx_COND_EXEC > (VOIDmode, > @@ -4575,7 +4601,8 @@ > (gen_rtx_COND_EXEC > (VOIDmode, > gen_rtx_GE (VOIDmode, gen_rtx_REG (CC_ZNmode, CC_REG), const0_rtx), > - gen_rtx_SET (operands[0], gen_rtx_MINUS (SImode, GEN_INT (31), temp)))); > + gen_rtx_SET (operands[0], gen_rtx_MINUS (SImode, GEN_INT (31), > + operands[0])))); > DONE; > }) > > -- > 1.9.1 >