From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 92812 invoked by alias); 13 Jul 2017 11:55:59 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Received: (qmail 92037 invoked by uid 89); 13 Jul 2017 11:55:58 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-24.8 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy= X-HELO: mail-wm0-f47.google.com Received: from mail-wm0-f47.google.com (HELO mail-wm0-f47.google.com) (74.125.82.47) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 13 Jul 2017 11:55:57 +0000 Received: by mail-wm0-f47.google.com with SMTP id w126so21151736wme.0 for ; Thu, 13 Jul 2017 04:55:56 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=BpTQkMfzGEi4whmt4eBQTAu+xQyL4nfeyT+kMUITkVo=; b=nrI4bodSIHF379i7cW0Cu0hIIHDfwKJwhOUHgTuO/xpvBLwDz2bzbzEGvfl59iXneB 7/X0pL9RXe5oXKTDvdCghnqd2M/8D2FUmhECnmpCqSWNmiXwi16AKGNCuC/C9Zy69jqH r3366Rqq5joAhoHBxfy1DAtsnILrvSHEzEOdYo0osdG4JRHh746gpr96NjrbqQJtqpn2 zNsGNEga66i1uMYLW3PQQ7+flod2svfo3vYmk307IAhOHZ1zhSXOL1dKsTVQtxEDMcoB 1d6EXw7u/59xqIYCHh+M61GBFw82/0JbFRwpesqCAG8NAxLZM4rDnDuCi+P9kyCHWPbi yAmw== X-Gm-Message-State: AIVw1106UeOYCTUQ6NqP3qPmlh2oBdcSVATss0IBj0x3BtEp/rJ2PSJH JlSSWzrTgvRhsqp2cT8= X-Received: by 10.28.168.21 with SMTP id r21mr1785070wme.80.1499946955096; Thu, 13 Jul 2017 04:55:55 -0700 (PDT) Received: from localhost (host86-150-45-83.range86-150.btcentralplus.com. [86.150.45.83]) by smtp.gmail.com with ESMTPSA id x18sm1481694wrd.65.2017.07.13.04.55.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Jul 2017 04:55:54 -0700 (PDT) Date: Thu, 13 Jul 2017 11:55:00 -0000 From: Andrew Burgess To: Claudiu Zissulescu Cc: gcc-patches@gcc.gnu.org, Francois.Bedard@synopsys.com Subject: Re: [PATCH 5/7] [ARC] Enable indexed loads for elf targers. Message-ID: <20170713115553.GE27353@embecosm.com> References: <1496324097-21221-1-git-send-email-claziss@synopsys.com> <1496324097-21221-6-git-send-email-claziss@synopsys.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1496324097-21221-6-git-send-email-claziss@synopsys.com> X-Editor: GNU Emacs [ http://www.gnu.org/software/emacs ] User-Agent: Mutt/1.6.1 (2016-04-27) X-IsSubscribed: yes X-SW-Source: 2017-07/txt/msg00729.txt.bz2 * Claudiu Zissulescu [2017-06-01 15:34:55 +0200]: > gcc/ > 2017-02-28 Claudiu Zissulescu > > * config/arc/arc.opt (mindexed-loads): Use initial value > TARGET_INDEXED_LOADS_DEFAULT. > (mauto-modify-reg): Use initial value > TARGET_AUTO_MODIFY_REG_DEFAULT. > * config/arc/elf.h (TARGET_INDEXED_LOADS_DEFAULT): Define. > (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. > * config/arc/linux.h (TARGET_INDEXED_LOADS_DEFAULT): Define. > (TARGET_AUTO_MODIFY_REG_DEFAULT): Likewise. The change looks fine, but it would be nice if the commit message explained _why_ we are default off for Linux and on for Elf, I think more text in the commit message on this sort of thing will help future developers understand why things are the way they are. Thanks, Andrew > --- > gcc/config/arc/arc.opt | 4 ++-- > gcc/config/arc/elf.h | 8 ++++++++ > gcc/config/arc/linux.h | 8 ++++++++ > 3 files changed, 18 insertions(+), 2 deletions(-) > > diff --git a/gcc/config/arc/arc.opt b/gcc/config/arc/arc.opt > index f01a2ff..ed2b827 100644 > --- a/gcc/config/arc/arc.opt > +++ b/gcc/config/arc/arc.opt > @@ -270,11 +270,11 @@ Target RejectNegative Var(arc_tune, TUNE_ARC700_4_2_XMAC) > Tune for ARC700 R4.2 Cpu with XMAC block. > > mindexed-loads > -Target Var(TARGET_INDEXED_LOADS) > +Target Var(TARGET_INDEXED_LOADS) Init(TARGET_INDEXED_LOADS_DEFAULT) > Enable the use of indexed loads. > > mauto-modify-reg > -Target Var(TARGET_AUTO_MODIFY_REG) > +Target Var(TARGET_AUTO_MODIFY_REG) Init(TARGET_AUTO_MODIFY_REG_DEFAULT) > Enable the use of pre/post modify with register displacement. > > mmul32x16 > diff --git a/gcc/config/arc/elf.h b/gcc/config/arc/elf.h > index c5794f8..43f3408 100644 > --- a/gcc/config/arc/elf.h > +++ b/gcc/config/arc/elf.h > @@ -58,3 +58,11 @@ along with GCC; see the file COPYING3. If not see > /* Bare-metal toolchains do not need a thread pointer register. */ > #undef TARGET_ARC_TP_REGNO_DEFAULT > #define TARGET_ARC_TP_REGNO_DEFAULT -1 > + > +/* Indexed loads are default. */ > +#undef TARGET_INDEXED_LOADS_DEFAULT > +#define TARGET_INDEXED_LOADS_DEFAULT 1 > + > +/* Pre/post modify with register displacement are default. */ > +#undef TARGET_AUTO_MODIFY_REG_DEFAULT > +#define TARGET_AUTO_MODIFY_REG_DEFAULT 1 > diff --git a/gcc/config/arc/linux.h b/gcc/config/arc/linux.h > index 83e5a1d..d8e0063 100644 > --- a/gcc/config/arc/linux.h > +++ b/gcc/config/arc/linux.h > @@ -83,3 +83,11 @@ along with GCC; see the file COPYING3. If not see > #define SUBTARGET_CPP_SPEC "\ > %{pthread:-D_REENTRANT} \ > " > + > +/* Indexed loads are default off. */ > +#undef TARGET_INDEXED_LOADS_DEFAULT > +#define TARGET_INDEXED_LOADS_DEFAULT 0 > + > +/* Pre/post modify with register displacement are default off. */ > +#undef TARGET_AUTO_MODIFY_REG_DEFAULT > +#define TARGET_AUTO_MODIFY_REG_DEFAULT 0 > -- > 1.9.1 >